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| author | Tim Newsome <tim@sifive.com> | 2017-09-19 17:10:36 -0700 |
|---|---|---|
| committer | Tim Newsome <tim@sifive.com> | 2017-09-19 17:10:36 -0700 |
| commit | fcd0e956339560021e2a16a143697b8123f227d6 (patch) | |
| tree | 6a030e94821cd27c70d49ddf9338fd77557f1628 /debug/targets | |
| parent | 51b823c7ed8391756a83cab854cd4c646dd13acf (diff) | |
| download | riscv-tests-fcd0e956339560021e2a16a143697b8123f227d6.zip riscv-tests-fcd0e956339560021e2a16a143697b8123f227d6.tar.gz riscv-tests-fcd0e956339560021e2a16a143697b8123f227d6.tar.bz2 | |
Allow multiple reset vectors.
Some boards have jumpers that control the reset vector, and forcing them
one way or another is more annoying than dealing with it in software.
Diffstat (limited to 'debug/targets')
| -rw-r--r-- | debug/targets/RISC-V/spike32.py | 2 | ||||
| -rw-r--r-- | debug/targets/RISC-V/spike64.py | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/debug/targets/RISC-V/spike32.py b/debug/targets/RISC-V/spike32.py index 665d7e9..bcb5892 100644 --- a/debug/targets/RISC-V/spike32.py +++ b/debug/targets/RISC-V/spike32.py @@ -6,7 +6,7 @@ class spike32_hart(targets.Hart): ram = 0x10000000 ram_size = 0x10000000 instruction_hardware_breakpoint_count = 4 - reset_vector = 0x1000 + reset_vectors = [0x1000] link_script_path = "spike32.lds" class spike32(targets.Target): diff --git a/debug/targets/RISC-V/spike64.py b/debug/targets/RISC-V/spike64.py index 6e3da89..9c37f87 100644 --- a/debug/targets/RISC-V/spike64.py +++ b/debug/targets/RISC-V/spike64.py @@ -6,7 +6,7 @@ class spike64_hart(targets.Hart): ram = 0x1212340000 ram_size = 0x10000000 instruction_hardware_breakpoint_count = 4 - reset_vector = 0x1000 + reset_vectors = [0x1000] link_script_path = "spike64.lds" class spike64(targets.Target): |