diff options
author | Tim Newsome <tim@sifive.com> | 2017-08-11 12:55:25 -0700 |
---|---|---|
committer | Tim Newsome <tim@sifive.com> | 2017-08-28 12:16:39 -0700 |
commit | 28fbcac967d6c2a0085faa2007c98d64d3203491 (patch) | |
tree | b1c4e051296db207ddbd13d56d25aa01a7627e81 /debug/targets/SiFive | |
parent | efe2f16d12c23eca1e66d2a304d89aafb22f005f (diff) | |
download | riscv-tests-28fbcac967d6c2a0085faa2007c98d64d3203491.zip riscv-tests-28fbcac967d6c2a0085faa2007c98d64d3203491.tar.gz riscv-tests-28fbcac967d6c2a0085faa2007c98d64d3203491.tar.bz2 |
Make pylint happy.
Diffstat (limited to 'debug/targets/SiFive')
-rw-r--r-- | debug/targets/SiFive/Freedom/U500Sim.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/debug/targets/SiFive/Freedom/U500Sim.py b/debug/targets/SiFive/Freedom/U500Sim.py index 5c500c4..065ab08 100644 --- a/debug/targets/SiFive/Freedom/U500Sim.py +++ b/debug/targets/SiFive/Freedom/U500Sim.py @@ -8,7 +8,7 @@ class U500Hart(targets.Hart): instruction_hardware_breakpoint_count = 2 link_script_path = "Freedom.lds" -class U500Sim(Target): +class U500Sim(targets.Target): timeout_sec = 6000 openocd_config_path = "Freedom.cfg" harts = [U500Hart()] |