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| author | Srivatsa Yogendra <36861801+srivatsa611y@users.noreply.github.com> | 2018-08-17 12:02:57 -0700 |
|---|---|---|
| committer | Andrew Waterman <aswaterman@gmail.com> | 2018-08-17 12:02:57 -0700 |
| commit | d76db2aa6c28ad3e7a66205fb33a39873a9f95c1 (patch) | |
| tree | d4296a0b0af38074cf134f2137629d82dccd565d | |
| parent | b37a57cbafe620601102dab278d6e3e11dcb2b81 (diff) | |
| download | riscv-tests-d76db2aa6c28ad3e7a66205fb33a39873a9f95c1.zip riscv-tests-d76db2aa6c28ad3e7a66205fb33a39873a9f95c1.tar.gz riscv-tests-d76db2aa6c28ad3e7a66205fb33a39873a9f95c1.tar.bz2 | |
making mtvec_handler global (#150)
| -rw-r--r-- | isa/rv32mi/shamt.S | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/isa/rv32mi/shamt.S b/isa/rv32mi/shamt.S index aa136b5..c13bc3f 100644 --- a/isa/rv32mi/shamt.S +++ b/isa/rv32mi/shamt.S @@ -21,6 +21,7 @@ RVTEST_CODE_BEGIN TEST_PASSFAIL +.global mtvec_handler mtvec_handler: # Trapping on test 3 is good. # Note that since the test didn't complete, TESTNUM is smaller by 1. |