From dd9a83b2a7a2e8b7100f7f5d915c1e81dc2486c9 Mon Sep 17 00:00:00 2001
From: Alex Solomatnikov <sols@sifive.com>
Date: Thu, 5 Apr 2018 10:12:18 -0700
Subject: Added SBI_WRITE_PERF_CNT

---
 machine/mcall.h |  3 ++-
 machine/mtrap.c | 23 +++++++++++++++++++++++
 2 files changed, 25 insertions(+), 1 deletion(-)

diff --git a/machine/mcall.h b/machine/mcall.h
index 874086e..b71a080 100644
--- a/machine/mcall.h
+++ b/machine/mcall.h
@@ -11,6 +11,7 @@
 #define SBI_REMOTE_SFENCE_VMA_ASID 7
 #define SBI_SHUTDOWN 8
 #define SBI_READ_PERF_CNT 9
-#define SBI_WRITE_PERF_CFG 10
+#define SBI_WRITE_PERF_CNT 10
+#define SBI_WRITE_PERF_CFG 11
 
 #endif
diff --git a/machine/mtrap.c b/machine/mtrap.c
index 3c10e66..b2a3011 100644
--- a/machine/mtrap.c
+++ b/machine/mtrap.c
@@ -108,6 +108,26 @@ static uintptr_t mcall_read_perf_cnt(uintptr_t id)
   return -ENOSYS;
 }
 
+static uintptr_t mcall_write_perf_cnt(uintptr_t id, uintptr_t val)
+{
+  switch (id)
+  {
+  case 0:
+    write_csr(mcycle, val);
+    return 0;
+  case 1:
+    write_csr(minstret, val);
+    return 0;
+  case 2:
+    write_csr(mhpmcounter3, val);
+    return 0;
+  case 3:
+    write_csr(mhpmcounter4, val);
+    return 0;
+  }
+  return -ENOSYS;
+}
+
 static uintptr_t mcall_write_perf_cfg(uintptr_t id, uintptr_t val)
 {
   switch (id)
@@ -198,6 +218,9 @@ send_ipi:
     case SBI_READ_PERF_CNT:
       retval = mcall_read_perf_cnt(arg0);
       break;
+    case SBI_WRITE_PERF_CNT:
+      retval = mcall_write_perf_cnt(arg0, arg1);
+      break;
     case SBI_WRITE_PERF_CFG:
       retval = mcall_write_perf_cfg(arg0, arg1);
       break;
-- 
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