From 15ff218ec04c4d8aea4bdfafd9259f158978e402 Mon Sep 17 00:00:00 2001
From: Palmer Dabbelt <palmer@dabbelt.com>
Date: Wed, 13 Dec 2017 17:05:42 -0800
Subject: Add __riscv_flush_icache

For BBL's purposes a local i-cache flush should be sufficient.
---
 machine/flush_icache.c | 3 +++
 machine/machine.mk.in  | 1 +
 2 files changed, 4 insertions(+)
 create mode 100644 machine/flush_icache.c

diff --git a/machine/flush_icache.c b/machine/flush_icache.c
new file mode 100644
index 0000000..45ba204
--- /dev/null
+++ b/machine/flush_icache.c
@@ -0,0 +1,3 @@
+void __riscv_flush_icache(void) {
+  __asm__ volatile ("fence.i");
+}
diff --git a/machine/machine.mk.in b/machine/machine.mk.in
index dc8492f..625e5bf 100644
--- a/machine/machine.mk.in
+++ b/machine/machine.mk.in
@@ -28,6 +28,7 @@ machine_c_srcs = \
   uart.c \
   finisher.c \
   misaligned_ldst.c \
+  flush_icache.c \
 
 machine_asm_srcs = \
   mentry.S \
-- 
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