| Age | Commit message (Collapse) | Author | Files | Lines |
|---|
|
For eventual PMP purposes
|
|
|
|
This indicates the access is actually invalid, i.e., should not
be emulated.
|
|
This reverts commit 7bee30c1ff56975041ffc67cd0170d7477aba865.
All ones is no longer "reserved", so the old code is OK.
|
|
Fix the calculation for the number of interrupt enable words
|
|
The number of interrupt enable words should be the number of devices
divided by the number of bits per word (not the number of bytes per
word) and it should round up.
Without this fix, when using a larger number of interrupts,
the user will see a number of errors in qemu of the form:
plic: invalid register write: %08x
Signed-off-by: Logan Gunthorpe <logang@deltatee.com>
|
|
Fix stubs-lp64.h/stubs-lp64d.h/stubs-ilp32.h/stubs-ilp32d.h not found
|
|
|
|
A portend from git-submodule:
$ git submodule update --init --recursive
fatal: No url found for submodule path 'softfloat/berkeley-softfloat-3' in .gitmodules
|
|
|
|
Use a proxy syscall instead of a blocking character write.
Resolves #84
|
|
from m-mode. (#117)
|
|
bbl: boot payload in machine mode on --enable-boot-machine
|
|
For now, we always compile files with -mabi option by using
soft-fp ABI. But there are some files use the header which in
toolchain, like unistd.h, stdint.h and so on. Finally, these
header files include other header files which existing depend
on ABI such as stubs-lp64.h or stubs-lp64d.h. So it causes the
header file not found when using the double-float toolchain with
soft-float ABI.
Fix up by compiling files with -march and -mabi options only if
there is specifying the --with-arch option at configure time.
If use the --with-arch option at configure time, that means your
toolchain has multi-lib support, so always building riscv-pk
by soft-float ABI is fine. Otherwise, we don't compile files with
specifying march and mabi options explicitly
|
|
Currently it's being used by both enter_supervisor_mode and enter_machine_mode
|
|
|
|
If --enable-boot-machine is passed, BBL disables VM and runs the payload in machine mode.
This is useful for payloads (e.g. RTOSes or other OSes) that want to run
only in machine mode while still relying on bbl/pk for system calls and emulation
|
|
Upgrade SoftFloat
|
|
Include .bss section to the binary so dtb_output() gets full size of payload
|
|
Correct the comment of timer interrupt
|
|
|
|
|
|
|
|
|
|
|
|
Replace the --enable-32bit option by --with-arch
|
|
Get rid of the --enable-32bit option and switch to use --with-arch,
which is more standard because it matches the GCC build.
If --with-arch is not specified, it defaults to whatever the
compiler's default is.
The --with-abi is not necessary for this project.
Unconditionally compile it with a no-float ABI.
|
|
Can't cast to pointer from 64 bit size integer directly on 32 bit
environment.
|
|
RISC-V: Support separate firmware and kernel payload
|
|
Support for separate firmware and kernel payload is added
by updating BBL to read optional preloaded kernel address
attributes from device-tree using a similar mechanism to
that used to pass init ramdisk addresses to linux kernel.
chosen {
riscv,kernel-start = <0x00000000 0x80200000>;
riscv,kernel-end = <0x00000000 0x80590634>;
};
These attributes are added by QEMU and read by BBL when combining
-bios <firmware-image> and -kernel <kernel-image> options. e.g.
$ qemu-system-riscv64 -machine virt -bios bbl -kernel vmlinux
With this change, bbl can be compiled without --with-payload
and the dummy payload alignment is altered to make the memory
footprint of the firmware-only bbl smaller. The dummy payload
message is updated to indicate the alternative load method.
This load method could also be supported by a first stage boot
loader that reads seperate firmware and kernel from SPI flash.
The main advantage of this new mechanism is that it eases kernel
development by avoiding the riscv-pk packaging step after kernel
builds, makes building per repository artefacts for CI simpler,
and mimics bootloaders on other platforms that can load a kernel
image file directly. Ultimately BBL should use an SPI driver to
load the kernel image however this mechanism supports use cases
such such as QEMU's -bios, -kernel and -initrd options following
examples from other platforms that pass kernel entry to firmware
via device-tree.
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Alistair Francis <Alistair.Francis@wdc.com>
Signed-off-by: Michael Clark <mjc@sifive.com>
|
|
* If BBL emulates the FPU, the trap handler will load emulated FCSR from
x0's save slot into tp. The emulated FCSR should be initialized, else
the field of rounding mode will contain garbage codes. This will
lead to raising SIGABRT for a user mode program which tries to print a
floating point variable. In glibc, __printf_fp_l() (defined in
riscv-glibc/stdio-common/printf_fp.c) will call round_away() (defined
in riscv-glibc/include/rounding-mode.h). With a garbage rounding mode
in emulated FCSR, round_away() may call abort().
|
|
The E51 core on the U54-MC lacks supervisor mode, thus the plic_s_ie and plic_s_thresh are NULL when running on this core. This adds checks for this case.
|
|
|
|
|
|
Otherwise, the emulation code will refuse to emulate FP instructions.
|
|
|
|
The MENTRY_IPI_PENDING_OFFSET offset is based on stack pointer
|
|
of payload, in result DTB will not overlap with bss and will not
be zeroed by OS
|
|
Debian toolchain defaults to PIE, and I guess that will also be the case
of most distributions. This cause bbl to be non-functional.
This patch fixes that by adding -fno-PIE in the default CFLAGS.
|
|
Reboot does not work reliably without this.
|
|
* Changed install_subdir to $host_alias with substituted 64->32 instead of hardcoded riscv[32|64]-unknown-elf
* Updated readme to reflect changes in install_subdir.
|
|
Closes #87
|
|
Closes #88
|
|
Otherwise, linux complains the moment an interrupt arrives and
wakes up one of the not-looping cores.
|
|
This makes it more compatible with recent glibc.
|
|
mtrap: loop forever, really
|
|
gcc sometimes takes liberties with optimizing away our important halt function!
|
|
Boot on the first hart
|
|
This code is broken, and it's left over from before we could read the
DTB to find harts to boot on.
|
|
|
