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| author | Andrew Waterman <andrew@sifive.com> | 2017-03-23 12:55:40 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2017-03-23 12:55:40 -0700 |
| commit | fc1af65c1585b2a9ad1dd2cf1b50d552ee65c742 (patch) | |
| tree | 3b196759593cda8f7dd4f152c44683e91aaa2e2e | |
| parent | 23ab37ad78673166a8300584d177ace77fca5101 (diff) | |
| download | riscv-pk-fc1af65c1585b2a9ad1dd2cf1b50d552ee65c742.zip riscv-pk-fc1af65c1585b2a9ad1dd2cf1b50d552ee65c742.tar.gz riscv-pk-fc1af65c1585b2a9ad1dd2cf1b50d552ee65c742.tar.bz2 | |
Set up PMPs, permissively for now
| -rw-r--r-- | machine/minit.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/machine/minit.c b/machine/minit.c index f02f205..7083b05 100644 --- a/machine/minit.c +++ b/machine/minit.c @@ -145,6 +145,17 @@ void init_other_hart(uintptr_t hartid, uintptr_t dtb) void enter_supervisor_mode(void (*fn)(uintptr_t), uintptr_t arg0, uintptr_t arg1) { + // Set up a PMP to permit access to all of memory. + // Ignore the illegal-instruction trap if PMPs aren't supported. + uintptr_t pmpc = PMP_EN | PMP_NAPOT | PMP_M | PMP_R | PMP_W | PMP_X; + asm volatile ("la t0, 1f\n\t" + "csrrw t0, mtvec, t0\n\t" + "csrw pmpaddr0, %1\n\t" + "csrw pmpcfg0, %0\n\t" + ".align 2\n\t" + "1: csrw mtvec, t0" + : : "r" (pmpc), "r" (-1UL) : "t0"); + uintptr_t mstatus = read_csr(mstatus); mstatus = INSERT_FIELD(mstatus, MSTATUS_MPP, PRV_S); mstatus = INSERT_FIELD(mstatus, MSTATUS_MPIE, 0); |