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| author | Andrew Waterman <andrew@sifive.com> | 2017-05-04 17:07:15 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2017-05-04 17:07:15 -0700 |
| commit | 66701f82f88d08d3700d8b0bc5d5306abfd0044f (patch) | |
| tree | 15d0250c1b3f64d444d64453c15d4da5fd3e5921 | |
| parent | 3aebe0db7f08f0aeed154be9c78ea872c66fb1ec (diff) | |
| download | riscv-pk-66701f82f88d08d3700d8b0bc5d5306abfd0044f.zip riscv-pk-66701f82f88d08d3700d8b0bc5d5306abfd0044f.tar.gz riscv-pk-66701f82f88d08d3700d8b0bc5d5306abfd0044f.tar.bz2 | |
FMV.X.S/FMV.S.X -> FMV.X.W/FMV.W.X
| -rw-r--r-- | machine/encoding.h | 15 | ||||
| -rw-r--r-- | machine/fp_emulation.c | 4 |
2 files changed, 8 insertions, 11 deletions
diff --git a/machine/encoding.h b/machine/encoding.h index 55f8461..1463801 100644 --- a/machine/encoding.h +++ b/machine/encoding.h @@ -401,8 +401,6 @@ #define MASK_URET 0xffffffff #define MATCH_SRET 0x10200073 #define MASK_SRET 0xffffffff -#define MATCH_HRET 0x20200073 -#define MASK_HRET 0xffffffff #define MATCH_MRET 0x30200073 #define MASK_MRET 0xffffffff #define MATCH_DRET 0x7b200073 @@ -521,8 +519,8 @@ #define MASK_FCVT_L_S 0xfff0007f #define MATCH_FCVT_LU_S 0xc0300053 #define MASK_FCVT_LU_S 0xfff0007f -#define MATCH_FMV_X_S 0xe0000053 -#define MASK_FMV_X_S 0xfff0707f +#define MATCH_FMV_X_W 0xe0000053 +#define MASK_FMV_X_W 0xfff0707f #define MATCH_FCLASS_S 0xe0001053 #define MASK_FCLASS_S 0xfff0707f #define MATCH_FCVT_W_D 0xc2000053 @@ -557,8 +555,8 @@ #define MASK_FCVT_S_L 0xfff0007f #define MATCH_FCVT_S_LU 0xd0300053 #define MASK_FCVT_S_LU 0xfff0007f -#define MATCH_FMV_S_X 0xf0000053 -#define MASK_FMV_S_X 0xfff0707f +#define MATCH_FMV_W_X 0xf0000053 +#define MASK_FMV_W_X 0xfff0707f #define MATCH_FCVT_D_W 0xd2000053 #define MASK_FCVT_D_W 0xfff0007f #define MATCH_FCVT_D_WU 0xd2100053 @@ -1065,7 +1063,6 @@ DECLARE_INSN(ecall, MATCH_ECALL, MASK_ECALL) DECLARE_INSN(ebreak, MATCH_EBREAK, MASK_EBREAK) DECLARE_INSN(uret, MATCH_URET, MASK_URET) DECLARE_INSN(sret, MATCH_SRET, MASK_SRET) -DECLARE_INSN(hret, MATCH_HRET, MASK_HRET) DECLARE_INSN(mret, MATCH_MRET, MASK_MRET) DECLARE_INSN(dret, MATCH_DRET, MASK_DRET) DECLARE_INSN(sfence_vma, MATCH_SFENCE_VMA, MASK_SFENCE_VMA) @@ -1125,7 +1122,7 @@ DECLARE_INSN(fcvt_w_s, MATCH_FCVT_W_S, MASK_FCVT_W_S) DECLARE_INSN(fcvt_wu_s, MATCH_FCVT_WU_S, MASK_FCVT_WU_S) DECLARE_INSN(fcvt_l_s, MATCH_FCVT_L_S, MASK_FCVT_L_S) DECLARE_INSN(fcvt_lu_s, MATCH_FCVT_LU_S, MASK_FCVT_LU_S) -DECLARE_INSN(fmv_x_s, MATCH_FMV_X_S, MASK_FMV_X_S) +DECLARE_INSN(fmv_x_w, MATCH_FMV_X_W, MASK_FMV_X_W) DECLARE_INSN(fclass_s, MATCH_FCLASS_S, MASK_FCLASS_S) DECLARE_INSN(fcvt_w_d, MATCH_FCVT_W_D, MASK_FCVT_W_D) DECLARE_INSN(fcvt_wu_d, MATCH_FCVT_WU_D, MASK_FCVT_WU_D) @@ -1143,7 +1140,7 @@ DECLARE_INSN(fcvt_s_w, MATCH_FCVT_S_W, MASK_FCVT_S_W) DECLARE_INSN(fcvt_s_wu, MATCH_FCVT_S_WU, MASK_FCVT_S_WU) DECLARE_INSN(fcvt_s_l, MATCH_FCVT_S_L, MASK_FCVT_S_L) DECLARE_INSN(fcvt_s_lu, MATCH_FCVT_S_LU, MASK_FCVT_S_LU) -DECLARE_INSN(fmv_s_x, MATCH_FMV_S_X, MASK_FMV_S_X) +DECLARE_INSN(fmv_w_x, MATCH_FMV_W_X, MASK_FMV_W_X) DECLARE_INSN(fcvt_d_w, MATCH_FCVT_D_W, MASK_FCVT_D_W) DECLARE_INSN(fcvt_d_wu, MATCH_FCVT_D_WU, MASK_FCVT_D_WU) DECLARE_INSN(fcvt_d_l, MATCH_FCVT_D_L, MASK_FCVT_D_L) diff --git a/machine/fp_emulation.c b/machine/fp_emulation.c index 0bbe83c..ffa431b 100644 --- a/machine/fp_emulation.c +++ b/machine/fp_emulation.c @@ -344,7 +344,7 @@ DECLARE_EMULATION_FUNC(emulate_fmv_if) if (GET_PRECISION(insn) == PRECISION_S) { result = GET_F32_RS1(insn, regs); switch (GET_RM(insn)) { - case GET_RM(MATCH_FMV_X_S): break; + case GET_RM(MATCH_FMV_X_W): break; case GET_RM(MATCH_FCLASS_S): result = f32_classify(result); break; default: return truly_illegal_insn(regs, mcause, mepc, mstatus, insn); } @@ -367,7 +367,7 @@ DECLARE_EMULATION_FUNC(emulate_fmv_fi) { uintptr_t rs1 = GET_RS1(insn, regs); - if ((insn & MASK_FMV_S_X) == MATCH_FMV_S_X) + if ((insn & MASK_FMV_W_X) == MATCH_FMV_W_X) SET_F32_RD(insn, regs, rs1); #if __riscv_xlen == 64 else if ((insn & MASK_FMV_D_X) == MATCH_FMV_D_X) |