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| author | Andrew Waterman <andrew@sifive.com> | 2017-04-11 19:42:45 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2017-04-11 19:42:45 -0700 |
| commit | 3a3c1f5a1a797b8d054652c6a5eecc13699dee51 (patch) | |
| tree | 3b2d612787353e6b7bc5c08f620f43103d4fe344 | |
| parent | 8197cad40c5af8e4e315429be9f20aefbcc803ee (diff) | |
| download | riscv-pk-3a3c1f5a1a797b8d054652c6a5eecc13699dee51.zip riscv-pk-3a3c1f5a1a797b8d054652c6a5eecc13699dee51.tar.gz riscv-pk-3a3c1f5a1a797b8d054652c6a5eecc13699dee51.tar.bz2 | |
Load instructions as unsigned values, not signed
This matches the behavior of mbabaddr/mtval.
| -rw-r--r-- | machine/unprivileged_memory.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/machine/unprivileged_memory.h b/machine/unprivileged_memory.h index 6b84861..67ae98b 100644 --- a/machine/unprivileged_memory.h +++ b/machine/unprivileged_memory.h @@ -2,6 +2,7 @@ #define _RISCV_MISALIGNED_H #include "encoding.h" +#include "bits.h" #include <stdint.h> #define DECLARE_UNPRIVILEGED_LOAD_FUNCTION(type, insn) \ @@ -39,13 +40,12 @@ DECLARE_UNPRIVILEGED_LOAD_FUNCTION(int32_t, lw) DECLARE_UNPRIVILEGED_STORE_FUNCTION(uint8_t, sb) DECLARE_UNPRIVILEGED_STORE_FUNCTION(uint16_t, sh) DECLARE_UNPRIVILEGED_STORE_FUNCTION(uint32_t, sw) +DECLARE_UNPRIVILEGED_LOAD_FUNCTION(uint32_t, LWU) #if __riscv_xlen == 64 -DECLARE_UNPRIVILEGED_LOAD_FUNCTION(uint32_t, lwu) DECLARE_UNPRIVILEGED_LOAD_FUNCTION(uint64_t, ld) DECLARE_UNPRIVILEGED_STORE_FUNCTION(uint64_t, sd) DECLARE_UNPRIVILEGED_LOAD_FUNCTION(uintptr_t, ld) #else -DECLARE_UNPRIVILEGED_LOAD_FUNCTION(uint32_t, lw) DECLARE_UNPRIVILEGED_LOAD_FUNCTION(uintptr_t, lw) static inline uint64_t load_uint64_t(const uint64_t* addr, uintptr_t mepc) @@ -68,7 +68,7 @@ static uintptr_t __attribute__((always_inline)) get_insn(uintptr_t mepc, uintptr uintptr_t val; #ifndef __riscv_compressed asm ("csrrs %[mstatus], mstatus, %[mprv]\n" - "lw %[insn], (%[addr])\n" + STR(LWU) " %[insn], (%[addr])\n" "csrw mstatus, %[mstatus]" : [mstatus] "+&r" (__mstatus), [insn] "=&r" (val) : [mprv] "r" (MSTATUS_MPRV | MSTATUS_MXR), [addr] "r" (__mepc)); @@ -78,7 +78,7 @@ static uintptr_t __attribute__((always_inline)) get_insn(uintptr_t mepc, uintptr "lhu %[insn], (%[addr])\n" "and %[tmp], %[insn], %[rvc_mask]\n" "bne %[tmp], %[rvc_mask], 1f\n" - "lh %[tmp], 2(%[addr])\n" + "lhu %[tmp], 2(%[addr])\n" "sll %[tmp], %[tmp], 16\n" "add %[insn], %[insn], %[tmp]\n" "1: csrw mstatus, %[mstatus]" |