diff options
-rw-r--r-- | inst.v | 30 | ||||
-rw-r--r-- | opcodes | 38 | ||||
-rwxr-xr-x | parse-opcodes | 2 |
3 files changed, 70 insertions, 0 deletions
@@ -157,3 +157,33 @@ `define FMSUB_D 32'b?????_?????_?????_?????_???_01_1000111 `define FNMSUB_D 32'b?????_?????_?????_?????_???_01_1001011 `define FNMADD_D 32'b?????_?????_?????_?????_???_01_1001111 +`define LD_V 32'b?????_?????_00000_00000_000_11_0001011 +`define LW_V 32'b?????_?????_00000_00000_000_10_0001011 +`define LWU_V 32'b?????_?????_00000_00000_001_10_0001011 +`define LH_V 32'b?????_?????_00000_00000_000_01_0001011 +`define LHU_V 32'b?????_?????_00000_00000_001_01_0001011 +`define LB_V 32'b?????_?????_00000_00000_000_00_0001011 +`define LBU_V 32'b?????_?????_00000_00000_001_00_0001011 +`define SD_V 32'b00000_?????_00000_?????_010_11_0001011 +`define SW_V 32'b00000_?????_00000_?????_010_10_0001011 +`define SH_V 32'b00000_?????_00000_?????_010_01_0001011 +`define SB_V 32'b00000_?????_00000_?????_010_00_0001011 +`define FLD_V 32'b?????_?????_00000_00000_000_11_0001111 +`define FLW_V 32'b?????_?????_00000_00000_000_10_0001111 +`define FSD_V 32'b00000_?????_00000_?????_010_11_0001111 +`define FSW_V 32'b00000_?????_00000_?????_010_10_0001111 +`define LDST_V 32'b?????_?????_?????_00000_100_11_0001011 +`define LWST_V 32'b?????_?????_?????_00000_100_10_0001011 +`define LWUST_V 32'b?????_?????_?????_00000_101_10_0001011 +`define LHST_V 32'b?????_?????_?????_00000_100_01_0001011 +`define LHUST_V 32'b?????_?????_?????_00000_101_01_0001011 +`define LBST_V 32'b?????_?????_?????_00000_100_00_0001011 +`define LBUST_V 32'b?????_?????_?????_00000_101_00_0001011 +`define SDST_V 32'b00000_?????_?????_?????_110_11_0001011 +`define SWST_V 32'b00000_?????_?????_?????_110_10_0001011 +`define SHST_V 32'b00000_?????_?????_?????_110_01_0001011 +`define SBST_V 32'b00000_?????_?????_?????_110_00_0001011 +`define FLDST_V 32'b?????_?????_?????_00000_100_11_0001111 +`define FLWST_V 32'b?????_?????_?????_00000_100_10_0001111 +`define FSDST_V 32'b00000_?????_?????_?????_110_11_0001111 +`define FSWST_V 32'b00000_?????_?????_?????_110_10_0001111 @@ -203,3 +203,41 @@ fmadd.d rd rs1 rs2 rs3 rm 8..7=1 6..2=0x10 1..0=3 fmsub.d rd rs1 rs2 rs3 rm 8..7=1 6..2=0x11 1..0=3 fnmsub.d rd rs1 rs2 rs3 rm 8..7=1 6..2=0x12 1..0=3 fnmadd.d rd rs1 rs2 rs3 rm 8..7=1 6..2=0x13 1..0=3 + +ld.v rd rs1 21..17=0 16..12=0 11=0 10=0 9=0 8..7=3 6..2=0x02 1..0=3 +lw.v rd rs1 21..17=0 16..12=0 11=0 10=0 9=0 8..7=2 6..2=0x02 1..0=3 +lwu.v rd rs1 21..17=0 16..12=0 11=0 10=0 9=1 8..7=2 6..2=0x02 1..0=3 +lh.v rd rs1 21..17=0 16..12=0 11=0 10=0 9=0 8..7=1 6..2=0x02 1..0=3 +lhu.v rd rs1 21..17=0 16..12=0 11=0 10=0 9=1 8..7=1 6..2=0x02 1..0=3 +lb.v rd rs1 21..17=0 16..12=0 11=0 10=0 9=0 8..7=0 6..2=0x02 1..0=3 +lbu.v rd rs1 21..17=0 16..12=0 11=0 10=0 9=1 8..7=0 6..2=0x02 1..0=3 + +sd.v 31..27=0 rs1 21..17=0 rs3 11=0 10=1 9=0 8..7=3 6..2=0x02 1..0=3 +sw.v 31..27=0 rs1 21..17=0 rs3 11=0 10=1 9=0 8..7=2 6..2=0x02 1..0=3 +sh.v 31..27=0 rs1 21..17=0 rs3 11=0 10=1 9=0 8..7=1 6..2=0x02 1..0=3 +sb.v 31..27=0 rs1 21..17=0 rs3 11=0 10=1 9=0 8..7=0 6..2=0x02 1..0=3 + +fld.v rd rs1 21..17=0 16..12=0 11=0 10=0 9=0 8..7=3 6..2=0x03 1..0=3 +flw.v rd rs1 21..17=0 16..12=0 11=0 10=0 9=0 8..7=2 6..2=0x03 1..0=3 + +fsd.v 31..27=0 rs1 21..17=0 rs3 11=0 10=1 9=0 8..7=3 6..2=0x03 1..0=3 +fsw.v 31..27=0 rs1 21..17=0 rs3 11=0 10=1 9=0 8..7=2 6..2=0x03 1..0=3 + +ldst.v rd rs1 rs2 16..12=0 11=1 10=0 9=0 8..7=3 6..2=0x02 1..0=3 +lwst.v rd rs1 rs2 16..12=0 11=1 10=0 9=0 8..7=2 6..2=0x02 1..0=3 +lwust.v rd rs1 rs2 16..12=0 11=1 10=0 9=1 8..7=2 6..2=0x02 1..0=3 +lhst.v rd rs1 rs2 16..12=0 11=1 10=0 9=0 8..7=1 6..2=0x02 1..0=3 +lhust.v rd rs1 rs2 16..12=0 11=1 10=0 9=1 8..7=1 6..2=0x02 1..0=3 +lbst.v rd rs1 rs2 16..12=0 11=1 10=0 9=0 8..7=0 6..2=0x02 1..0=3 +lbust.v rd rs1 rs2 16..12=0 11=1 10=0 9=1 8..7=0 6..2=0x02 1..0=3 + +sdst.v 31..27=0 rs1 rs2 rs3 11=1 10=1 9=0 8..7=3 6..2=0x02 1..0=3 +swst.v 31..27=0 rs1 rs2 rs3 11=1 10=1 9=0 8..7=2 6..2=0x02 1..0=3 +shst.v 31..27=0 rs1 rs2 rs3 11=1 10=1 9=0 8..7=1 6..2=0x02 1..0=3 +sbst.v 31..27=0 rs1 rs2 rs3 11=1 10=1 9=0 8..7=0 6..2=0x02 1..0=3 + +fldst.v rd rs1 rs2 16..12=0 11=1 10=0 9=0 8..7=3 6..2=0x03 1..0=3 +flwst.v rd rs1 rs2 16..12=0 11=1 10=0 9=0 8..7=2 6..2=0x03 1..0=3 + +fsdst.v 31..27=0 rs1 rs2 rs3 11=1 10=1 9=0 8..7=3 6..2=0x03 1..0=3 +fswst.v 31..27=0 rs1 rs2 rs3 11=1 10=1 9=0 8..7=2 6..2=0x03 1..0=3 diff --git a/parse-opcodes b/parse-opcodes index 78ff655..505a5e3 100755 --- a/parse-opcodes +++ b/parse-opcodes @@ -41,6 +41,8 @@ typelut[0x27] = 4 typelut[0x2F] = 4 typelut[0x77] = 4 typelut[0x07] = 3 +typelut[0x0B] = 5 +typelut[0x0f] = 5 typelut[0x27] = 10 typelut[0x53] = 9 typelut[0x43] = 8 |