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authorColin Schmidt <colins@eecs.berkeley.edu>2018-10-10 12:43:57 -0700
committerColin Schmidt <colins@eecs.berkeley.edu>2018-10-10 12:43:57 -0700
commit174aaae3bd5f7369248149a2db6bad791b83cea7 (patch)
tree63ee156a014cc1094a0d80c25522b357cc44407e
parentca36c1c738a9b5cd734f9024069cb998f3a08c22 (diff)
downloadriscv-opcodes-174aaae3bd5f7369248149a2db6bad791b83cea7.zip
riscv-opcodes-174aaae3bd5f7369248149a2db6bad791b83cea7.tar.gz
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New encoding proposal
-rw-r--r--Makefile3
-rw-r--r--opcodes-v489
-rwxr-xr-xparse-opcodes214
3 files changed, 581 insertions, 125 deletions
diff --git a/Makefile b/Makefile
index e3a7b16..4a54dcd 100644
--- a/Makefile
+++ b/Makefile
@@ -20,6 +20,9 @@ inst.chisel: $(ALL_OPCODES) parse-opcodes
inst.go: opcodes opcodes-pseudo parse-opcodes
cat opcodes opcodes-pseudo | ./parse-opcodes -go > $@
+inst-table.adoc: opcodes-v parse-opcodes
+ cat opcodes-v | ./parse-opcodes -vecadoc > $@
+
instr-table.tex: $(ALL_OPCODES) parse-opcodes
cat opcodes opcodes-pseudo opcodes-v | ./parse-opcodes -tex > $@
diff --git a/opcodes-v b/opcodes-v
index a8bd005..38bc5f2 100644
--- a/opcodes-v
+++ b/opcodes-v
@@ -1,10 +1,251 @@
# Vector loads & stores
-vld m vd rs1 24..20=0 vlimm 26..25=0 14=1 6..0=0x07
-vlds m vd rs1 rs2 vlimm 26..25=1 14=1 6..0=0x07
-vldx m vd rs1 vs2 vlimm 26..25=2 14=1 6..0=0x07
-vst m vs3 rs1 24..20=0 vsimm 26..25=0 14=1 6..0=0x27
-vsts m vs3 rs1 rs2 vsimm 26..25=1 14=1 6..0=0x27
-vstx m vs3 rs1 vs2 vsimm 26..25=2 14=1 6..0=0x27
+# TODO Colin split up
+# Overlaid on FP load and store opcode
+# 7 integer load types and 4 fp loads * 3 types(unit,stride,index)
+# masks are not cleanly encodable so
+# 14 encodes predicatable or not
+# 14..12=0b000 which would be flb(doesn't exist)
+# will be scalar shape vector loads
+# 14..12=0b1xx where xx!=00 are the normal v1.t,v1.f
+vlb.s vd rs1 24..20=0 vlimm 30..27=0x0 26..25=0 14..12=0 6..0=0x07
+vlb vd rs1 24..20=0 vlimm 30..27=0x0 26..25=0 14..12=5 6..0=0x07
+vlb.f vd rs1 24..20=0 vlimm 30..27=0x0 26..25=0 14..12=6 6..0=0x07
+vlb.t vd rs1 24..20=0 vlimm 30..27=0x0 26..25=0 14..12=7 6..0=0x07
+vlh.s vd rs1 24..20=0 vlimm 30..27=0x1 26..25=0 14..12=0 6..0=0x07
+vlh vd rs1 24..20=0 vlimm 30..27=0x1 26..25=0 14..12=5 6..0=0x07
+vlh.f vd rs1 24..20=0 vlimm 30..27=0x1 26..25=0 14..12=6 6..0=0x07
+vlh.t vd rs1 24..20=0 vlimm 30..27=0x1 26..25=0 14..12=7 6..0=0x07
+vlw.s vd rs1 24..20=0 vlimm 30..27=0x2 26..25=0 14..12=0 6..0=0x07
+vlw vd rs1 24..20=0 vlimm 30..27=0x2 26..25=0 14..12=5 6..0=0x07
+vlw.f vd rs1 24..20=0 vlimm 30..27=0x2 26..25=0 14..12=6 6..0=0x07
+vlw.t vd rs1 24..20=0 vlimm 30..27=0x2 26..25=0 14..12=7 6..0=0x07
+vld.s vd rs1 24..20=0 vlimm 30..27=0x3 26..25=0 14..12=0 6..0=0x07
+vld vd rs1 24..20=0 vlimm 30..27=0x3 26..25=0 14..12=5 6..0=0x07
+vld.f vd rs1 24..20=0 vlimm 30..27=0x3 26..25=0 14..12=6 6..0=0x07
+vld.t vd rs1 24..20=0 vlimm 30..27=0x3 26..25=0 14..12=7 6..0=0x07
+vlbu.s vd rs1 24..20=0 vlimm 30..27=0x4 26..25=0 14..12=0 6..0=0x07
+vlbu vd rs1 24..20=0 vlimm 30..27=0x4 26..25=0 14..12=5 6..0=0x07
+vlbu.f vd rs1 24..20=0 vlimm 30..27=0x4 26..25=0 14..12=6 6..0=0x07
+vlbu.t vd rs1 24..20=0 vlimm 30..27=0x4 26..25=0 14..12=7 6..0=0x07
+vlhu.s vd rs1 24..20=0 vlimm 30..27=0x5 26..25=0 14..12=0 6..0=0x07
+vlhu vd rs1 24..20=0 vlimm 30..27=0x5 26..25=0 14..12=5 6..0=0x07
+vlhu.f vd rs1 24..20=0 vlimm 30..27=0x5 26..25=0 14..12=6 6..0=0x07
+vlhu.t vd rs1 24..20=0 vlimm 30..27=0x5 26..25=0 14..12=7 6..0=0x07
+vlwu.s vd rs1 24..20=0 vlimm 30..27=0x6 26..25=0 14..12=0 6..0=0x07
+vlwu vd rs1 24..20=0 vlimm 30..27=0x6 26..25=0 14..12=5 6..0=0x07
+vlwu.f vd rs1 24..20=0 vlimm 30..27=0x6 26..25=0 14..12=6 6..0=0x07
+vlwu.t vd rs1 24..20=0 vlimm 30..27=0x6 26..25=0 14..12=7 6..0=0x07
+
+vlsb.s vd rs1 rs2 vlimm 30..27=0x0 26..25=1 14..12=0 6..0=0x07
+vlsb vd rs1 rs2 vlimm 30..27=0x0 26..25=1 14..12=5 6..0=0x07
+vlsb.f vd rs1 rs2 vlimm 30..27=0x0 26..25=1 14..12=6 6..0=0x07
+vlsb.t vd rs1 rs2 vlimm 30..27=0x0 26..25=1 14..12=7 6..0=0x07
+vlsh.s vd rs1 rs2 vlimm 30..27=0x1 26..25=1 14..12=0 6..0=0x07
+vlsh vd rs1 rs2 vlimm 30..27=0x1 26..25=1 14..12=5 6..0=0x07
+vlsh.f vd rs1 rs2 vlimm 30..27=0x1 26..25=1 14..12=6 6..0=0x07
+vlsh.t vd rs1 rs2 vlimm 30..27=0x1 26..25=1 14..12=7 6..0=0x07
+vlsw.s vd rs1 rs2 vlimm 30..27=0x2 26..25=1 14..12=0 6..0=0x07
+vlsw vd rs1 rs2 vlimm 30..27=0x2 26..25=1 14..12=5 6..0=0x07
+vlsw.f vd rs1 rs2 vlimm 30..27=0x2 26..25=1 14..12=6 6..0=0x07
+vlsw.t vd rs1 rs2 vlimm 30..27=0x2 26..25=1 14..12=7 6..0=0x07
+vlsd.s vd rs1 rs2 vlimm 30..27=0x3 26..25=1 14..12=0 6..0=0x07
+vlsd vd rs1 rs2 vlimm 30..27=0x3 26..25=1 14..12=5 6..0=0x07
+vlsd.f vd rs1 rs2 vlimm 30..27=0x3 26..25=1 14..12=6 6..0=0x07
+vlsd.t vd rs1 rs2 vlimm 30..27=0x3 26..25=1 14..12=7 6..0=0x07
+vlsbu.s vd rs1 rs2 vlimm 30..27=0x4 26..25=1 14..12=0 6..0=0x07
+vlsbu vd rs1 rs2 vlimm 30..27=0x4 26..25=1 14..12=5 6..0=0x07
+vlsbu.f vd rs1 rs2 vlimm 30..27=0x4 26..25=1 14..12=6 6..0=0x07
+vlsbu.t vd rs1 rs2 vlimm 30..27=0x4 26..25=1 14..12=7 6..0=0x07
+vlshu.s vd rs1 rs2 vlimm 30..27=0x5 26..25=1 14..12=0 6..0=0x07
+vlshu vd rs1 rs2 vlimm 30..27=0x5 26..25=1 14..12=5 6..0=0x07
+vlshu.f vd rs1 rs2 vlimm 30..27=0x5 26..25=1 14..12=6 6..0=0x07
+vlshu.t vd rs1 rs2 vlimm 30..27=0x5 26..25=1 14..12=7 6..0=0x07
+vlswu.s vd rs1 rs2 vlimm 30..27=0x6 26..25=1 14..12=0 6..0=0x07
+vlswu vd rs1 rs2 vlimm 30..27=0x6 26..25=1 14..12=5 6..0=0x07
+vlswu.f vd rs1 rs2 vlimm 30..27=0x6 26..25=1 14..12=6 6..0=0x07
+vlswu.t vd rs1 rs2 vlimm 30..27=0x6 26..25=1 14..12=7 6..0=0x07
+
+vlxb.s vd rs1 vs2 vlimm 30..27=0x0 26..25=2 14..12=0 6..0=0x07
+vlxb vd rs1 vs2 vlimm 30..27=0x0 26..25=2 14..12=5 6..0=0x07
+vlxb.f vd rs1 vs2 vlimm 30..27=0x0 26..25=2 14..12=6 6..0=0x07
+vlxb.t vd rs1 vs2 vlimm 30..27=0x0 26..25=2 14..12=7 6..0=0x07
+vlxh.s vd rs1 vs2 vlimm 30..27=0x1 26..25=2 14..12=0 6..0=0x07
+vlxh vd rs1 vs2 vlimm 30..27=0x1 26..25=2 14..12=5 6..0=0x07
+vlxh.f vd rs1 vs2 vlimm 30..27=0x1 26..25=2 14..12=6 6..0=0x07
+vlxh.t vd rs1 vs2 vlimm 30..27=0x1 26..25=2 14..12=7 6..0=0x07
+vlxw.s vd rs1 vs2 vlimm 30..27=0x2 26..25=2 14..12=0 6..0=0x07
+vlxw vd rs1 vs2 vlimm 30..27=0x2 26..25=2 14..12=5 6..0=0x07
+vlxw.f vd rs1 vs2 vlimm 30..27=0x2 26..25=2 14..12=6 6..0=0x07
+vlxw.t vd rs1 vs2 vlimm 30..27=0x2 26..25=2 14..12=7 6..0=0x07
+vlxd.s vd rs1 vs2 vlimm 30..27=0x3 26..25=2 14..12=0 6..0=0x07
+vlxd vd rs1 vs2 vlimm 30..27=0x3 26..25=2 14..12=5 6..0=0x07
+vlxd.f vd rs1 vs2 vlimm 30..27=0x3 26..25=2 14..12=6 6..0=0x07
+vlxd.t vd rs1 vs2 vlimm 30..27=0x3 26..25=2 14..12=7 6..0=0x07
+vlxbu.s vd rs1 vs2 vlimm 30..27=0x4 26..25=2 14..12=0 6..0=0x07
+vlxbu vd rs1 vs2 vlimm 30..27=0x4 26..25=2 14..12=5 6..0=0x07
+vlxbu.f vd rs1 vs2 vlimm 30..27=0x4 26..25=2 14..12=6 6..0=0x07
+vlxbu.t vd rs1 vs2 vlimm 30..27=0x4 26..25=2 14..12=7 6..0=0x07
+vlxhu.s vd rs1 vs2 vlimm 30..27=0x5 26..25=2 14..12=0 6..0=0x07
+vlxhu vd rs1 vs2 vlimm 30..27=0x5 26..25=2 14..12=5 6..0=0x07
+vlxhu.f vd rs1 vs2 vlimm 30..27=0x5 26..25=2 14..12=6 6..0=0x07
+vlxhu.t vd rs1 vs2 vlimm 30..27=0x5 26..25=2 14..12=7 6..0=0x07
+vlxwu.s vd rs1 vs2 vlimm 30..27=0x6 26..25=2 14..12=0 6..0=0x07
+vlxwu vd rs1 vs2 vlimm 30..27=0x6 26..25=2 14..12=5 6..0=0x07
+vlxwu.f vd rs1 vs2 vlimm 30..27=0x6 26..25=2 14..12=6 6..0=0x07
+vlxwu.t vd rs1 vs2 vlimm 30..27=0x6 26..25=2 14..12=7 6..0=0x07
+
+vlfh.s vd rs1 24..20=0 vlimm 30..27=0x8 26..25=0 14..12=0 6..0=0x07
+vlfh vd rs1 24..20=0 vlimm 30..27=0x8 26..25=0 14..12=5 6..0=0x07
+vlfh.f vd rs1 24..20=0 vlimm 30..27=0x8 26..25=0 14..12=6 6..0=0x07
+vlfh.t vd rs1 24..20=0 vlimm 30..27=0x8 26..25=0 14..12=7 6..0=0x07
+vlfs.s vd rs1 24..20=0 vlimm 30..27=0x9 26..25=0 14..12=0 6..0=0x07
+vlfs vd rs1 24..20=0 vlimm 30..27=0x9 26..25=0 14..12=5 6..0=0x07
+vlfs.f vd rs1 24..20=0 vlimm 30..27=0x9 26..25=0 14..12=6 6..0=0x07
+vlfs.t vd rs1 24..20=0 vlimm 30..27=0x9 26..25=0 14..12=7 6..0=0x07
+vlfd.s vd rs1 24..20=0 vlimm 30..27=0xa 26..25=0 14..12=0 6..0=0x07
+vlfd vd rs1 24..20=0 vlimm 30..27=0xa 26..25=0 14..12=5 6..0=0x07
+vlfd.f vd rs1 24..20=0 vlimm 30..27=0xa 26..25=0 14..12=6 6..0=0x07
+vlfd.t vd rs1 24..20=0 vlimm 30..27=0xa 26..25=0 14..12=7 6..0=0x07
+vlfq.s vd rs1 24..20=0 vlimm 30..27=0xb 26..25=0 14..12=0 6..0=0x07
+vlfq vd rs1 24..20=0 vlimm 30..27=0xb 26..25=0 14..12=5 6..0=0x07
+vlfq.f vd rs1 24..20=0 vlimm 30..27=0xb 26..25=0 14..12=6 6..0=0x07
+vlfq.t vd rs1 24..20=0 vlimm 30..27=0xb 26..25=0 14..12=7 6..0=0x07
+
+vlsfh.s vd rs1 rs2 vlimm 30..27=0x8 26..25=1 14..12=0 6..0=0x07
+vlsfh vd rs1 rs2 vlimm 30..27=0x8 26..25=1 14..12=5 6..0=0x07
+vlsfh.f vd rs1 rs2 vlimm 30..27=0x8 26..25=1 14..12=6 6..0=0x07
+vlsfh.t vd rs1 rs2 vlimm 30..27=0x8 26..25=1 14..12=7 6..0=0x07
+vlsfs.s vd rs1 rs2 vlimm 30..27=0x9 26..25=1 14..12=0 6..0=0x07
+vlsfs vd rs1 rs2 vlimm 30..27=0x9 26..25=1 14..12=5 6..0=0x07
+vlsfs.f vd rs1 rs2 vlimm 30..27=0x9 26..25=1 14..12=6 6..0=0x07
+vlsfs.t vd rs1 rs2 vlimm 30..27=0x9 26..25=1 14..12=7 6..0=0x07
+vlsfd.s vd rs1 rs2 vlimm 30..27=0xa 26..25=1 14..12=0 6..0=0x07
+vlsfd vd rs1 rs2 vlimm 30..27=0xa 26..25=1 14..12=5 6..0=0x07
+vlsfd.f vd rs1 rs2 vlimm 30..27=0xa 26..25=1 14..12=6 6..0=0x07
+vlsfd.t vd rs1 rs2 vlimm 30..27=0xa 26..25=1 14..12=7 6..0=0x07
+vlsfq.s vd rs1 rs2 vlimm 30..27=0xb 26..25=1 14..12=0 6..0=0x07
+vlsfq vd rs1 rs2 vlimm 30..27=0xb 26..25=1 14..12=5 6..0=0x07
+vlsfq.f vd rs1 rs2 vlimm 30..27=0xb 26..25=1 14..12=6 6..0=0x07
+vlsfq.t vd rs1 rs2 vlimm 30..27=0xb 26..25=1 14..12=7 6..0=0x07
+
+vlxfh.s vd rs1 vs2 vlimm 30..27=0x8 26..25=2 14..12=0 6..0=0x07
+vlxfh vd rs1 vs2 vlimm 30..27=0x8 26..25=2 14..12=5 6..0=0x07
+vlxfh.f vd rs1 vs2 vlimm 30..27=0x8 26..25=2 14..12=6 6..0=0x07
+vlxfh.t vd rs1 vs2 vlimm 30..27=0x8 26..25=2 14..12=7 6..0=0x07
+vlxfs.s vd rs1 vs2 vlimm 30..27=0x9 26..25=2 14..12=0 6..0=0x07
+vlxfs vd rs1 vs2 vlimm 30..27=0x9 26..25=2 14..12=5 6..0=0x07
+vlxfs.f vd rs1 vs2 vlimm 30..27=0x9 26..25=2 14..12=6 6..0=0x07
+vlxfs.t vd rs1 vs2 vlimm 30..27=0x9 26..25=2 14..12=7 6..0=0x07
+vlxfd.s vd rs1 vs2 vlimm 30..27=0xa 26..25=2 14..12=0 6..0=0x07
+vlxfd vd rs1 vs2 vlimm 30..27=0xa 26..25=2 14..12=5 6..0=0x07
+vlxfd.f vd rs1 vs2 vlimm 30..27=0xa 26..25=2 14..12=6 6..0=0x07
+vlxfd.t vd rs1 vs2 vlimm 30..27=0xa 26..25=2 14..12=7 6..0=0x07
+vlxfq.s vd rs1 vs2 vlimm 30..27=0xb 26..25=2 14..12=0 6..0=0x07
+vlxfq vd rs1 vs2 vlimm 30..27=0xb 26..25=2 14..12=5 6..0=0x07
+vlxfq.f vd rs1 vs2 vlimm 30..27=0xb 26..25=2 14..12=6 6..0=0x07
+vlxfq.t vd rs1 vs2 vlimm 30..27=0xb 26..25=2 14..12=7 6..0=0x07
+
+vsb.s vs3 rs1 24..20=0 vsimm 9..7=0x0 26..25=0 14..12=0 6..0=0x27
+vsb vs3 rs1 24..20=0 vsimm 9..7=0x0 26..25=0 14..12=5 6..0=0x27
+vsb.f vs3 rs1 24..20=0 vsimm 9..7=0x0 26..25=0 14..12=6 6..0=0x27
+vsb.t vs3 rs1 24..20=0 vsimm 9..7=0x0 26..25=0 14..12=7 6..0=0x27
+vsh.s vs3 rs1 24..20=0 vsimm 9..7=0x1 26..25=0 14..12=0 6..0=0x27
+vsh vs3 rs1 24..20=0 vsimm 9..7=0x1 26..25=0 14..12=5 6..0=0x27
+vsh.f vs3 rs1 24..20=0 vsimm 9..7=0x1 26..25=0 14..12=6 6..0=0x27
+vsh.t vs3 rs1 24..20=0 vsimm 9..7=0x1 26..25=0 14..12=7 6..0=0x27
+vsw.s vs3 rs1 24..20=0 vsimm 9..7=0x2 26..25=0 14..12=0 6..0=0x27
+vsw vs3 rs1 24..20=0 vsimm 9..7=0x2 26..25=0 14..12=5 6..0=0x27
+vsw.f vs3 rs1 24..20=0 vsimm 9..7=0x2 26..25=0 14..12=6 6..0=0x27
+vsw.t vs3 rs1 24..20=0 vsimm 9..7=0x2 26..25=0 14..12=7 6..0=0x27
+vsd.s vs3 rs1 24..20=0 vsimm 9..7=0x3 26..25=0 14..12=0 6..0=0x27
+vsd vs3 rs1 24..20=0 vsimm 9..7=0x3 26..25=0 14..12=5 6..0=0x27
+vsd.f vs3 rs1 24..20=0 vsimm 9..7=0x3 26..25=0 14..12=6 6..0=0x27
+vsd.t vs3 rs1 24..20=0 vsimm 9..7=0x3 26..25=0 14..12=7 6..0=0x27
+
+vssb.s vs3 rs1 24..20=0 vsimm 9..7=0x0 26..25=1 14..12=0 6..0=0x27
+vssb vs3 rs1 24..20=0 vsimm 9..7=0x0 26..25=1 14..12=5 6..0=0x27
+vssb.f vs3 rs1 24..20=0 vsimm 9..7=0x0 26..25=1 14..12=6 6..0=0x27
+vssb.t vs3 rs1 24..20=0 vsimm 9..7=0x0 26..25=1 14..12=7 6..0=0x27
+vssh.s vs3 rs1 24..20=0 vsimm 9..7=0x1 26..25=1 14..12=0 6..0=0x27
+vssh vs3 rs1 24..20=0 vsimm 9..7=0x1 26..25=1 14..12=5 6..0=0x27
+vssh.f vs3 rs1 24..20=0 vsimm 9..7=0x1 26..25=1 14..12=6 6..0=0x27
+vssh.t vs3 rs1 24..20=0 vsimm 9..7=0x1 26..25=1 14..12=7 6..0=0x27
+vssw.s vs3 rs1 24..20=0 vsimm 9..7=0x2 26..25=1 14..12=0 6..0=0x27
+vssw vs3 rs1 24..20=0 vsimm 9..7=0x2 26..25=1 14..12=5 6..0=0x27
+vssw.f vs3 rs1 24..20=0 vsimm 9..7=0x2 26..25=1 14..12=6 6..0=0x27
+vssw.t vs3 rs1 24..20=0 vsimm 9..7=0x2 26..25=1 14..12=7 6..0=0x27
+vssd.s vs3 rs1 24..20=0 vsimm 9..7=0x3 26..25=1 14..12=0 6..0=0x27
+vssd vs3 rs1 24..20=0 vsimm 9..7=0x3 26..25=1 14..12=5 6..0=0x27
+vssd.f vs3 rs1 24..20=0 vsimm 9..7=0x3 26..25=1 14..12=6 6..0=0x27
+vssd.t vs3 rs1 24..20=0 vsimm 9..7=0x3 26..25=1 14..12=7 6..0=0x27
+
+vsxb.s vs3 rs1 24..20=0 vsimm 9..7=0x0 26..25=2 14..12=0 6..0=0x27
+vsxb vs3 rs1 24..20=0 vsimm 9..7=0x0 26..25=2 14..12=5 6..0=0x27
+vsxb.f vs3 rs1 24..20=0 vsimm 9..7=0x0 26..25=2 14..12=6 6..0=0x27
+vsxb.t vs3 rs1 24..20=0 vsimm 9..7=0x0 26..25=2 14..12=7 6..0=0x27
+vsxh.s vs3 rs1 24..20=0 vsimm 9..7=0x1 26..25=2 14..12=0 6..0=0x27
+vsxh vs3 rs1 24..20=0 vsimm 9..7=0x1 26..25=2 14..12=5 6..0=0x27
+vsxh.f vs3 rs1 24..20=0 vsimm 9..7=0x1 26..25=2 14..12=6 6..0=0x27
+vsxh.t vs3 rs1 24..20=0 vsimm 9..7=0x1 26..25=2 14..12=7 6..0=0x27
+vsxw.s vs3 rs1 24..20=0 vsimm 9..7=0x2 26..25=2 14..12=0 6..0=0x27
+vsxw vs3 rs1 24..20=0 vsimm 9..7=0x2 26..25=2 14..12=5 6..0=0x27
+vsxw.f vs3 rs1 24..20=0 vsimm 9..7=0x2 26..25=2 14..12=6 6..0=0x27
+vsxw.t vs3 rs1 24..20=0 vsimm 9..7=0x2 26..25=2 14..12=7 6..0=0x27
+vsxd.s vs3 rs1 24..20=0 vsimm 9..7=0x3 26..25=2 14..12=0 6..0=0x27
+vsxd vs3 rs1 24..20=0 vsimm 9..7=0x3 26..25=2 14..12=5 6..0=0x27
+vsxd.f vs3 rs1 24..20=0 vsimm 9..7=0x3 26..25=2 14..12=6 6..0=0x27
+vsxd.t vs3 rs1 24..20=0 vsimm 9..7=0x3 26..25=2 14..12=7 6..0=0x27
+
+vsfh.s vs3 rs1 24..20=0 vsimm 9..7=0x4 26..25=0 14..12=0 6..0=0x27
+vsfh vs3 rs1 24..20=0 vsimm 9..7=0x4 26..25=0 14..12=5 6..0=0x27
+vsfh.f vs3 rs1 24..20=0 vsimm 9..7=0x4 26..25=0 14..12=6 6..0=0x27
+vsfh.t vs3 rs1 24..20=0 vsimm 9..7=0x4 26..25=0 14..12=7 6..0=0x27
+vsfs.s vs3 rs1 24..20=0 vsimm 9..7=0x5 26..25=0 14..12=0 6..0=0x27
+vsfs vs3 rs1 24..20=0 vsimm 9..7=0x5 26..25=0 14..12=5 6..0=0x27
+vsfs.f vs3 rs1 24..20=0 vsimm 9..7=0x5 26..25=0 14..12=6 6..0=0x27
+vsfs.t vs3 rs1 24..20=0 vsimm 9..7=0x5 26..25=0 14..12=7 6..0=0x27
+vsfd.s vs3 rs1 24..20=0 vsimm 9..7=0x6 26..25=0 14..12=0 6..0=0x27
+vsfd vs3 rs1 24..20=0 vsimm 9..7=0x6 26..25=0 14..12=5 6..0=0x27
+vsfd.f vs3 rs1 24..20=0 vsimm 9..7=0x6 26..25=0 14..12=6 6..0=0x27
+vsfd.t vs3 rs1 24..20=0 vsimm 9..7=0x6 26..25=0 14..12=7 6..0=0x27
+vsfq.s vs3 rs1 24..20=0 vsimm 9..7=0x7 26..25=0 14..12=0 6..0=0x27
+vsfq vs3 rs1 24..20=0 vsimm 9..7=0x7 26..25=0 14..12=5 6..0=0x27
+vsfq.f vs3 rs1 24..20=0 vsimm 9..7=0x7 26..25=0 14..12=6 6..0=0x27
+vsfq.t vs3 rs1 24..20=0 vsimm 9..7=0x7 26..25=0 14..12=7 6..0=0x27
+
+vssfh.s vs3 rs1 rs2 vsimm 9..7=0x4 26..25=1 14..12=0 6..0=0x27
+vssfh vs3 rs1 rs2 vsimm 9..7=0x4 26..25=1 14..12=5 6..0=0x27
+vssfh.f vs3 rs1 rs2 vsimm 9..7=0x4 26..25=1 14..12=6 6..0=0x27
+vssfh.t vs3 rs1 rs2 vsimm 9..7=0x4 26..25=1 14..12=7 6..0=0x27
+vssfs.s vs3 rs1 rs2 vsimm 9..7=0x5 26..25=1 14..12=0 6..0=0x27
+vssfs vs3 rs1 rs2 vsimm 9..7=0x5 26..25=1 14..12=5 6..0=0x27
+vssfs.f vs3 rs1 rs2 vsimm 9..7=0x5 26..25=1 14..12=6 6..0=0x27
+vssfs.t vs3 rs1 rs2 vsimm 9..7=0x5 26..25=1 14..12=7 6..0=0x27
+vssfd.s vs3 rs1 rs2 vsimm 9..7=0x6 26..25=1 14..12=0 6..0=0x27
+vssfd vs3 rs1 rs2 vsimm 9..7=0x6 26..25=1 14..12=5 6..0=0x27
+vssfd.f vs3 rs1 rs2 vsimm 9..7=0x6 26..25=1 14..12=6 6..0=0x27
+vssfd.t vs3 rs1 rs2 vsimm 9..7=0x6 26..25=1 14..12=7 6..0=0x27
+vssfq.s vs3 rs1 rs2 vsimm 9..7=0x7 26..25=1 14..12=0 6..0=0x27
+vssfq vs3 rs1 rs2 vsimm 9..7=0x7 26..25=1 14..12=5 6..0=0x27
+vssfq.f vs3 rs1 rs2 vsimm 9..7=0x7 26..25=1 14..12=6 6..0=0x27
+vssfq.t vs3 rs1 rs2 vsimm 9..7=0x7 26..25=1 14..12=7 6..0=0x27
+
+vsxfh.s vs3 rs1 vs2 vsimm 9..7=0x4 26..25=2 14..12=0 6..0=0x27
+vsxfh vs3 rs1 vs2 vsimm 9..7=0x4 26..25=2 14..12=5 6..0=0x27
+vsxfh.f vs3 rs1 vs2 vsimm 9..7=0x4 26..25=2 14..12=6 6..0=0x27
+vsxfh.t vs3 rs1 vs2 vsimm 9..7=0x4 26..25=2 14..12=7 6..0=0x27
+vsxfs.s vs3 rs1 vs2 vsimm 9..7=0x5 26..25=2 14..12=0 6..0=0x27
+vsxfs vs3 rs1 vs2 vsimm 9..7=0x5 26..25=2 14..12=5 6..0=0x27
+vsxfs.f vs3 rs1 vs2 vsimm 9..7=0x5 26..25=2 14..12=6 6..0=0x27
+vsxfs.t vs3 rs1 vs2 vsimm 9..7=0x5 26..25=2 14..12=7 6..0=0x27
+vsxfd.s vs3 rs1 vs2 vsimm 9..7=0x6 26..25=2 14..12=0 6..0=0x27
+vsxfd vs3 rs1 vs2 vsimm 9..7=0x6 26..25=2 14..12=5 6..0=0x27
+vsxfd.f vs3 rs1 vs2 vsimm 9..7=0x6 26..25=2 14..12=6 6..0=0x27
+vsxfd.t vs3 rs1 vs2 vsimm 9..7=0x6 26..25=2 14..12=7 6..0=0x27
+vsxfq.s vs3 rs1 vs2 vsimm 9..7=0x7 26..25=2 14..12=0 6..0=0x27
+vsxfq vs3 rs1 vs2 vsimm 9..7=0x7 26..25=2 14..12=5 6..0=0x27
+vsxfq.f vs3 rs1 vs2 vsimm 9..7=0x7 26..25=2 14..12=6 6..0=0x27
+vsxfq.t vs3 rs1 vs2 vsimm 9..7=0x7 26..25=2 14..12=7 6..0=0x27
# Vector AMOs
vamoswap m vd vs3 vs2 19..15=0x01 26..25=3 14=1 6..0=0x27
@@ -16,68 +257,218 @@ vamomin m vd vs3 vs2 19..15=0x10 26..25=3 14=1 6..0=0x27
vamomax m vd vs3 vs2 19..15=0x14 26..25=3 14=1 6..0=0x27
# Vector FMA
-@vmadd m vd vs1 vs2 vs3 26..25=0 14=0 6..0=0x67
-@vmsub m vd vs1 vs2 vs3 26..25=1 14=0 6..0=0x67
-@vnmsub m vd vs1 vs2 vs3 26..25=2 14=0 6..0=0x67
-@vnmadd m vd vs1 vs2 vs3 26..25=3 14=0 6..0=0x67
+# Fits into the two unused rounding modes
+# predicated versions are in madd and msub
+# - With rm signifying v1.f(101) and v1.t(110)
+# Normal use of the size field for size of operands
+# non-predicated versions are in nmadd and nmsub
+# - With rm signifying scalar(101) or vector(110) dest
+vfmadd.s.f vd vs1 vs2 vs3 14..12=0x5 26..25=0 6..2=0x10 1..0=3
+vfmadd.s.t vd vs1 vs2 vs3 14..12=0x6 26..25=0 6..2=0x10 1..0=3
+vfmsub.s.f vd vs1 vs2 vs3 14..12=0x5 26..25=0 6..2=0x11 1..0=3
+vfmsub.s.t vd vs1 vs2 vs3 14..12=0x6 26..25=0 6..2=0x11 1..0=3
+vfmadd.d.f vd vs1 vs2 vs3 14..12=0x5 26..25=1 6..2=0x10 1..0=3
+vfmadd.d.t vd vs1 vs2 vs3 14..12=0x6 26..25=1 6..2=0x10 1..0=3
+vfmsub.d.f vd vs1 vs2 vs3 14..12=0x5 26..25=1 6..2=0x11 1..0=3
+vfmsub.d.t vd vs1 vs2 vs3 14..12=0x6 26..25=1 6..2=0x11 1..0=3
+
+vfmadd.h.f vd vs1 vs2 vs3 14..12=0x5 26..25=2 6..2=0x10 1..0=3
+vfmadd.h.t vd vs1 vs2 vs3 14..12=0x6 26..25=2 6..2=0x10 1..0=3
+vfmsub.h.f vd vs1 vs2 vs3 14..12=0x5 26..25=2 6..2=0x11 1..0=3
+vfmsub.h.t vd vs1 vs2 vs3 14..12=0x6 26..25=2 6..2=0x11 1..0=3
+
+vfmadd.q.f vd vs1 vs2 vs3 14..12=0x5 26..25=3 6..2=0x10 1..0=3
+vfmadd.q.t vd vs1 vs2 vs3 14..12=0x6 26..25=3 6..2=0x10 1..0=3
+vfmsub.q.f vd vs1 vs2 vs3 14..12=0x5 26..25=3 6..2=0x11 1..0=3
+vfmsub.q.t vd vs1 vs2 vs3 14..12=0x6 26..25=3 6..2=0x11 1..0=3
+
+vfmadd.s.s vd vs1 vs2 vs3 14..12=0x5 26..25=0 6..2=0x12 1..0=3
+vfmadd.s vd vs1 vs2 vs3 14..12=0x6 26..25=0 6..2=0x12 1..0=3
+vfmsub.s.s vd vs1 vs2 vs3 14..12=0x5 26..25=0 6..2=0x13 1..0=3
+vfmsub.s vd vs1 vs2 vs3 14..12=0x6 26..25=0 6..2=0x13 1..0=3
+
+vfmadd.d.s vd vs1 vs2 vs3 14..12=0x5 26..25=1 6..2=0x12 1..0=3
+vfmadd.d vd vs1 vs2 vs3 14..12=0x6 26..25=1 6..2=0x12 1..0=3
+vfmsub.d.s vd vs1 vs2 vs3 14..12=0x5 26..25=1 6..2=0x13 1..0=3
+vfmsub.d vd vs1 vs2 vs3 14..12=0x6 26..25=1 6..2=0x13 1..0=3
+
+vfmadd.h.s vd vs1 vs2 vs3 14..12=0x5 26..25=2 6..2=0x12 1..0=3
+vfmadd.h vd vs1 vs2 vs3 14..12=0x6 26..25=2 6..2=0x12 1..0=3
+vfmsub.h.s vd vs1 vs2 vs3 14..12=0x5 26..25=2 6..2=0x13 1..0=3
+vfmsub.h vd vs1 vs2 vs3 14..12=0x6 26..25=2 6..2=0x13 1..0=3
+
+vfmadd.q.s vd vs1 vs2 vs3 14..12=0x5 26..25=3 6..2=0x12 1..0=3
+vfmadd.q vd vs1 vs2 vs3 14..12=0x6 26..25=3 6..2=0x12 1..0=3
+vfmsub.q.s vd vs1 vs2 vs3 14..12=0x5 26..25=3 6..2=0x13 1..0=3
+vfmsub.q vd vs1 vs2 vs3 14..12=0x6 26..25=3 6..2=0x13 1..0=3
+
+# 57 opcode is empty
+# 14=1 is for integer
# Vector arithmetic.
# First, all the immediates.
-vaddi m vd vs1 vimm 31..28=0 14=1 6..0=0x67
-vsli m vd vs1 vimm 31..28=1 14=1 6..0=0x67
-vclipi m vd vs1 vimm 31..28=3 14=1 6..0=0x67
-vxori m vd vs1 vimm 31..28=4 14=1 6..0=0x67
-vsri m vd vs1 vimm 31..28=5 14=1 6..0=0x67
-vori m vd vs1 vimm 31..28=6 14=1 6..0=0x67
-vandi m vd vs1 vimm 31..28=7 14=1 6..0=0x67
+vaddi m vd vs1 vimm 31..28=0 14=1 6..0=0x57
+vsli m vd vs1 vimm 31..28=1 14=1 6..0=0x57
+vsrli m vd vs1 vimm 31..28=2 14=1 6..0=0x57
+vclipi m vd vs1 vimm 31..28=3 14=1 6..0=0x57
+vxori m vd vs1 vimm 31..28=4 14=1 6..0=0x57
+vsrai m vd vs1 vimm 31..28=5 14=1 6..0=0x57
+vori m vd vs1 vimm 31..28=6 14=1 6..0=0x57
+vandi m vd vs1 vimm 31..28=7 14=1 6..0=0x57
# group 31..28=8
-vadd m vd vs1 vs2 27..25=0 31..28=8 14=1 6..0=0x67
-vsub m vd vs1 vs2 27..25=1 31..28=8 14=1 6..0=0x67
-vmin m vd vs1 vs2 27..25=2 31..28=8 14=1 6..0=0x67
-vmax m vd vs1 vs2 27..25=3 31..28=8 14=1 6..0=0x67
-vdiv m vd vs1 vs2 27..25=4 31..28=8 14=1 6..0=0x67
-vrem m vd vs1 vs2 27..25=5 31..28=8 14=1 6..0=0x67
-vmul m vd vs1 vs2 27..25=6 31..28=8 14=1 6..0=0x67
-vmulh m vd vs1 vs2 27..25=7 31..28=8 14=1 6..0=0x67
+vadd m vd vs1 vs2 27..25=0 31..28=8 14=1 6..0=0x57
+vsub m vd vs1 vs2 27..25=1 31..28=8 14=1 6..0=0x57
+vdiv m vd vs1 vs2 27..25=2 31..28=8 14=1 6..0=0x57
+vrem m vd vs1 vs2 27..25=3 31..28=8 14=1 6..0=0x57
+vmul m vd vs1 vs2 27..25=4 31..28=8 14=1 6..0=0x57
+vmulh m vd vs1 vs2 27..25=5 31..28=8 14=1 6..0=0x57
+vmulhu m vd vs1 vs2 27..25=6 31..28=8 14=1 6..0=0x57
+vmulhsu m vd vs1 vs2 27..25=7 31..28=8 14=1 6..0=0x57
# group 31..28=9
-vsl m vd vs1 vs2 27..25=0 31..28=9 14=1 6..0=0x67
-vsgnjx m vd vs1 vs2 27..25=1 31..28=9 14=1 6..0=0x67
-vsgnj m vd vs1 vs2 27..25=2 31..28=9 14=1 6..0=0x67
-vsgnjn m vd vs1 vs2 27..25=3 31..28=9 14=1 6..0=0x67
-vseq m vd vs1 vs2 27..25=4 31..28=9 14=1 6..0=0x67
-vsne m vd vs1 vs2 27..25=5 31..28=9 14=1 6..0=0x67
-vslt m vd vs1 vs2 27..25=6 31..28=9 14=1 6..0=0x67
-vsge m vd vs1 vs2 27..25=7 31..28=9 14=1 6..0=0x67
+vsl m vd vs1 vs2 27..25=0 31..28=9 14=1 6..0=0x57
+vsr m vd vs1 vs2 27..25=1 31..28=9 14=1 6..0=0x57
+vor m vd vs1 vs2 27..25=2 31..28=9 14=1 6..0=0x57
+vand m vd vs1 vs2 27..25=3 31..28=9 14=1 6..0=0x57
+vseq m vd vs1 vs2 27..25=4 31..28=9 14=1 6..0=0x57
+vsne m vd vs1 vs2 27..25=5 31..28=9 14=1 6..0=0x57
+vslt m vd vs1 vs2 27..25=6 31..28=9 14=1 6..0=0x57
+vsge m vd vs1 vs2 27..25=7 31..28=9 14=1 6..0=0x57
# group 31..28=10 includes instructions that write xd
# (and may also read xs1 and/or xs2).
-vextract m rd vs1 rs2 27..25=0 31..28=10 14=1 6..0=0x67
-vmfirst m rd vs1 27..25=7 31..28=10 14=1 6..0=0x67 24..20=0
-vmpop m rd vs1 27..25=7 31..28=10 14=1 6..0=0x67 24..20=1
+vextract m rd vs1 rs2 27..25=0 31..28=10 14=1 6..0=0x57
+vmfirst m rd vs1 27..25=7 31..28=10 14=1 6..0=0x57 24..20=0
+vmpop m rd vs1 27..25=7 31..28=10 14=1 6..0=0x57 24..20=1
# group 31..28=11 includes instructions that read xs1 and/or xs2,
# but do not write xd.
-vclip m vd vs1 rs2 27..25=0 31..28=11 14=1 6..0=0x67
-vcvt m vd vs1 rs2 27..25=1 31..28=11 14=1 6..0=0x67
-vslide m vd vs1 rs2 27..25=2 31..28=11 14=1 6..0=0x67
-vinsert m vd rs1 rs2 27..25=4 31..28=11 14=1 6..0=0x67
+vclip m vd vs1 rs2 27..25=0 31..28=11 14=1 6..0=0x57
+vcvt m vd vs1 rs2 27..25=1 31..28=11 14=1 6..0=0x57
+vslide m vd vs1 rs2 27..25=2 31..28=11 14=1 6..0=0x57
+vinsert m vd rs1 rs2 27..25=4 31..28=11 14=1 6..0=0x57
# group 31..28=12
-vxor m vd vs1 vs2 27..25=0 31..28=12 14=1 6..0=0x67
-vmerge m vd vs1 vs2 27..25=1 31..28=12 14=1 6..0=0x67
-vselect m vd vs1 vs2 27..25=2 31..28=12 14=1 6..0=0x67
+vxor m vd vs1 vs2 27..25=0 31..28=12 14=1 6..0=0x57
+vmerge m vd vs1 vs2 27..25=1 31..28=12 14=1 6..0=0x57
+vselect m vd vs1 vs2 27..25=2 31..28=12 14=1 6..0=0x57
# group 31..28=12, 27..25=7 is for single-argument instructions.
-vclass m vd vs1 27..25=7 31..28=12 14=1 6..0=0x67 24..20=0
-vpopc m vd vs1 27..25=7 31..28=12 14=1 6..0=0x67 24..20=1
-vsqrt m vd vs1 27..25=7 31..28=12 14=1 6..0=0x67 24..20=2
+vclass m vd vs1 27..25=7 31..28=12 14=1 6..0=0x57 24..20=0
+vpopc m vd vs1 27..25=7 31..28=12 14=1 6..0=0x57 24..20=1
+vsqrt m vd vs1 27..25=7 31..28=12 14=1 6..0=0x57 24..20=2
# group 31..28=13
-vsr m vd vs1 vs2 27..25=0 31..28=13 14=1 6..0=0x67
# group 31..28=14
-vor m vd vs1 vs2 27..25=0 31..28=14 14=1 6..0=0x67
# group 31..28=15
-vand m vd vs1 vs2 27..25=0 31..28=15 14=1 6..0=0x67
+
+# 14=0 is for fp
+# 31..27 is opcode
+# 26..25 remains fp size
+vfadd.s m vd vs1 vs2 31..27=0x00 26..25=0 14=0 6..0=0x57
+vfsub.s m vd vs1 vs2 31..27=0x01 26..25=0 14=0 6..0=0x57
+vfmul.s m vd vs1 vs2 31..27=0x02 26..25=0 14=0 6..0=0x57
+vfdiv.s m vd vs1 vs2 31..27=0x03 26..25=0 14=0 6..0=0x57
+vfsgnj.s m vd vs1 vs2 31..27=0x04 26..25=0 14=0 6..0=0x57
+vfsgnjn.s m vd vs1 vs2 31..27=0x05 26..25=0 14=0 6..0=0x57
+vfsgnjx.s m vd vs1 vs2 31..27=0x06 26..25=0 14=0 6..0=0x57
+vfmin.s m vd vs1 vs2 31..27=0x07 26..25=0 14=0 6..0=0x57
+vfmax.s m vd vs1 vs2 31..27=0x08 26..25=0 14=0 6..0=0x57
+vfsqrt.s m vd vs1 24..20=0 31..27=0x09 26..25=0 14=0 6..0=0x57
+vfle.s m vd vs1 vs2 31..27=0x0A 26..25=0 14=0 6..0=0x57
+vflt.s m vd vs1 vs2 31..27=0x0B 26..25=0 14=0 6..0=0x57
+vfeq.s m vd vs1 vs2 31..27=0x0C 26..25=0 14=0 6..0=0x57
+vfclass.s m vd vs1 24..20=0 31..27=0x0D 26..25=0 14=0 6..0=0x57
+vfcvt.s.w m vd vs1 24..20=0 31..27=0x0E 26..25=0 14=0 6..0=0x57
+vfcvt.s.wu m vd vs1 24..20=1 31..27=0x0E 26..25=0 14=0 6..0=0x57
+vfcvt.s.l m vd vs1 24..20=2 31..27=0x0E 26..25=0 14=0 6..0=0x57
+vfcvt.s.lu m vd vs1 24..20=3 31..27=0x0E 26..25=0 14=0 6..0=0x57
+vfmv.w.x m vd vs1 24..20=4 31..27=0x0E 26..25=0 14=0 6..0=0x57
+vfcvt.w.s m vd vs1 24..20=0 31..27=0x0F 26..25=0 14=0 6..0=0x57
+vfcvt.wu.s m vd vs1 24..20=1 31..27=0x0F 26..25=0 14=0 6..0=0x57
+vfcvt.l.s m vd vs1 24..20=2 31..27=0x0F 26..25=0 14=0 6..0=0x57
+vfcvt.lu.s m vd vs1 24..20=3 31..27=0x0F 26..25=0 14=0 6..0=0x57
+vfmv.x.w m vd vs1 24..20=4 31..27=0x0F 26..25=0 14=0 6..0=0x57
+
+vfadd.d m vd vs1 vs2 31..27=0x00 26..25=1 14=0 6..0=0x57
+vfsub.d m vd vs1 vs2 31..27=0x01 26..25=1 14=0 6..0=0x57
+vfmul.d m vd vs1 vs2 31..27=0x02 26..25=1 14=0 6..0=0x57
+vfdiv.d m vd vs1 vs2 31..27=0x03 26..25=1 14=0 6..0=0x57
+vfsgnj.d m vd vs1 vs2 31..27=0x04 26..25=1 14=0 6..0=0x57
+vfsgnjn.d m vd vs1 vs2 31..27=0x05 26..25=1 14=0 6..0=0x57
+vfsgnjx.d m vd vs1 vs2 31..27=0x06 26..25=1 14=0 6..0=0x57
+vfmin.d m vd vs1 vs2 31..27=0x07 26..25=1 14=0 6..0=0x57
+vfmax.d m vd vs1 vs2 31..27=0x08 26..25=1 14=0 6..0=0x57
+vfsqrt.d m vd vs1 24..20=0 31..27=0x09 26..25=1 14=0 6..0=0x57
+vfle.d m vd vs1 vs2 31..27=0x0A 26..25=1 14=0 6..0=0x57
+vflt.d m vd vs1 vs2 31..27=0x0B 26..25=1 14=0 6..0=0x57
+vfeq.d m vd vs1 vs2 31..27=0x0C 26..25=1 14=0 6..0=0x57
+vfclass.d m vd vs1 24..20=0 31..27=0x0D 26..25=1 14=0 6..0=0x57
+vfcvt.d.w m vd vs1 24..20=0 31..27=0x0E 26..25=1 14=0 6..0=0x57
+vfcvt.d.wu m vd vs1 24..20=1 31..27=0x0E 26..25=1 14=0 6..0=0x57
+vfcvt.d.l m vd vs1 24..20=2 31..27=0x0E 26..25=1 14=0 6..0=0x57
+vfcvt.d.lu m vd vs1 24..20=3 31..27=0x0E 26..25=1 14=0 6..0=0x57
+vfmv.d.x m vd vs1 24..20=4 31..27=0x0E 26..25=1 14=0 6..0=0x57
+vfcvt.w.d m vd vs1 24..20=0 31..27=0x0F 26..25=1 14=0 6..0=0x57
+vfcvt.wu.d m vd vs1 24..20=1 31..27=0x0F 26..25=1 14=0 6..0=0x57
+vfcvt.l.d m vd vs1 24..20=2 31..27=0x0F 26..25=1 14=0 6..0=0x57
+vfcvt.lu.d m vd vs1 24..20=3 31..27=0x0F 26..25=1 14=0 6..0=0x57
+vfmv.x.d m vd vs1 24..20=4 31..27=0x0F 26..25=1 14=0 6..0=0x57
+vfcvt.s.d m vd vs1 24..20=0 31..27=0x10 26..25=1 14=0 6..0=0x57
+vfcvt.d.s m vd vs1 24..20=1 31..27=0x10 26..25=1 14=0 6..0=0x57
+
+vfadd.h m vd vs1 vs2 31..27=0x00 26..25=2 14=0 6..0=0x57
+vfsub.h m vd vs1 vs2 31..27=0x01 26..25=2 14=0 6..0=0x57
+vfmul.h m vd vs1 vs2 31..27=0x02 26..25=2 14=0 6..0=0x57
+vfdiv.h m vd vs1 vs2 31..27=0x03 26..25=2 14=0 6..0=0x57
+vfsgnj.h m vd vs1 vs2 31..27=0x04 26..25=2 14=0 6..0=0x57
+vfsgnjn.h m vd vs1 vs2 31..27=0x05 26..25=2 14=0 6..0=0x57
+vfsgnjx.h m vd vs1 vs2 31..27=0x06 26..25=2 14=0 6..0=0x57
+vfmin.h m vd vs1 vs2 31..27=0x07 26..25=2 14=0 6..0=0x57
+vfmax.h m vd vs1 vs2 31..27=0x08 26..25=2 14=0 6..0=0x57
+vfsqrt.h m vd vs1 24..20=0 31..27=0x09 26..25=2 14=0 6..0=0x57
+vfle.h m vd vs1 vs2 31..27=0x0A 26..25=2 14=0 6..0=0x57
+vflt.h m vd vs1 vs2 31..27=0x0B 26..25=2 14=0 6..0=0x57
+vfeq.h m vd vs1 vs2 31..27=0x0C 26..25=2 14=0 6..0=0x57
+vfclass.h m vd vs1 24..20=0 31..27=0x0D 26..25=2 14=0 6..0=0x57
+vfcvt.h.w m vd vs1 24..20=0 31..27=0x0E 26..25=2 14=0 6..0=0x57
+vfcvt.h.wu m vd vs1 24..20=1 31..27=0x0E 26..25=2 14=0 6..0=0x57
+vfcvt.h.l m vd vs1 24..20=2 31..27=0x0E 26..25=2 14=0 6..0=0x57
+vfcvt.h.lu m vd vs1 24..20=3 31..27=0x0E 26..25=2 14=0 6..0=0x57
+vfmv.h.x m vd vs1 24..20=4 31..27=0x0E 26..25=2 14=0 6..0=0x57
+vfcvt.w.h m vd vs1 24..20=0 31..27=0x0F 26..25=2 14=0 6..0=0x57
+vfcvt.wu.h m vd vs1 24..20=1 31..27=0x0F 26..25=2 14=0 6..0=0x57
+vfcvt.l.h m vd vs1 24..20=2 31..27=0x0F 26..25=2 14=0 6..0=0x57
+vfcvt.lu.h m vd vs1 24..20=3 31..27=0x0F 26..25=2 14=0 6..0=0x57
+vfmv.x.h m vd vs1 24..20=4 31..27=0x0F 26..25=2 14=0 6..0=0x57
+vfcvt.s.h m vd vs1 24..20=0 31..27=0x10 26..25=2 14=0 6..0=0x57
+vfcvt.h.s m vd vs1 24..20=1 31..27=0x10 26..25=2 14=0 6..0=0x57
+
+vfadd.q m vd vs1 vs2 31..27=0x00 26..25=3 14=0 6..0=0x57
+vfsub.q m vd vs1 vs2 31..27=0x01 26..25=3 14=0 6..0=0x57
+vfmul.q m vd vs1 vs2 31..27=0x02 26..25=3 14=0 6..0=0x57
+vfdiv.q m vd vs1 vs2 31..27=0x03 26..25=3 14=0 6..0=0x57
+vfsgnj.q m vd vs1 vs2 31..27=0x04 26..25=3 14=0 6..0=0x57
+vfsgnjn.q m vd vs1 vs2 31..27=0x05 26..25=3 14=0 6..0=0x57
+vfsgnjx.q m vd vs1 vs2 31..27=0x06 26..25=3 14=0 6..0=0x57
+vfmin.q m vd vs1 vs2 31..27=0x07 26..25=3 14=0 6..0=0x57
+vfmax.q m vd vs1 vs2 31..27=0x08 26..25=3 14=0 6..0=0x57
+vfsqrt.q m vd vs1 24..20=0 31..27=0x09 26..25=3 14=0 6..0=0x57
+vfle.q m vd vs1 vs2 31..27=0x0A 26..25=3 14=0 6..0=0x57
+vflt.q m vd vs1 vs2 31..27=0x0B 26..25=3 14=0 6..0=0x57
+vfeq.q m vd vs1 vs2 31..27=0x0C 26..25=3 14=0 6..0=0x57
+vfclass.q m vd vs1 24..20=0 31..27=0x0D 26..25=3 14=0 6..0=0x57
+vfcvt.q.w m vd vs1 24..20=0 31..27=0x0E 26..25=3 14=0 6..0=0x57
+vfcvt.q.wu m vd vs1 24..20=1 31..27=0x0E 26..25=3 14=0 6..0=0x57
+vfcvt.q.l m vd vs1 24..20=2 31..27=0x0E 26..25=3 14=0 6..0=0x57
+vfcvt.q.lu m vd vs1 24..20=3 31..27=0x0E 26..25=3 14=0 6..0=0x57
+vfmv.q.x m vd vs1 24..20=4 31..27=0x0E 26..25=3 14=0 6..0=0x57
+vfcvt.w.q m vd vs1 24..20=0 31..27=0x0F 26..25=3 14=0 6..0=0x57
+vfcvt.wu.q m vd vs1 24..20=1 31..27=0x0F 26..25=3 14=0 6..0=0x57
+vfcvt.l.q m vd vs1 24..20=2 31..27=0x0F 26..25=3 14=0 6..0=0x57
+vfcvt.lu.q m vd vs1 24..20=3 31..27=0x0F 26..25=3 14=0 6..0=0x57
+vfmv.x.q m vd vs1 24..20=4 31..27=0x0F 26..25=3 14=0 6..0=0x57
+vfcvt.s.q m vd vs1 24..20=0 31..27=0x10 26..25=3 14=0 6..0=0x57
+vfcvt.q.s m vd vs1 24..20=1 31..27=0x10 26..25=3 14=0 6..0=0x57
diff --git a/parse-opcodes b/parse-opcodes
index 42677cf..1617ec2 100755
--- a/parse-opcodes
+++ b/parse-opcodes
@@ -36,8 +36,8 @@ arglut['vs2'] = (24,20)
arglut['vs3'] = (31,27)
arglut['m'] = (13,12)
arglut['vimm'] = (27,20)
-arglut['vlimm'] = (31,27)
-arglut['vsimm'] = (11,7)
+arglut['vlimm'] = (31,31)
+arglut['vsimm'] = (11,10)
causes = [
(0x00, 'misaligned fetch'),
@@ -617,17 +617,7 @@ def print_fence_type(name,match,arguments):
)
def print_vi_type(name,match,arguments):
- print """
-&
-\\multicolumn{1}{|c|}{%s} &
-\\multicolumn{3}{c|}{%s} &
-\\multicolumn{1}{c|}{%s} &
-\\multicolumn{1}{c|}{%s} &
-\\multicolumn{1}{c|}{%s} &
-\\multicolumn{1}{c|}{%s} &
-\\multicolumn{1}{c|}{%s} & %s \\\\
-\\cline{2-10}
- """ % \
+ print """2+|%s 3+|%s|%s|%s|%s 2+|%s|%s|%s""" % \
( \
binary(yank(match,28,4),4), \
str_arg('vimm','imm[7:0]',match,arguments), \
@@ -640,43 +630,51 @@ def print_vi_type(name,match,arguments):
)
def print_vs_type(name,match,arguments):
- print """
-&
-\\multicolumn{2}{|c|}{%s} &
-\\multicolumn{1}{c|}{%s} &
-\\multicolumn{1}{c|}{%s} &
-\\multicolumn{1}{c|}{%s} &
-\\multicolumn{1}{c|}{%s} &
-\\multicolumn{1}{c|}{%s} &
-\\multicolumn{1}{c|}{%s} &
-\\multicolumn{1}{c|}{%s} & %s \\\\
-\\cline{2-10}
- """ % \
+ print """3+|%s|%s|%s|%s|%s|%s|%s|%s|%s|%s""" % \
+ ( \
+ 'vlimm' in arguments and 'imm[0]' or str_arg('vs3','',match,arguments), \
+ binary(yank(match,25,2),2), \
+ str_arg('rs2' in arguments and 'rs2' or 'vs2','',match,arguments), \
+ str_arg('rs1' in arguments and 'rs1' or 'vs1','',match,arguments), \
+ binary(yank(match,14,1),1), \
+ str_arg('m','',match,arguments), \
+ 'vsimm' in arguments and 'imm[1:0]' or str_arg('vd','',match,arguments), \
+ binary(yank(match,7,3),3), \
+ binary(yank(match,opcode_base,opcode_size),opcode_size), \
+ str_inst(name,arguments) \
+ )
+
+def print_vl_type(name,match,arguments):
+ print """|%s 2+|%s|%s|%s|%s|%s|%s 2+|%s|%s|%s""" % \
+ ( \
+ 'vlimm' in arguments and 'imm[0]' or str_arg('vs3','',match,arguments), \
+ binary(yank(match,27,4),4), \
+ binary(yank(match,25,2),2), \
+ str_arg('rs2' in arguments and 'rs2' or 'vs2','',match,arguments), \
+ str_arg('rs1' in arguments and 'rs1' or 'vs1','',match,arguments), \
+ binary(yank(match,14,1),1), \
+ str_arg('m','',match,arguments), \
+ 'vsimm' in arguments and 'imm[1:0]' or str_arg('vd','',match,arguments), \
+ binary(yank(match,opcode_base,opcode_size),opcode_size), \
+ str_inst(name,arguments) \
+ )
+
+def print_vr4_type(name,match,arguments):
+ print """ 2+|%s 2+|%s|%s|%s|%s|%s 2+|%s|%s|%s""" % \
( \
- 'vlimm' in arguments and 'imm[4:0]' or str_arg('vs3','',match,arguments), \
+ str_arg('rs3' in arguments and 'rs3' or 'vs3','',match,arguments), \
binary(yank(match,25,2),2), \
str_arg('rs2' in arguments and 'rs2' or 'vs2','',match,arguments), \
str_arg('rs1' in arguments and 'rs1' or 'vs1','',match,arguments), \
binary(yank(match,14,1),1), \
str_arg('m','',match,arguments), \
- 'vsimm' in arguments and 'imm[4:0]' or str_arg('vd','',match,arguments), \
+ str_arg('rd' in arguments and 'rd' or 'vd','',match,arguments), \
binary(yank(match,opcode_base,opcode_size),opcode_size), \
str_inst(name,arguments) \
)
def print_vr_type(name,match,arguments):
- print """
-&
-\\multicolumn{1}{|c|}{%s} &
-\\multicolumn{2}{c|}{%s} &
-\\multicolumn{1}{c|}{%s} &
-\\multicolumn{1}{c|}{%s} &
-\\multicolumn{1}{c|}{%s} &
-\\multicolumn{1}{c|}{%s} &
-\\multicolumn{1}{c|}{%s} &
-\\multicolumn{1}{c|}{%s} & %s \\\\
-\\cline{2-10}
- """ % \
+ print """ 2+|%s 2+|%s|%s|%s|%s|%s 2+|%s|%s|%s""" % \
( \
binary(yank(match,28,4),4), \
binary(yank(match,25,3),3), \
@@ -792,28 +790,40 @@ def print_subtitle(title, fields=10):
\\cline{2-%d}
""" % (fields, fields, title, fields+1)
-def print_vector_header():
+def print_vec_subtitle(title):
+ print "===%s===" % (title)
+
+def print_vec_header():
print """
-\\newpage
+.Vector Table
+[width="100%",cols="1,3,1,2,5,5,1,2,2,3,7,10"]
+|========================
+|31 |30 28 |27 |26 25 |24 20 |19 15 |14 |13 12 |11 10 |9 7 |6 0 |Opcode
+"""
-\\begin{table}[p]
-\\begin{small}
-\\begin{center}
-\\begin{tabular}{p{0in}p{0.4in}p{0.1in}p{0.3in}p{0.5in}p{0.5in}p{0.1in}p{0.3in}p{0.5in}p{0.7in}l}
-& & & & & & & & & \\\\
- &
-\\instbitrange{31}{28} &
-\\instbit{27} &
-\\instbitrange{26}{25} &
-\\instbitrange{24}{20} &
-\\instbitrange{19}{15} &
-\\instbit{14} &
-\\instbitrange{13}{12} &
-\\instbitrange{11}{7} &
-\\instbitrange{6}{0} \\\\
-\\cline{2-10}
+def print_vec_footer():
+ print """
+|========================
"""
+def print_vec_inst(n):
+ if 'vimm' in arguments[n]:
+ print_vi_type(n, match[n], arguments[n])
+ elif 'vsimm' in arguments[n]:
+ print_vs_type(n, match[n], arguments[n])
+ elif 'vlimm' in arguments[n]:
+ print_vl_type(n, match[n], arguments[n])
+ elif 'vs3' in arguments[n]:
+ print_vr4_type(n, match[n], arguments[n])
+ elif 'vs1' in arguments[n] or 'vs2' in arguments[n] or 'vd' in arguments[n]:
+ print_vr_type(n, match[n], arguments[n])
+ else:
+ print_r_type(n, match[n], arguments[n])
+
+def print_vec_insts(*names):
+ for n in names:
+ print_vec_inst(n)
+
def print_footer(caption=''):
print """
\\end{tabular}
@@ -938,25 +948,75 @@ def make_latex_table():
print_insts('fcvt.d.l', 'fcvt.d.lu', 'fmv.d.x')
print_footer()
- print_vector_header()
- print_subtitle('RV32V Standard Extension', 9)
- print_insts('vadd', 'vsub', 'vsl', 'vsr', 'vand', 'vor', 'vxor')
- print_insts('vseq', 'vsne', 'vslt', 'vsge')
- print_insts('vclip', 'vcvt', 'vmpop', 'vmfirst', 'vextract', 'vinsert', 'vmerge', 'vselect', 'vslide')
- print_insts('vdiv', 'vrem', 'vmul', 'vmulh')
- print_insts('vmin', 'vmax', 'vsgnj', 'vsgnjn', 'vsgnjx')
- print_insts('vsqrt', 'vclass')
- print_insts('vpopc')
- print_insts('vaddi', 'vsli', 'vsri', 'vandi', 'vori', 'vxori')
- print_insts('vclipi')
- print_insts('vmadd', 'vmsub', 'vnmadd', 'vnmsub')
- print_footer()
- print_vector_header()
- print_subtitle('RV32V Standard Extension (cont.)', 9)
- print_insts('vld', 'vlds', 'vldx')
- print_insts('vst', 'vsts', 'vstx')
- print_insts('vamoswap', 'vamoadd', 'vamoand', 'vamoor', 'vamoxor', 'vamomin', 'vamomax')
- print_footer('\\caption{Instruction listing for RISC-V}')
+def make_vector_adoc_table():
+ #print_vec_subtitile('RV32V Standard Extension')
+ print_vec_header()
+ print_vec_insts('vadd', 'vsub', 'vsl', 'vsr', 'vand', 'vor', 'vxor')
+ print_vec_insts('vseq', 'vsne', 'vslt', 'vsge')
+ print_vec_insts('vclip', 'vcvt', 'vmpop', 'vmfirst', 'vextract', 'vinsert', 'vmerge', 'vselect', 'vslide')
+ print_vec_insts('vdiv', 'vrem', 'vmul', 'vmulh', 'vmulhu', 'vmulhsu')
+ print_vec_insts('vpopc')
+ print_vec_insts('vaddi', 'vsli', 'vsrli', 'vsrai', 'vclipi', 'vandi', 'vori', 'vxori')
+ print_vec_footer()
+ print_vec_header()
+ print_vec_insts('vfmadd.s', 'vfmsub.s')
+ print_vec_insts('vfadd.s', 'vfsub.s', 'vfmul.s', 'vfdiv.s', 'vfsqrt.s')
+ print_vec_insts('vfsgnj.s', 'vfsgnjn.s', 'vfsgnjx.s', 'vfmin.s', 'vfmax.s')
+ print_vec_insts('vfeq.s', 'vflt.s', 'vfle.s', 'vfclass.s')
+ print_vec_insts('vfcvt.w.s', 'vfcvt.wu.s', 'vfmv.x.w')
+ print_vec_insts('vfcvt.s.w', 'vfcvt.s.wu', 'vfmv.w.x')
+ print_vec_insts('vfcvt.l.s', 'vfcvt.lu.s')
+ print_vec_insts('vfcvt.s.l', 'vfcvt.s.lu')
+ print_vec_footer()
+ print_vec_header()
+ print_vec_insts('vfmadd.d', 'vfmsub.d')
+ print_vec_insts('vfadd.d', 'vfsub.d', 'vfmul.d', 'vfdiv.d', 'vfsqrt.d')
+ print_vec_insts('vfsgnj.d', 'vfsgnjn.d', 'vfsgnjx.d', 'vfmin.d', 'vfmax.d')
+ print_vec_insts('vfeq.d', 'vflt.d', 'vfle.d', 'vfclass.d')
+ print_vec_insts('vfcvt.s.d', 'vfcvt.d.s')
+ print_vec_insts('vfcvt.w.d', 'vfcvt.wu.d')
+ print_vec_insts('vfcvt.d.w', 'vfcvt.d.wu')
+ print_vec_insts('vfcvt.l.d', 'vfcvt.lu.d', 'vfmv.x.d')
+ print_vec_insts('vfcvt.d.l', 'vfcvt.d.lu', 'vfmv.d.x')
+ print_vec_footer()
+ print_vec_header()
+ print_vec_insts('vfmadd.h', 'vfmsub.h')
+ print_vec_insts('vfadd.h', 'vfsub.h', 'vfmul.h', 'vfdiv.h', 'vfsqrt.h')
+ print_vec_insts('vfsgnj.h', 'vfsgnjn.h', 'vfsgnjx.h', 'vfmin.h', 'vfmax.h')
+ print_vec_insts('vfeq.h', 'vflt.h', 'vfle.h', 'vfclass.h')
+ print_vec_insts('vfcvt.s.h', 'vfcvt.h.s')
+ print_vec_insts('vfcvt.w.h', 'vfcvt.wu.h')
+ print_vec_insts('vfcvt.h.w', 'vfcvt.h.wu')
+ print_vec_insts('vfcvt.l.h', 'vfcvt.lu.h', 'vfmv.x.h')
+ print_vec_insts('vfcvt.h.l', 'vfcvt.h.lu', 'vfmv.h.x')
+ print_vec_footer()
+ print_vec_header()
+ print_vec_insts('vfmadd.q', 'vfmsub.q')
+ print_vec_insts('vfadd.q', 'vfsub.q', 'vfmul.q', 'vfdiv.q', 'vfsqrt.q')
+ print_vec_insts('vfsgnj.q', 'vfsgnjn.q', 'vfsgnjx.q', 'vfmin.q', 'vfmax.q')
+ print_vec_insts('vfeq.q', 'vflt.q', 'vfle.q', 'vfclass.q')
+ print_vec_insts('vfcvt.s.q', 'vfcvt.q.s')
+ print_vec_insts('vfcvt.w.q', 'vfcvt.wu.q')
+ print_vec_insts('vfcvt.q.w', 'vfcvt.q.wu')
+ print_vec_insts('vfcvt.l.q', 'vfcvt.lu.q', 'vfmv.x.q')
+ print_vec_insts('vfcvt.q.l', 'vfcvt.q.lu', 'vfmv.q.x')
+ print_vec_footer()
+ print_vec_header()
+ #print_subtitle('RV32V Standard Extension (cont.)', 9)
+ print_vec_insts('vlb', 'vlh', 'vlw', 'vld', 'vlbu', 'vlhu', 'vlwu')
+ print_vec_insts('vlsb', 'vlsh', 'vlsw', 'vlsd', 'vlsbu', 'vlshu', 'vlswu')
+ print_vec_insts('vlxb', 'vlxh', 'vlxw', 'vlxd', 'vlxbu', 'vlxhu', 'vlxwu')
+ print_vec_insts('vlfh', 'vlfs', 'vlfd', 'vlfq')
+ print_vec_insts('vlsfh', 'vlsfs', 'vlsfd', 'vlsfq')
+ print_vec_insts('vlxfh', 'vlxfs', 'vlxfd', 'vlxfq')
+ print_vec_insts('vsb', 'vsh', 'vsw', 'vsd')
+ print_vec_insts('vssb', 'vssh', 'vssw', 'vssd')
+ print_vec_insts('vsxb', 'vsxh', 'vsxw', 'vsxd')
+ print_vec_insts('vsfh', 'vsfs', 'vsfd', 'vsfq')
+ print_vec_insts('vssfh', 'vssfs', 'vssfd', 'vssfq')
+ print_vec_insts('vsxfh', 'vsxfs', 'vsxfd', 'vsxfq')
+ print_vec_insts('vamoswap', 'vamoadd', 'vamoand', 'vamoor', 'vamoxor', 'vamomin', 'vamomax')
+ print_vec_footer()
def print_chisel_insn(name):
s = " def %-18s = BitPat(\"b" % name.replace('.', '_').upper()
@@ -1108,6 +1168,8 @@ if sys.argv[1] == '-tex':
make_latex_table()
elif sys.argv[1] == '-privtex':
make_supervisor_latex_table()
+elif sys.argv[1] == '-vecadoc':
+ make_vector_adoc_table()
elif sys.argv[1] == '-chisel':
make_chisel()
elif sys.argv[1] == '-c':