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| author | Quan Nguyen <quannguyen@berkeley.edu> | 2013-11-29 20:24:44 -0800 |
|---|---|---|
| committer | Quan Nguyen <quannguyen@berkeley.edu> | 2013-11-29 20:24:44 -0800 |
| commit | 612076a5c7b8e3e5625e5a0d803d6faa2f402737 (patch) | |
| tree | 3fd5943d7a0b274d5e12bf175ffa4638baf926cd | |
| parent | d75c0f77fb66b0013f62080fc96acce680e4cc8f (diff) | |
| download | riscv-opcodes-612076a5c7b8e3e5625e5a0d803d6faa2f402737.zip riscv-opcodes-612076a5c7b8e3e5625e5a0d803d6faa2f402737.tar.gz riscv-opcodes-612076a5c7b8e3e5625e5a0d803d6faa2f402737.tar.bz2 | |
Add vsetprec instructionconfprec
| -rw-r--r-- | opcodes-hwacha | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/opcodes-hwacha b/opcodes-hwacha index c5ec547..d919786 100644 --- a/opcodes-hwacha +++ b/opcodes-hwacha @@ -11,6 +11,7 @@ fmovn 31..25=3 rs2 rs1 14..12=7 rd 6..2=0x1D 1..0=3 # vector instructions vsetcfg imm12 rs1 14=0 13=1 12=0 11..7=0 6..2=0x02 1..0=3 vsetvl 31..25=0 24..20=0 rs1 14=1 13=1 12=0 rd 6..2=0x02 1..0=3 +vsetprec imm12 19..15=1 14=0 13=0 12=0 11..7=0 6..2=0x16 1..0=3 vgetcfg 31..25=0 24..20=0 19..15=0 14=1 13=0 12=0 rd 6..2=0x02 1..0=3 vgetvl 31..25=1 24..20=0 19..15=0 14=1 13=0 12=0 rd 6..2=0x02 1..0=3 |