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| author | Andrew Waterman <waterman@s144.Millennium.Berkeley.EDU> | 2011-03-25 19:02:52 -0700 |
|---|---|---|
| committer | Andrew Waterman <waterman@s144.Millennium.Berkeley.EDU> | 2011-03-25 19:02:52 -0700 |
| commit | 474d9bb318bee21ac52e23a53cd4ec4f7a18f965 (patch) | |
| tree | 623fc8924630b395543837f437999b3f7f9cfbee | |
| parent | 2a0cc20059583ea27e2933ae80c638a3039b13b3 (diff) | |
| download | riscv-opcodes-474d9bb318bee21ac52e23a53cd4ec4f7a18f965.zip riscv-opcodes-474d9bb318bee21ac52e23a53cd4ec4f7a18f965.tar.gz riscv-opcodes-474d9bb318bee21ac52e23a53cd4ec4f7a18f965.tar.bz2 | |
[opcodes] fixed up instruction table
| -rw-r--r-- | instr-table.tex | 2545 | ||||
| -rwxr-xr-x | parse-opcodes | 404 |
2 files changed, 1474 insertions, 1475 deletions
diff --git a/instr-table.tex b/instr-table.tex index 90453d8..eb756b4 100644 --- a/instr-table.tex +++ b/instr-table.tex @@ -4,11 +4,12 @@ \begin{table}[p] \begin{small} \begin{center} -\begin{tabular}{rcccccccccl} +\begin{tabular}{rccccccccccl} & \hspace*{0.6in} & \hspace*{0.3in} & \hspace*{0.1in} & +\hspace*{0.1in} & \hspace*{0.2in} & \hspace*{0.2in} & \hspace*{0.1in} & @@ -16,1589 +17,1767 @@ \hspace*{0.3in} & \hspace*{0.3in} \\ & -\instbitrange{31}{25} & -\instbitrange{24}{23} & -\instbit{22} & -\instbitrange{21}{20} & -\instbitrange{19}{16} & +\instbitrange{31}{27} & +\instbitrange{26}{22} & +\instbitrange{21}{17} & +\instbit{16} & \instbit{15} & -\instbitrange{14}{10} & -\instbitrange{9}{5} & -\instbitrange{4}{0} \\ -\cline{2-10} -& -\multicolumn{1}{|c|}{opcode} & -\multicolumn{8}{c|}{jump target} & J-type \\ -\cline{2-10} -& -\multicolumn{1}{|c|}{opcode} & -\multicolumn{7}{c|}{LUI-immediate} & -\multicolumn{1}{c|}{rd} & LUI-type \\ -\cline{2-10} -& -\multicolumn{1}{|c|}{opcode} & +\instbitrange{14}{12} & +\instbitrange{11}{10} & +\instbit{9} & +\instbitrange{8}{7} & +\instbitrange{6}{0} \\ +\cline{2-11} +& +\multicolumn{9}{|c|}{jump target} & +\multicolumn{1}{c|}{opcode} & J-type \\ +\cline{2-11} +& +\multicolumn{1}{|c|}{rd} & +\multicolumn{8}{c|}{LUI-immediate} & +\multicolumn{1}{c|}{opcode} & LUI-type \\ +\cline{2-11} +& +\multicolumn{1}{|c|}{rd} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{imm[11:7]} & +\multicolumn{4}{c|}{imm[6:0]} & \multicolumn{2}{c|}{funct3} & -\multicolumn{4}{c|}{immediate} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & I-type \\ -\cline{2-10} +\multicolumn{1}{c|}{opcode} & I-type \\ +\cline{2-11} & -\multicolumn{1}{|c|}{opcode} & -\multicolumn{2}{c|}{funct3} & -\multicolumn{3}{c|}{immed[11:5]} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{imm[11:7]} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{immed[4:0]} & B-type \\ -\cline{2-10} -& -\multicolumn{1}{|c|}{opcode} & -\multicolumn{5}{c|}{funct10} & \multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & R-type \\ -\cline{2-10} +\multicolumn{4}{c|}{imm[6:0]} & +\multicolumn{2}{c|}{funct3} & +\multicolumn{1}{c|}{opcode} & B-type \\ +\cline{2-11} & -\multicolumn{1}{|c|}{opcode} & -\multicolumn{3}{c|}{funct5} & -\multicolumn{2}{c|}{rs3} & +\multicolumn{1}{|c|}{rd} & +\multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rs2} & +\multicolumn{6}{c|}{funct10} & +\multicolumn{1}{c|}{opcode} & R-type \\ +\cline{2-11} +& +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & R4-type \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{rs3} & +\multicolumn{3}{c|}{funct5} & +\multicolumn{1}{c|}{opcode} & R4-type \\ +\cline{2-11} & -\multicolumn{9}{c}{} & \\ +\multicolumn{10}{c}{} & \\ & -\multicolumn{9}{c}{\bf Unimplemented Instruction} & \\ -\cline{2-10} +\multicolumn{10}{c}{\bf Unimplemented Instruction} & \\ +\cline{2-11} & -\multicolumn{9}{|c|}{00000000000000000000000000000000} & UNIMP \\ -\cline{2-10} +\multicolumn{10}{|c|}{00000000000000000000000000000000} & UNIMP \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{8}{c|}{imm25} & J imm25 \\ -\cline{2-10} +\multicolumn{10}{c}{} & \\ +& +\multicolumn{10}{c}{\bf Control Transfer Instructions} & \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{8}{c|}{imm25} & JAL imm25 \\ -\cline{2-10} +\multicolumn{9}{|c|}{imm25} & +\multicolumn{1}{c|}{1100111} & J imm25 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{4}{c|}{imm12} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & JALR.C rd,rs1,imm12 \\ -\cline{2-10} +\multicolumn{9}{|c|}{imm25} & +\multicolumn{1}{c|}{1101111} & JAL imm25 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{4}{c|}{imm12} & +\multicolumn{1}{|c|}{imm12hi} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & JALR.R rd,rs1,imm12 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{imm12lo} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{1100011} & BEQ rs1,rs2,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{4}{c|}{imm12} & +\multicolumn{1}{|c|}{imm12hi} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & JALR.J rd,rs1,imm12 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{imm12lo} & +\multicolumn{2}{c|}{001} & +\multicolumn{1}{c|}{1100011} & BNE rs1,rs2,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{4}{c|}{000000000000} & -\multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{rd} & RDNPC rd \\ -\cline{2-10} +\multicolumn{1}{|c|}{imm12hi} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{imm12lo} & +\multicolumn{2}{c|}{100} & +\multicolumn{1}{c|}{1100011} & BLT rs1,rs2,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{3}{c|}{imm12hi} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{imm12hi} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{imm12lo} & BEQ imm12hi,rs1,rs2,imm12lo \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{imm12lo} & +\multicolumn{2}{c|}{101} & +\multicolumn{1}{c|}{1100011} & BGE rs1,rs2,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{3}{c|}{imm12hi} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{imm12hi} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{imm12lo} & BNE imm12hi,rs1,rs2,imm12lo \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{imm12lo} & +\multicolumn{2}{c|}{110} & +\multicolumn{1}{c|}{1100011} & BLTU rs1,rs2,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{3}{c|}{imm12hi} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{imm12hi} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{imm12lo} & BLT imm12hi,rs1,rs2,imm12lo \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{imm12lo} & +\multicolumn{2}{c|}{111} & +\multicolumn{1}{c|}{1100011} & BGEU rs1,rs2,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{3}{c|}{imm12hi} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{imm12lo} & BGE imm12hi,rs1,rs2,imm12lo \\ -\cline{2-10} +\multicolumn{5}{c|}{imm12} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{1101011} & JALR.C rd,rs1,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{3}{c|}{imm12hi} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{imm12lo} & BLTU imm12hi,rs1,rs2,imm12lo \\ -\cline{2-10} +\multicolumn{5}{c|}{imm12} & +\multicolumn{2}{c|}{001} & +\multicolumn{1}{c|}{1101011} & JALR.R rd,rs1,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{3}{c|}{imm12hi} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{imm12lo} & BGEU imm12hi,rs1,rs2,imm12lo \\ -\cline{2-10} +\multicolumn{5}{c|}{imm12} & +\multicolumn{2}{c|}{010} & +\multicolumn{1}{c|}{1101011} & JALR.J rd,rs1,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{7}{c|}{imm20} & -\multicolumn{1}{c|}{rd} & LUI rd,imm20 \\ -\cline{2-10} +\multicolumn{1}{|c|}{rd} & +\multicolumn{1}{c|}{00000} & +\multicolumn{5}{c|}{000000000000} & +\multicolumn{2}{c|}{100} & +\multicolumn{1}{c|}{1101011} & RDNPC rd \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{4}{c|}{imm12} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & ADDI rd,rs1,imm12 \\ -\cline{2-10} +\multicolumn{10}{c}{} & \\ +& +\multicolumn{10}{c}{\bf Memory Instructions} & \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{2}{c|}{000000} & -\multicolumn{2}{c|}{shamt} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & SLLI rd,rs1,shamt \\ -\cline{2-10} +\multicolumn{5}{c|}{imm12} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{0000011} & LB rd,rs1,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{4}{c|}{imm12} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & SLTI rd,rs1,imm12 \\ -\cline{2-10} +\multicolumn{5}{c|}{imm12} & +\multicolumn{2}{c|}{001} & +\multicolumn{1}{c|}{0000011} & LH rd,rs1,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{4}{c|}{imm12} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & SLTIU rd,rs1,imm12 \\ -\cline{2-10} +\multicolumn{5}{c|}{imm12} & +\multicolumn{2}{c|}{010} & +\multicolumn{1}{c|}{0000011} & LW rd,rs1,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{4}{c|}{imm12} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & XORI rd,rs1,imm12 \\ -\cline{2-10} +\multicolumn{5}{c|}{imm12} & +\multicolumn{2}{c|}{011} & +\multicolumn{1}{c|}{0000011} & LD rd,rs1,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{2}{c|}{000000} & -\multicolumn{2}{c|}{shamt} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & SRLI rd,rs1,shamt \\ -\cline{2-10} +\multicolumn{5}{c|}{imm12} & +\multicolumn{2}{c|}{100} & +\multicolumn{1}{c|}{0000011} & LBU rd,rs1,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{2}{c|}{000001} & -\multicolumn{2}{c|}{shamt} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & SRAI rd,rs1,shamt \\ -\cline{2-10} +\multicolumn{5}{c|}{imm12} & +\multicolumn{2}{c|}{101} & +\multicolumn{1}{c|}{0000011} & LHU rd,rs1,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{4}{c|}{imm12} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & ORI rd,rs1,imm12 \\ -\cline{2-10} +\multicolumn{5}{c|}{imm12} & +\multicolumn{2}{c|}{110} & +\multicolumn{1}{c|}{0000011} & LWU rd,rs1,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{4}{c|}{imm12} & +\multicolumn{1}{|c|}{imm12hi} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & ANDI rd,rs1,imm12 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{imm12lo} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{0100011} & SB rs1,rs2,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{imm12hi} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & ADD rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{imm12lo} & +\multicolumn{2}{c|}{001} & +\multicolumn{1}{c|}{0100011} & SH rs1,rs2,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000010} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{imm12hi} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & SUB rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{imm12lo} & +\multicolumn{2}{c|}{010} & +\multicolumn{1}{c|}{0100011} & SW rs1,rs2,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{imm12hi} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & SLL rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{imm12lo} & +\multicolumn{2}{c|}{011} & +\multicolumn{1}{c|}{0100011} & SD rs1,rs2,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & SLT rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{10}{c}{} & \\ +& +\multicolumn{10}{c}{\bf Atomic Memory Instructions} & \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & SLTU rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000000} & +\multicolumn{2}{c|}{010} & +\multicolumn{1}{c|}{0101011} & AMOADD.W rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & XOR rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000001} & +\multicolumn{2}{c|}{010} & +\multicolumn{1}{c|}{0101011} & AMOSWAP.W rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & SRL rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000010} & +\multicolumn{2}{c|}{010} & +\multicolumn{1}{c|}{0101011} & AMOAND.W rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000010} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & SRA rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000011} & +\multicolumn{2}{c|}{010} & +\multicolumn{1}{c|}{0101011} & AMOOR.W rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & OR rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000100} & +\multicolumn{2}{c|}{010} & +\multicolumn{1}{c|}{0101011} & AMOMIN.W rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & AND rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000101} & +\multicolumn{2}{c|}{010} & +\multicolumn{1}{c|}{0101011} & AMOMAX.W rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & MUL rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000110} & +\multicolumn{2}{c|}{010} & +\multicolumn{1}{c|}{0101011} & AMOMINU.W rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & MULH rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000111} & +\multicolumn{2}{c|}{010} & +\multicolumn{1}{c|}{0101011} & AMOMAXU.W rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & MULHSU rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000000} & +\multicolumn{2}{c|}{011} & +\multicolumn{1}{c|}{0101011} & AMOADD.D rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & MULHU rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000001} & +\multicolumn{2}{c|}{011} & +\multicolumn{1}{c|}{0101011} & AMOSWAP.D rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & DIV rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000010} & +\multicolumn{2}{c|}{011} & +\multicolumn{1}{c|}{0101011} & AMOAND.D rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & DIVU rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000011} & +\multicolumn{2}{c|}{011} & +\multicolumn{1}{c|}{0101011} & AMOOR.D rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & REM rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000100} & +\multicolumn{2}{c|}{011} & +\multicolumn{1}{c|}{0101011} & AMOMIN.D rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & REMU rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000101} & +\multicolumn{2}{c|}{011} & +\multicolumn{1}{c|}{0101011} & AMOMAX.D rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{4}{c|}{imm12} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & ADDIW rd,rs1,imm12 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000110} & +\multicolumn{2}{c|}{011} & +\multicolumn{1}{c|}{0101011} & AMOMINU.D rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{2}{c|}{000000} & -\multicolumn{1}{c|}{0} & -\multicolumn{1}{c|}{shamtw} & -\multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{rs1} & SLLIW rd,rs1,shamtw \\ -\cline{2-10} +\multicolumn{1}{|c|}{rd} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000111} & +\multicolumn{2}{c|}{011} & +\multicolumn{1}{c|}{0101011} & AMOMAXU.D rd,rs1,rs2 \\ +\cline{2-11} -& -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{2}{c|}{000000} & -\multicolumn{1}{c|}{0} & -\multicolumn{1}{c|}{shamtw} & -\multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{rs1} & SRLIW rd,rs1,shamtw \\ -\cline{2-10} - +\end{tabular} +\end{center} +\end{small} -& -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{2}{c|}{000001} & -\multicolumn{1}{c|}{0} & -\multicolumn{1}{c|}{shamtw} & -\multicolumn{1}{c|}{rd} & -\multicolumn{1}{c|}{rs1} & SRAIW rd,rs1,shamtw \\ -\cline{2-10} +\label{instr-table} +\end{table} -& -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & ADDW rd,rs1,rs2 \\ -\cline{2-10} - +\newpage +\begin{table}[p] +\begin{small} +\begin{center} +\begin{tabular}{rccccccccccl} + & +\hspace*{0.6in} & +\hspace*{0.3in} & +\hspace*{0.1in} & +\hspace*{0.1in} & +\hspace*{0.2in} & +\hspace*{0.2in} & +\hspace*{0.1in} & +\hspace*{0.3in} & +\hspace*{0.3in} & +\hspace*{0.3in} \\ + & +\instbitrange{31}{27} & +\instbitrange{26}{22} & +\instbitrange{21}{17} & +\instbit{16} & +\instbit{15} & +\instbitrange{14}{12} & +\instbitrange{11}{10} & +\instbit{9} & +\instbitrange{8}{7} & +\instbitrange{6}{0} \\ +\cline{2-11} +& +\multicolumn{9}{|c|}{jump target} & +\multicolumn{1}{c|}{opcode} & J-type \\ +\cline{2-11} +& +\multicolumn{1}{|c|}{rd} & +\multicolumn{8}{c|}{LUI-immediate} & +\multicolumn{1}{c|}{opcode} & LUI-type \\ +\cline{2-11} +& +\multicolumn{1}{|c|}{rd} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{imm[11:7]} & +\multicolumn{4}{c|}{imm[6:0]} & +\multicolumn{2}{c|}{funct3} & +\multicolumn{1}{c|}{opcode} & I-type \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000010} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{imm[11:7]} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & SUBW rd,rs1,rs2 \\ -\cline{2-10} - - -& -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & \multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & SLLW rd,rs1,rs2 \\ -\cline{2-10} - - +\multicolumn{4}{c|}{imm[6:0]} & +\multicolumn{2}{c|}{funct3} & +\multicolumn{1}{c|}{opcode} & B-type \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & +\multicolumn{1}{|c|}{rd} & +\multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rs2} & +\multicolumn{6}{c|}{funct10} & +\multicolumn{1}{c|}{opcode} & R-type \\ +\cline{2-11} +& +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & SRLW rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{rs3} & +\multicolumn{3}{c|}{funct5} & +\multicolumn{1}{c|}{opcode} & R4-type \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000010} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & SRAW rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{10}{c}{} & \\ +& +\multicolumn{10}{c}{\bf Integer Compute Instructions} & \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & MULW rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{5}{c|}{imm12} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{0010011} & ADDI rd,rs1,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & DIVW rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{2}{c|}{000000} & +\multicolumn{3}{c|}{shamt} & +\multicolumn{2}{c|}{001} & +\multicolumn{1}{c|}{0010011} & SLLI rd,rs1,shamt \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & DIVUW rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{5}{c|}{imm12} & +\multicolumn{2}{c|}{010} & +\multicolumn{1}{c|}{0010011} & SLTI rd,rs1,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & REMW rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{5}{c|}{imm12} & +\multicolumn{2}{c|}{011} & +\multicolumn{1}{c|}{0010011} & SLTIU rd,rs1,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & REMUW rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{5}{c|}{imm12} & +\multicolumn{2}{c|}{100} & +\multicolumn{1}{c|}{0010011} & XORI rd,rs1,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{4}{c|}{imm12} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & LB rd,rs1,imm12 \\ -\cline{2-10} +\multicolumn{2}{c|}{000000} & +\multicolumn{3}{c|}{shamt} & +\multicolumn{2}{c|}{101} & +\multicolumn{1}{c|}{0010011} & SRLI rd,rs1,shamt \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{4}{c|}{imm12} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & LH rd,rs1,imm12 \\ -\cline{2-10} +\multicolumn{2}{c|}{000001} & +\multicolumn{3}{c|}{shamt} & +\multicolumn{2}{c|}{101} & +\multicolumn{1}{c|}{0010011} & SRAI rd,rs1,shamt \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{4}{c|}{imm12} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & LW rd,rs1,imm12 \\ -\cline{2-10} +\multicolumn{5}{c|}{imm12} & +\multicolumn{2}{c|}{110} & +\multicolumn{1}{c|}{0010011} & ORI rd,rs1,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{4}{c|}{imm12} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & LD rd,rs1,imm12 \\ -\cline{2-10} +\multicolumn{5}{c|}{imm12} & +\multicolumn{2}{c|}{111} & +\multicolumn{1}{c|}{0010011} & ANDI rd,rs1,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{4}{c|}{imm12} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & LBU rd,rs1,imm12 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000000} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{0110011} & ADD rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{4}{c|}{imm12} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & LHU rd,rs1,imm12 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{1000000} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{0110011} & SUB rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{4}{c|}{imm12} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & LWU rd,rs1,imm12 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000000} & +\multicolumn{2}{c|}{001} & +\multicolumn{1}{c|}{0110011} & SLL rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{3}{c|}{imm12hi} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{imm12lo} & SB imm12hi,rs1,rs2,imm12lo \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000000} & +\multicolumn{2}{c|}{010} & +\multicolumn{1}{c|}{0110011} & SLT rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{3}{c|}{imm12hi} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{imm12lo} & SH imm12hi,rs1,rs2,imm12lo \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000000} & +\multicolumn{2}{c|}{011} & +\multicolumn{1}{c|}{0110011} & SLTU rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{3}{c|}{imm12hi} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{imm12lo} & SW imm12hi,rs1,rs2,imm12lo \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000000} & +\multicolumn{2}{c|}{100} & +\multicolumn{1}{c|}{0110011} & XOR rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{3}{c|}{imm12hi} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{imm12lo} & SD imm12hi,rs1,rs2,imm12lo \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000000} & +\multicolumn{2}{c|}{101} & +\multicolumn{1}{c|}{0110011} & SRL rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{3}{c|}{00000} & -\multicolumn{2}{c|}{00000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & AMOADD.W rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{1000000} & +\multicolumn{2}{c|}{101} & +\multicolumn{1}{c|}{0110011} & SRA rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{3}{c|}{00000} & -\multicolumn{2}{c|}{00000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & AMOSWAP.W rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000000} & +\multicolumn{2}{c|}{110} & +\multicolumn{1}{c|}{0110011} & OR rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{3}{c|}{00000} & -\multicolumn{2}{c|}{00000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & AMOAND.W rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000000} & +\multicolumn{2}{c|}{111} & +\multicolumn{1}{c|}{0110011} & AND rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{3}{c|}{00000} & -\multicolumn{2}{c|}{00000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & AMOOR.W rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000001} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{0110011} & MUL rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{3}{c|}{00000} & -\multicolumn{2}{c|}{00001} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & AMOMIN.W rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000001} & +\multicolumn{2}{c|}{001} & +\multicolumn{1}{c|}{0110011} & MULH rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{3}{c|}{00000} & -\multicolumn{2}{c|}{00001} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & AMOMAX.W rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000001} & +\multicolumn{2}{c|}{010} & +\multicolumn{1}{c|}{0110011} & MULHSU rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{3}{c|}{00000} & -\multicolumn{2}{c|}{00001} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & AMOMINU.W rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000001} & +\multicolumn{2}{c|}{011} & +\multicolumn{1}{c|}{0110011} & MULHU rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{3}{c|}{00000} & -\multicolumn{2}{c|}{00001} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & AMOMAXU.W rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000001} & +\multicolumn{2}{c|}{100} & +\multicolumn{1}{c|}{0110011} & DIV rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{3}{c|}{00000} & -\multicolumn{2}{c|}{00000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & AMOADD.D rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000001} & +\multicolumn{2}{c|}{101} & +\multicolumn{1}{c|}{0110011} & DIVU rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{3}{c|}{00000} & -\multicolumn{2}{c|}{00000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & AMOSWAP.D rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000001} & +\multicolumn{2}{c|}{110} & +\multicolumn{1}{c|}{0110011} & REM rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{3}{c|}{00000} & -\multicolumn{2}{c|}{00000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & AMOAND.D rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000001} & +\multicolumn{2}{c|}{111} & +\multicolumn{1}{c|}{0110011} & REMU rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{3}{c|}{00000} & -\multicolumn{2}{c|}{00000} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & AMOOR.D rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{|c|}{rd} & +\multicolumn{8}{c|}{imm20} & +\multicolumn{1}{c|}{0110111} & LUI rd,imm20 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{3}{c|}{00000} & -\multicolumn{2}{c|}{00001} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & AMOMIN.D rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{10}{c}{} & \\ +& +\multicolumn{10}{c}{\bf 32-bit Integer Compute Instructions} & \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{3}{c|}{00000} & -\multicolumn{2}{c|}{00001} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & AMOMAX.D rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{5}{c|}{imm12} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{0011011} & ADDIW rd,rs1,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{3}{c|}{00000} & -\multicolumn{2}{c|}{00001} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & AMOMINU.D rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{3}{c|}{0000000} & +\multicolumn{2}{c|}{shamtw} & +\multicolumn{2}{c|}{001} & +\multicolumn{1}{c|}{0011011} & SLLIW rd,rs1,shamtw \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{3}{c|}{00000} & -\multicolumn{2}{c|}{00001} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & AMOMAXU.D rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{3}{c|}{0000000} & +\multicolumn{2}{c|}{shamtw} & +\multicolumn{2}{c|}{101} & +\multicolumn{1}{c|}{0011011} & SRLIW rd,rs1,shamtw \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{4}{c|}{imm12} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FENCE.I rd,rs1,imm12 \\ -\cline{2-10} +\multicolumn{3}{c|}{0000010} & +\multicolumn{2}{c|}{shamtw} & +\multicolumn{2}{c|}{101} & +\multicolumn{1}{c|}{0011011} & SRAIW rd,rs1,shamtw \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{4}{c|}{imm12} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FENCE rd,rs1,imm12 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000000} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{0111011} & ADDW rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{00000} & SYSCALL \\ -\cline{2-10} +\multicolumn{1}{|c|}{rd} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{1000000} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{0111011} & SUBW rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{00000} & BREAK \\ -\cline{2-10} +\multicolumn{1}{|c|}{rd} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000000} & +\multicolumn{2}{c|}{001} & +\multicolumn{1}{c|}{0111011} & SLLW rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{rd} & EI rd \\ -\cline{2-10} +\multicolumn{1}{|c|}{rd} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000000} & +\multicolumn{2}{c|}{101} & +\multicolumn{1}{c|}{0111011} & SRLW rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{rd} & DI rd \\ -\cline{2-10} +\multicolumn{1}{|c|}{rd} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{1000000} & +\multicolumn{2}{c|}{101} & +\multicolumn{1}{c|}{0111011} & SRAW rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & +\multicolumn{1}{|c|}{rd} & +\multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{rd} & MFPCR rd,rs2 \\ -\cline{2-10} +\multicolumn{4}{c|}{0000001} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{0111011} & MULW rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{00000} & MTPCR rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000001} & +\multicolumn{2}{c|}{100} & +\multicolumn{1}{c|}{0111011} & DIVW rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{00000} & ERET \\ -\cline{2-10} +\multicolumn{1}{|c|}{rd} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000001} & +\multicolumn{2}{c|}{101} & +\multicolumn{1}{c|}{0111011} & DIVUW rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{00000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FADD.S rd,rs1,rs2[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000001} & +\multicolumn{2}{c|}{110} & +\multicolumn{1}{c|}{0111011} & REMW rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{00000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FSUB.S rd,rs1,rs2[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{0000001} & +\multicolumn{2}{c|}{111} & +\multicolumn{1}{c|}{0111011} & REMUW rd,rs1,rs2 \\ +\cline{2-11} -& -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{00000} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FMUL.S rd,rs1,rs2[,rm] \\ -\cline{2-10} +\end{tabular} +\end{center} +\end{small} + +\label{instr-table} +\end{table} +\newpage + +\begin{table}[p] +\begin{small} +\begin{center} +\begin{tabular}{rccccccccccl} + & +\hspace*{0.6in} & +\hspace*{0.3in} & +\hspace*{0.1in} & +\hspace*{0.1in} & +\hspace*{0.2in} & +\hspace*{0.2in} & +\hspace*{0.1in} & +\hspace*{0.3in} & +\hspace*{0.3in} & +\hspace*{0.3in} \\ + & +\instbitrange{31}{27} & +\instbitrange{26}{22} & +\instbitrange{21}{17} & +\instbit{16} & +\instbit{15} & +\instbitrange{14}{12} & +\instbitrange{11}{10} & +\instbit{9} & +\instbitrange{8}{7} & +\instbitrange{6}{0} \\ +\cline{2-11} +& +\multicolumn{9}{|c|}{jump target} & +\multicolumn{1}{c|}{opcode} & J-type \\ +\cline{2-11} +& +\multicolumn{1}{|c|}{rd} & +\multicolumn{8}{c|}{LUI-immediate} & +\multicolumn{1}{c|}{opcode} & LUI-type \\ +\cline{2-11} +& +\multicolumn{1}{|c|}{rd} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{imm[11:7]} & +\multicolumn{4}{c|}{imm[6:0]} & +\multicolumn{2}{c|}{funct3} & +\multicolumn{1}{c|}{opcode} & I-type \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{00000} & +\multicolumn{1}{|c|}{imm[11:7]} & +\multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{imm[6:0]} & +\multicolumn{2}{c|}{funct3} & +\multicolumn{1}{c|}{opcode} & B-type \\ +\cline{2-11} +& +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FDIV.S rd,rs1,rs2[,rm] \\ -\cline{2-10} - - +\multicolumn{1}{c|}{rs2} & +\multicolumn{6}{c|}{funct10} & +\multicolumn{1}{c|}{opcode} & R-type \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{00000} & -\multicolumn{1}{c|}{00000} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FSQRT.S rd,rs1[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{rs3} & +\multicolumn{3}{c|}{funct5} & +\multicolumn{1}{c|}{opcode} & R4-type \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FSGNJ.S rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{10}{c}{} & \\ +& +\multicolumn{10}{c}{\bf Floating-Point Memory Instructions} & \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FSGNJN.S rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{5}{c|}{imm12} & +\multicolumn{2}{c|}{010} & +\multicolumn{1}{c|}{0000111} & FLW rd,rs1,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FSGNJX.S rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{5}{c|}{imm12} & +\multicolumn{2}{c|}{011} & +\multicolumn{1}{c|}{0000111} & FLD rd,rs1,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{00000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{imm12hi} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FADD.D rd,rs1,rs2[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{imm12lo} & +\multicolumn{2}{c|}{010} & +\multicolumn{1}{c|}{0100111} & FSW rs1,rs2,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{00000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{imm12hi} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FSUB.D rd,rs1,rs2[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{imm12lo} & +\multicolumn{2}{c|}{011} & +\multicolumn{1}{c|}{0100111} & FSD rs1,rs2,imm12 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{00000} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FMUL.D rd,rs1,rs2[,rm] \\ -\cline{2-10} +\multicolumn{10}{c}{} & \\ +& +\multicolumn{10}{c}{\bf Floating-Point Compute Instructions} & \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{00000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FDIV.D rd,rs1,rs2[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{00000} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1010011} & FADD.S rd,rs1,rs2[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{00000} & -\multicolumn{1}{c|}{00000} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FSQRT.D rd,rs1[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{00001} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1010011} & FSUB.S rd,rs1,rs2[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FSGNJ.D rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{00010} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1010011} & FMUL.S rd,rs1,rs2[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FSGNJN.D rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{00011} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1010011} & FDIV.S rd,rs1,rs2[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FSGNJX.D rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{00000} & +\multicolumn{3}{c|}{00100} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1010011} & FSQRT.S rd,rs1[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{00001} & -\multicolumn{1}{c|}{00000} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FCVT.L.S rd,rs1[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{11000} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1010011} & FMIN.S rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{00001} & -\multicolumn{1}{c|}{00000} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FCVT.LU.S rd,rs1[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{11001} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1010011} & FMAX.S rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{00001} & -\multicolumn{1}{c|}{00000} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FCVT.W.S rd,rs1[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{00000} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1010011} & FADD.D rd,rs1,rs2[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{00001} & -\multicolumn{1}{c|}{00000} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FCVT.WU.S rd,rs1[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{00001} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1010011} & FSUB.D rd,rs1,rs2[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{00001} & -\multicolumn{1}{c|}{00000} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FCVT.L.D rd,rs1[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{00010} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1010011} & FMUL.D rd,rs1,rs2[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{00001} & -\multicolumn{1}{c|}{00000} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FCVT.LU.D rd,rs1[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{00011} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1010011} & FDIV.D rd,rs1,rs2[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{00001} & -\multicolumn{1}{c|}{00000} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FCVT.W.D rd,rs1[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{00000} & +\multicolumn{3}{c|}{00100} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1010011} & FSQRT.D rd,rs1[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{00001} & -\multicolumn{1}{c|}{00000} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FCVT.WU.D rd,rs1[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{11000} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1010011} & FMIN.D rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{00001} & -\multicolumn{1}{c|}{00000} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FCVT.S.L rd,rs1[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{11001} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1010011} & FMAX.D rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{00001} & -\multicolumn{1}{c|}{00000} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FCVT.S.LU rd,rs1[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{rs3} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1000011} & FMADD.S rd,rs1,rs2,rs3[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{00001} & -\multicolumn{1}{c|}{00000} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FCVT.S.W rd,rs1[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{rs3} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1000111} & FMSUB.S rd,rs1,rs2,rs3[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{00001} & -\multicolumn{1}{c|}{00000} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FCVT.S.WU rd,rs1[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{rs3} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1001011} & FNMSUB.S rd,rs1,rs2,rs3[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{00001} & -\multicolumn{1}{c|}{00000} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FCVT.D.L rd,rs1[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{rs3} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1001111} & FNMADD.S rd,rs1,rs2,rs3[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{00001} & -\multicolumn{1}{c|}{00000} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FCVT.D.LU rd,rs1[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{rs3} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1000011} & FMADD.D rd,rs1,rs2,rs3[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000001} & -\multicolumn{1}{c|}{00000} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FCVT.D.W rd,rs1 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{rs3} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1000111} & FMSUB.D rd,rs1,rs2,rs3[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000001} & -\multicolumn{1}{c|}{00000} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FCVT.D.WU rd,rs1 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{rs3} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1001011} & FNMSUB.D rd,rs1,rs2,rs3[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{00010} & -\multicolumn{1}{c|}{00000} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FCVT.S.D rd,rs1[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{rs3} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1001111} & FNMADD.D rd,rs1,rs2,rs3[,rm] \\ +\cline{2-11} -& -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{00010} & -\multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FCVT.D.S rd,rs1[,rm] \\ -\cline{2-10} +\end{tabular} +\end{center} +\end{small} + +\label{instr-table} +\end{table} +\newpage + +\begin{table}[p] +\begin{small} +\begin{center} +\begin{tabular}{rccccccccccl} + & +\hspace*{0.6in} & +\hspace*{0.3in} & +\hspace*{0.1in} & +\hspace*{0.1in} & +\hspace*{0.2in} & +\hspace*{0.2in} & +\hspace*{0.1in} & +\hspace*{0.3in} & +\hspace*{0.3in} & +\hspace*{0.3in} \\ + & +\instbitrange{31}{27} & +\instbitrange{26}{22} & +\instbitrange{21}{17} & +\instbit{16} & +\instbit{15} & +\instbitrange{14}{12} & +\instbitrange{11}{10} & +\instbit{9} & +\instbitrange{8}{7} & +\instbitrange{6}{0} \\ +\cline{2-11} +& +\multicolumn{9}{|c|}{jump target} & +\multicolumn{1}{c|}{opcode} & J-type \\ +\cline{2-11} +& +\multicolumn{1}{|c|}{rd} & +\multicolumn{8}{c|}{LUI-immediate} & +\multicolumn{1}{c|}{opcode} & LUI-type \\ +\cline{2-11} +& +\multicolumn{1}{|c|}{rd} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{imm[11:7]} & +\multicolumn{4}{c|}{imm[6:0]} & +\multicolumn{2}{c|}{funct3} & +\multicolumn{1}{c|}{opcode} & I-type \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000010} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{imm[11:7]} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FEQ.S rd,rs1,rs2 \\ -\cline{2-10} - - +\multicolumn{1}{c|}{rs2} & +\multicolumn{4}{c|}{imm[6:0]} & +\multicolumn{2}{c|}{funct3} & +\multicolumn{1}{c|}{opcode} & B-type \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000010} & +\multicolumn{1}{|c|}{rd} & +\multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rs2} & +\multicolumn{6}{c|}{funct10} & +\multicolumn{1}{c|}{opcode} & R-type \\ +\cline{2-11} +& +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FLT.S rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{rs3} & +\multicolumn{3}{c|}{funct5} & +\multicolumn{1}{c|}{opcode} & R4-type \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000010} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FLE.S rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{10}{c}{} & \\ +& +\multicolumn{10}{c}{\bf Floating-Point Move \& Conversion Instructions} & \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000010} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FEQ.D rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{00101} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1010011} & FSGNJ.S rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000010} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FLT.D rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{00110} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1010011} & FSGNJN.S rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000010} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FLE.D rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{00111} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1010011} & FSGNJX.S rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000011} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FMIN.S rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{00101} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1010011} & FSGNJ.D rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000011} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FMAX.S rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{00110} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1010011} & FSGNJN.D rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000011} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FMINMAG.S rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{00111} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1010011} & FSGNJX.D rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000011} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FMAXMAG.S rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{00000} & +\multicolumn{3}{c|}{10001} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1010011} & FCVT.S.D rd,rs1[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000011} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FMIN.D rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{00000} & +\multicolumn{3}{c|}{10000} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1010011} & FCVT.D.S rd,rs1 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000011} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FMAX.D rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{10}{c}{} & \\ +& +\multicolumn{10}{c}{\bf Integer to Floating-Point Move \& Conversion Instructions} & \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000011} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FMINMAG.D rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{00000} & +\multicolumn{3}{c|}{01100} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1010011} & FCVT.S.L rd,rs1[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000011} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FMAXMAG.D rd,rs1,rs2 \\ -\cline{2-10} +\multicolumn{1}{c|}{00000} & +\multicolumn{3}{c|}{01101} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1010011} & FCVT.S.LU rd,rs1[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000011} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & +\multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{rd} & MFTX.S rd,rs2 \\ -\cline{2-10} +\multicolumn{3}{c|}{01110} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1010011} & FCVT.S.W rd,rs1[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000011} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & +\multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{rd} & MFTX.D rd,rs2 \\ -\cline{2-10} +\multicolumn{3}{c|}{01111} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1010011} & FCVT.S.WU rd,rs1[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000011} & -\multicolumn{1}{c|}{00000} & +\multicolumn{1}{|c|}{rd} & +\multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{rd} & MFFSR rd \\ -\cline{2-10} +\multicolumn{3}{c|}{01100} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1010011} & FCVT.D.L rd,rs1[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000011} & -\multicolumn{1}{c|}{00000} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & MXTF.S rd,rs1 \\ -\cline{2-10} +\multicolumn{1}{c|}{00000} & +\multicolumn{3}{c|}{01101} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1010011} & FCVT.D.LU rd,rs1[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000011} & -\multicolumn{1}{c|}{00000} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & MXTF.D rd,rs1 \\ -\cline{2-10} +\multicolumn{1}{c|}{00000} & +\multicolumn{3}{c|}{01110} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1010011} & FCVT.D.W rd,rs1 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000011} & -\multicolumn{1}{c|}{00000} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & MTFSR rd,rs1 \\ -\cline{2-10} +\multicolumn{1}{c|}{00000} & +\multicolumn{3}{c|}{01111} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1010011} & FCVT.D.WU rd,rs1 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{4}{c|}{imm12} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FLW rd,rs1,imm12 \\ -\cline{2-10} +\multicolumn{1}{c|}{00000} & +\multicolumn{3}{c|}{11110} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1010011} & MXTF.S rd,rs1 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{4}{c|}{imm12} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FLD rd,rs1,imm12 \\ -\cline{2-10} +\multicolumn{1}{c|}{00000} & +\multicolumn{3}{c|}{11110} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1010011} & MXTF.D rd,rs1 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{3}{c|}{imm12hi} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{imm12lo} & FSW imm12hi,rs1,rs2,imm12lo \\ -\cline{2-10} +\multicolumn{1}{c|}{00000} & +\multicolumn{3}{c|}{11111} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1010011} & MTFSR rd,rs1 \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{3}{c|}{imm12hi} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{imm12lo} & FSD imm12hi,rs1,rs2,imm12lo \\ -\cline{2-10} +\multicolumn{10}{c}{} & \\ +& +\multicolumn{10}{c}{\bf Floating-Point to Integer Move \& Conversion Instructions} & \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{rs3} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FMADD.S rd,rs1,rs2,rs3[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{00000} & +\multicolumn{3}{c|}{01000} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1010011} & FCVT.L.S rd,rs1[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{rs3} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FMSUB.S rd,rs1,rs2,rs3[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{00000} & +\multicolumn{3}{c|}{01001} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1010011} & FCVT.LU.S rd,rs1[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{rs3} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FNMSUB.S rd,rs1,rs2,rs3[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{00000} & +\multicolumn{3}{c|}{01010} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1010011} & FCVT.W.S rd,rs1[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{rs3} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FNMADD.S rd,rs1,rs2,rs3[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{00000} & +\multicolumn{3}{c|}{01011} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1010011} & FCVT.WU.S rd,rs1[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{rs3} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FMADD.D rd,rs1,rs2,rs3[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{00000} & +\multicolumn{3}{c|}{01000} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1010011} & FCVT.L.D rd,rs1[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{rs3} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FMSUB.D rd,rs1,rs2,rs3[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{00000} & +\multicolumn{3}{c|}{01001} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1010011} & FCVT.LU.D rd,rs1[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{rs3} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FNMSUB.D rd,rs1,rs2,rs3[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{00000} & +\multicolumn{3}{c|}{01010} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1010011} & FCVT.W.D rd,rs1[,rm] \\ +\cline{2-11} & -\multicolumn{1}{|c|}{0000000} & -\multicolumn{1}{c|}{00} & -\multicolumn{2}{c|}{rm} & -\multicolumn{2}{c|}{rs3} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & FNMADD.D rd,rs1,rs2,rs3[,rm] \\ -\cline{2-10} +\multicolumn{1}{c|}{00000} & +\multicolumn{3}{c|}{01011} & +\multicolumn{2}{c|}{rm} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1010011} & FCVT.WU.D rd,rs1[,rm] \\ +\cline{2-11} & -\multicolumn{9}{c}{} & \\ -& -\multicolumn{9}{c}{\bf Control Transfer Instructions} & \\ -\cline{2-10} +\multicolumn{1}{|c|}{rd} & +\multicolumn{1}{c|}{00000} & +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{11100} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1010011} & MFTX.S rd,rs2 \\ +\cline{2-11} & -\multicolumn{9}{c}{} & \\ -& -\multicolumn{9}{c}{\bf Memory Instructions} & \\ -\cline{2-10} +\multicolumn{1}{|c|}{rd} & +\multicolumn{1}{c|}{00000} & +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{11100} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1010011} & MFTX.D rd,rs2 \\ +\cline{2-11} & -\multicolumn{9}{c}{} & \\ -& -\multicolumn{9}{c}{\bf Atomic Memory Instructions} & \\ -\cline{2-10} +\multicolumn{1}{|c|}{rd} & +\multicolumn{1}{c|}{00000} & +\multicolumn{1}{c|}{00000} & +\multicolumn{3}{c|}{11101} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1010011} & MFFSR rd \\ +\cline{2-11} \end{tabular} @@ -1614,11 +1793,12 @@ \begin{table}[p] \begin{small} \begin{center} -\begin{tabular}{rcccccccccl} +\begin{tabular}{rccccccccccl} & \hspace*{0.6in} & \hspace*{0.3in} & \hspace*{0.1in} & +\hspace*{0.1in} & \hspace*{0.2in} & \hspace*{0.2in} & \hspace*{0.1in} & @@ -1626,353 +1806,182 @@ \hspace*{0.3in} & \hspace*{0.3in} \\ & -\instbitrange{31}{25} & -\instbitrange{24}{23} & -\instbit{22} & -\instbitrange{21}{20} & -\instbitrange{19}{16} & +\instbitrange{31}{27} & +\instbitrange{26}{22} & +\instbitrange{21}{17} & +\instbit{16} & \instbit{15} & -\instbitrange{14}{10} & -\instbitrange{9}{5} & -\instbitrange{4}{0} \\ -\cline{2-10} -& -\multicolumn{1}{|c|}{opcode} & -\multicolumn{8}{c|}{jump target} & J-type \\ -\cline{2-10} -& -\multicolumn{1}{|c|}{opcode} & -\multicolumn{7}{c|}{LUI-immediate} & -\multicolumn{1}{c|}{rd} & LUI-type \\ -\cline{2-10} -& -\multicolumn{1}{|c|}{opcode} & +\instbitrange{14}{12} & +\instbitrange{11}{10} & +\instbit{9} & +\instbitrange{8}{7} & +\instbitrange{6}{0} \\ +\cline{2-11} +& +\multicolumn{9}{|c|}{jump target} & +\multicolumn{1}{c|}{opcode} & J-type \\ +\cline{2-11} +& +\multicolumn{1}{|c|}{rd} & +\multicolumn{8}{c|}{LUI-immediate} & +\multicolumn{1}{c|}{opcode} & LUI-type \\ +\cline{2-11} +& +\multicolumn{1}{|c|}{rd} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{imm[11:7]} & +\multicolumn{4}{c|}{imm[6:0]} & \multicolumn{2}{c|}{funct3} & -\multicolumn{4}{c|}{immediate} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & I-type \\ -\cline{2-10} +\multicolumn{1}{c|}{opcode} & I-type \\ +\cline{2-11} & -\multicolumn{1}{|c|}{opcode} & -\multicolumn{2}{c|}{funct3} & -\multicolumn{3}{c|}{immed[11:5]} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{imm[11:7]} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{immed[4:0]} & B-type \\ -\cline{2-10} -& -\multicolumn{1}{|c|}{opcode} & -\multicolumn{5}{c|}{funct10} & \multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & R-type \\ -\cline{2-10} +\multicolumn{4}{c|}{imm[6:0]} & +\multicolumn{2}{c|}{funct3} & +\multicolumn{1}{c|}{opcode} & B-type \\ +\cline{2-11} & -\multicolumn{1}{|c|}{opcode} & -\multicolumn{3}{c|}{funct5} & -\multicolumn{2}{c|}{rs3} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & R4-type \\ -\cline{2-10} - - -& -\multicolumn{9}{c}{} & \\ +\multicolumn{1}{c|}{rs2} & +\multicolumn{6}{c|}{funct10} & +\multicolumn{1}{c|}{opcode} & R-type \\ +\cline{2-11} & -\multicolumn{9}{c}{\bf Integer Compute Instructions} & \\ -\cline{2-10} +\multicolumn{1}{|c|}{rd} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{rs3} & +\multicolumn{3}{c|}{funct5} & +\multicolumn{1}{c|}{opcode} & R4-type \\ +\cline{2-11} & -\multicolumn{9}{c}{} & \\ +\multicolumn{10}{c}{} & \\ & -\multicolumn{9}{c}{\bf 32-bit Integer Compute Instructions} & \\ -\cline{2-10} - - -\end{tabular} -\end{center} -\end{small} - -\label{instr-table} -\end{table} +\multicolumn{10}{c}{\bf Floating-Point Compare Instructions} & \\ +\cline{2-11} -\newpage - -\begin{table}[p] -\begin{small} -\begin{center} -\begin{tabular}{rcccccccccl} - & -\hspace*{0.6in} & -\hspace*{0.3in} & -\hspace*{0.1in} & -\hspace*{0.2in} & -\hspace*{0.2in} & -\hspace*{0.1in} & -\hspace*{0.3in} & -\hspace*{0.3in} & -\hspace*{0.3in} \\ - & -\instbitrange{31}{25} & -\instbitrange{24}{23} & -\instbit{22} & -\instbitrange{21}{20} & -\instbitrange{19}{16} & -\instbit{15} & -\instbitrange{14}{10} & -\instbitrange{9}{5} & -\instbitrange{4}{0} \\ -\cline{2-10} -& -\multicolumn{1}{|c|}{opcode} & -\multicolumn{8}{c|}{jump target} & J-type \\ -\cline{2-10} -& -\multicolumn{1}{|c|}{opcode} & -\multicolumn{7}{c|}{LUI-immediate} & -\multicolumn{1}{c|}{rd} & LUI-type \\ -\cline{2-10} -& -\multicolumn{1}{|c|}{opcode} & -\multicolumn{2}{c|}{funct3} & -\multicolumn{4}{c|}{immediate} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & I-type \\ -\cline{2-10} -& -\multicolumn{1}{|c|}{opcode} & -\multicolumn{2}{c|}{funct3} & -\multicolumn{3}{c|}{immed[11:5]} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{immed[4:0]} & B-type \\ -\cline{2-10} & -\multicolumn{1}{|c|}{opcode} & -\multicolumn{5}{c|}{funct10} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & R-type \\ -\cline{2-10} -& -\multicolumn{1}{|c|}{opcode} & -\multicolumn{3}{c|}{funct5} & -\multicolumn{2}{c|}{rs3} & \multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & R4-type \\ -\cline{2-10} +\multicolumn{3}{c|}{10101} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1010011} & FEQ.S rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{9}{c}{} & \\ -& -\multicolumn{9}{c}{\bf Floating-Point Memory Instructions} & \\ -\cline{2-10} +\multicolumn{1}{|c|}{rd} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{10110} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1010011} & FLT.S rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{9}{c}{} & \\ -& -\multicolumn{9}{c}{\bf Floating-Point Compute Instructions} & \\ -\cline{2-10} - - -\end{tabular} -\end{center} -\end{small} - -\label{instr-table} -\end{table} +\multicolumn{1}{|c|}{rd} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{10111} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{00} & +\multicolumn{1}{c|}{1010011} & FLE.S rd,rs1,rs2 \\ +\cline{2-11} -\newpage - -\begin{table}[p] -\begin{small} -\begin{center} -\begin{tabular}{rcccccccccl} - & -\hspace*{0.6in} & -\hspace*{0.3in} & -\hspace*{0.1in} & -\hspace*{0.2in} & -\hspace*{0.2in} & -\hspace*{0.1in} & -\hspace*{0.3in} & -\hspace*{0.3in} & -\hspace*{0.3in} \\ - & -\instbitrange{31}{25} & -\instbitrange{24}{23} & -\instbit{22} & -\instbitrange{21}{20} & -\instbitrange{19}{16} & -\instbit{15} & -\instbitrange{14}{10} & -\instbitrange{9}{5} & -\instbitrange{4}{0} \\ -\cline{2-10} & -\multicolumn{1}{|c|}{opcode} & -\multicolumn{8}{c|}{jump target} & J-type \\ -\cline{2-10} -& -\multicolumn{1}{|c|}{opcode} & -\multicolumn{7}{c|}{LUI-immediate} & -\multicolumn{1}{c|}{rd} & LUI-type \\ -\cline{2-10} -& -\multicolumn{1}{|c|}{opcode} & -\multicolumn{2}{c|}{funct3} & -\multicolumn{4}{c|}{immediate} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & I-type \\ -\cline{2-10} -& -\multicolumn{1}{|c|}{opcode} & -\multicolumn{2}{c|}{funct3} & -\multicolumn{3}{c|}{immed[11:5]} & \multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{immed[4:0]} & B-type \\ -\cline{2-10} +\multicolumn{3}{c|}{10101} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1010011} & FEQ.D rd,rs1,rs2 \\ +\cline{2-11} + + & -\multicolumn{1}{|c|}{opcode} & -\multicolumn{5}{c|}{funct10} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & R-type \\ -\cline{2-10} -& -\multicolumn{1}{|c|}{opcode} & -\multicolumn{3}{c|}{funct5} & -\multicolumn{2}{c|}{rs3} & \multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & R4-type \\ -\cline{2-10} +\multicolumn{3}{c|}{10110} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1010011} & FLT.D rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{9}{c}{} & \\ -& -\multicolumn{9}{c}{\bf Floating-Point Move \& Conversion Instructions} & \\ -\cline{2-10} +\multicolumn{1}{|c|}{rd} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{rs2} & +\multicolumn{3}{c|}{10111} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{01} & +\multicolumn{1}{c|}{1010011} & FLE.D rd,rs1,rs2 \\ +\cline{2-11} & -\multicolumn{9}{c}{} & \\ +\multicolumn{10}{c}{} & \\ & -\multicolumn{9}{c}{\bf Integer to Floating-Point Move \& Conversion Instructions} & \\ -\cline{2-10} +\multicolumn{10}{c}{\bf Miscellaneous Memory Instructions} & \\ +\cline{2-11} & -\multicolumn{9}{c}{} & \\ -& -\multicolumn{9}{c}{\bf Floating-Point to Integer Move \& Conversion Instructions} & \\ -\cline{2-10} - - -\end{tabular} -\end{center} -\end{small} - -\label{instr-table} -\end{table} +\multicolumn{1}{|c|}{rd} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{5}{c|}{imm12} & +\multicolumn{2}{c|}{001} & +\multicolumn{1}{c|}{0101111} & FENCE.I rd,rs1,imm12 \\ +\cline{2-11} -\newpage - -\begin{table}[p] -\begin{small} -\begin{center} -\begin{tabular}{rcccccccccl} - & -\hspace*{0.6in} & -\hspace*{0.3in} & -\hspace*{0.1in} & -\hspace*{0.2in} & -\hspace*{0.2in} & -\hspace*{0.1in} & -\hspace*{0.3in} & -\hspace*{0.3in} & -\hspace*{0.3in} \\ - & -\instbitrange{31}{25} & -\instbitrange{24}{23} & -\instbit{22} & -\instbitrange{21}{20} & -\instbitrange{19}{16} & -\instbit{15} & -\instbitrange{14}{10} & -\instbitrange{9}{5} & -\instbitrange{4}{0} \\ -\cline{2-10} -& -\multicolumn{1}{|c|}{opcode} & -\multicolumn{8}{c|}{jump target} & J-type \\ -\cline{2-10} -& -\multicolumn{1}{|c|}{opcode} & -\multicolumn{7}{c|}{LUI-immediate} & -\multicolumn{1}{c|}{rd} & LUI-type \\ -\cline{2-10} -& -\multicolumn{1}{|c|}{opcode} & -\multicolumn{2}{c|}{funct3} & -\multicolumn{4}{c|}{immediate} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & I-type \\ -\cline{2-10} -& -\multicolumn{1}{|c|}{opcode} & -\multicolumn{2}{c|}{funct3} & -\multicolumn{3}{c|}{immed[11:5]} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{immed[4:0]} & B-type \\ -\cline{2-10} & -\multicolumn{1}{|c|}{opcode} & -\multicolumn{5}{c|}{funct10} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & R-type \\ -\cline{2-10} -& -\multicolumn{1}{|c|}{opcode} & -\multicolumn{3}{c|}{funct5} & -\multicolumn{2}{c|}{rs3} & -\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{|c|}{rd} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & R4-type \\ -\cline{2-10} +\multicolumn{5}{c|}{imm12} & +\multicolumn{2}{c|}{010} & +\multicolumn{1}{c|}{0101111} & FENCE rd,rs1,imm12 \\ +\cline{2-11} & -\multicolumn{9}{c}{} & \\ +\multicolumn{10}{c}{} & \\ & -\multicolumn{9}{c}{\bf Floating-Point Compare Instructions} & \\ -\cline{2-10} +\multicolumn{10}{c}{\bf System Instructions} & \\ +\cline{2-11} & -\multicolumn{9}{c}{} & \\ -& -\multicolumn{9}{c}{\bf Miscellaneous Instructions} & \\ -\cline{2-10} +\multicolumn{1}{|c|}{00000} & +\multicolumn{1}{c|}{00000} & +\multicolumn{1}{c|}{00000} & +\multicolumn{4}{c|}{0000000} & +\multicolumn{2}{c|}{000} & +\multicolumn{1}{c|}{1110111} & SYSCALL \\ +\cline{2-11} & -\multicolumn{9}{c}{} & \\ -& -\multicolumn{9}{c}{\bf Privileged Instructions} & \\ -\cline{2-10} +\multicolumn{1}{|c|}{00000} & +\multicolumn{1}{c|}{00000} & +\multicolumn{1}{c|}{00000} & +\multicolumn{4}{c|}{0000000} & +\multicolumn{2}{c|}{001} & +\multicolumn{1}{c|}{1110111} & BREAK \\ +\cline{2-11} \end{tabular} diff --git a/parse-opcodes b/parse-opcodes index ad07965..78ff655 100755 --- a/parse-opcodes +++ b/parse-opcodes @@ -42,12 +42,18 @@ typelut[0x2F] = 4 typelut[0x77] = 4 typelut[0x07] = 3 typelut[0x27] = 10 -typelut[0x53] = 4 -typelut[0x43] = 5 -typelut[0x47] = 5 -typelut[0x4B] = 5 -typelut[0x4F] = 5 +typelut[0x53] = 9 +typelut[0x43] = 8 +typelut[0x47] = 8 +typelut[0x4B] = 8 +typelut[0x4F] = 8 typelut[0x7B] = 4 +typelut[0x2B] = 4 + +opcode_base = 0 +opcode_size = 7 +funct_base = 7 +funct_size = 3 def binary(n, digits=0): rep = bin(n)[2:] @@ -61,11 +67,6 @@ def make_disasm_table(match,mask): print '#define MASK_%s %s' % (name2, hex(mask[name])) def make_switch(match,mask): - opcode_base = 0 - opcode_size = 7 - funct_base = 7 - funct_size = 3 - opcode_mask = ((1<<(opcode_base+opcode_size))-(1<<opcode_base)) funct_mask = ((1<<(funct_base+funct_size))-(1<<funct_base)) @@ -151,19 +152,22 @@ def str_arg(arg0,arg1,match,arguments): def str_inst(name,arguments): ret = name.upper() + ' ' + if 'imm12hi' in arguments and 'imm12lo' in arguments: + arguments.remove('imm12hi') + arguments.remove('imm12lo') + arguments.append('imm12') for idx in range(len(arguments)): ret = ret + arguments[idx] if idx != len(arguments)-1: ret = ret + ',' - ret = ret.replace('imm12lo,imm12hi','imm12') ret = ret.replace(',rm','[,rm]') return ret def print_unimp_type(name,match,arguments): print """ & -\\multicolumn{9}{|c|}{%s} & %s \\\\ -\\cline{2-10} +\\multicolumn{10}{|c|}{%s} & %s \\\\ +\\cline{2-11} """ % \ ( \ '0'*32, \ @@ -173,13 +177,13 @@ def print_unimp_type(name,match,arguments): def print_j_type(name,match,arguments): print """ & -\\multicolumn{1}{|c|}{%s} & -\\multicolumn{8}{c|}{%s} & %s \\\\ -\\cline{2-10} +\\multicolumn{9}{|c|}{%s} & +\\multicolumn{1}{c|}{%s} & %s \\\\ +\\cline{2-11} """ % \ ( \ - binary(yank(match,25,7),7), \ str_arg('imm25','',match,arguments), \ + binary(yank(match,opcode_base,opcode_size),opcode_size), \ str_inst(name,arguments) \ ) @@ -187,14 +191,14 @@ def print_lui_type(name,match,arguments): print """ & \\multicolumn{1}{|c|}{%s} & -\\multicolumn{7}{c|}{%s} & +\\multicolumn{8}{c|}{%s} & \\multicolumn{1}{c|}{%s} & %s \\\\ -\\cline{2-10} +\\cline{2-11} """ % \ ( \ - binary(yank(match,25,7),7), \ - str_arg('imm20','',match,arguments), \ str_arg('rd','',match,arguments), \ + str_arg('imm20','',match,arguments), \ + binary(yank(match,opcode_base,opcode_size),opcode_size), \ str_inst(name,arguments) \ ) @@ -202,20 +206,20 @@ def print_b_type(name,match,arguments): print """ & \\multicolumn{1}{|c|}{%s} & -\\multicolumn{2}{c|}{%s} & -\\multicolumn{3}{c|}{%s} & \\multicolumn{1}{c|}{%s} & \\multicolumn{1}{c|}{%s} & +\\multicolumn{4}{c|}{%s} & +\\multicolumn{2}{c|}{%s} & \\multicolumn{1}{c|}{%s} & %s \\\\ -\\cline{2-10} +\\cline{2-11} """ % \ ( \ - binary(yank(match,25,7),7), \ - binary(yank(match,22,3),3), \ str_arg('imm12hi','',match,arguments), \ - str_arg('rs2','',match,arguments), \ str_arg('rs1','',match,arguments), \ + str_arg('rs2','',match,arguments), \ str_arg('imm12lo','',match,arguments), \ + binary(yank(match,funct_base,funct_size),funct_size), \ + binary(yank(match,opcode_base,opcode_size),opcode_size), \ str_inst(name,arguments) \ ) @@ -223,18 +227,18 @@ def print_i_type(name,match,arguments): print """ & \\multicolumn{1}{|c|}{%s} & -\\multicolumn{2}{c|}{%s} & -\\multicolumn{4}{c|}{%s} & \\multicolumn{1}{c|}{%s} & +\\multicolumn{5}{c|}{%s} & +\\multicolumn{2}{c|}{%s} & \\multicolumn{1}{c|}{%s} & %s \\\\ -\\cline{2-10} +\\cline{2-11} """ % \ ( \ - binary(yank(match,25,7),7), \ - binary(yank(match,22,3),3), \ - str_arg('imm12','',match,arguments), \ - str_arg('rs1','',match,arguments), \ str_arg('rd','',match,arguments), \ + str_arg('rs1','',match,arguments), \ + str_arg('imm12','',match,arguments), \ + binary(yank(match,funct_base,funct_size),funct_size), \ + binary(yank(match,opcode_base,opcode_size),opcode_size), \ str_inst(name,arguments) \ ) @@ -242,20 +246,20 @@ def print_ish_type(name,match,arguments): print """ & \\multicolumn{1}{|c|}{%s} & +\\multicolumn{1}{c|}{%s} & \\multicolumn{2}{c|}{%s} & +\\multicolumn{3}{c|}{%s} & \\multicolumn{2}{c|}{%s} & -\\multicolumn{2}{c|}{%s} & -\\multicolumn{1}{c|}{%s} & \\multicolumn{1}{c|}{%s} & %s \\\\ -\\cline{2-10} +\\cline{2-11} """ % \ ( \ - binary(yank(match,25,7),7), \ - binary(yank(match,22,3),3), \ + str_arg('rd','',match,arguments), \ + str_arg('rs1','',match,arguments), \ binary(yank(match,16,6),6), \ str_arg('shamt','',match,arguments), \ - str_arg('rs1','',match,arguments), \ - str_arg('rd','',match,arguments), \ + binary(yank(match,funct_base,funct_size),funct_size), \ + binary(yank(match,opcode_base,opcode_size),opcode_size), \ str_inst(name,arguments) \ ) @@ -263,21 +267,20 @@ def print_ishw_type(name,match,arguments): print """ & \\multicolumn{1}{|c|}{%s} & +\\multicolumn{1}{c|}{%s} & +\\multicolumn{3}{c|}{%s} & \\multicolumn{2}{c|}{%s} & \\multicolumn{2}{c|}{%s} & -\\multicolumn{1}{c|}{0} & -\\multicolumn{1}{c|}{%s} & -\\multicolumn{1}{c|}{%s} & \\multicolumn{1}{c|}{%s} & %s \\\\ -\\cline{2-10} +\\cline{2-11} """ % \ ( \ - binary(yank(match,25,7),7), \ - binary(yank(match,22,3),3), \ - binary(yank(match,16,6),6), \ - str_arg('shamtw','',match,arguments), \ str_arg('rd','',match,arguments), \ str_arg('rs1','',match,arguments), \ + binary(yank(match,15,7),7), \ + str_arg('shamtw','',match,arguments), \ + binary(yank(match,funct_base,funct_size),funct_size), \ + binary(yank(match,opcode_base,opcode_size),opcode_size), \ str_inst(name,arguments) \ ) @@ -285,18 +288,20 @@ def print_r_type(name,match,arguments): print """ & \\multicolumn{1}{|c|}{%s} & -\\multicolumn{5}{c|}{%s} & \\multicolumn{1}{c|}{%s} & \\multicolumn{1}{c|}{%s} & +\\multicolumn{4}{c|}{%s} & +\\multicolumn{2}{c|}{%s} & \\multicolumn{1}{c|}{%s} & %s \\\\ -\\cline{2-10} +\\cline{2-11} """ % \ ( \ - binary(yank(match,25,7),7), \ - binary(yank(match,15,10),10), \ - str_arg('rs2','',match,arguments), \ - str_arg('rs1','',match,arguments), \ str_arg('rd','',match,arguments), \ + str_arg('rs1','',match,arguments), \ + str_arg('rs2','',match,arguments), \ + binary(yank(match,10,7),7), \ + binary(yank(match,funct_base,funct_size),funct_size), \ + binary(yank(match,opcode_base,opcode_size),opcode_size), \ str_inst(name,arguments) \ ) @@ -305,42 +310,21 @@ def print_r_rm_type(name,match,arguments): & \\multicolumn{1}{|c|}{%s} & \\multicolumn{1}{c|}{%s} & -\\multicolumn{2}{c|}{%s} & -\\multicolumn{2}{c|}{%s} & -\\multicolumn{1}{c|}{%s} & \\multicolumn{1}{c|}{%s} & -\\multicolumn{1}{c|}{%s} & %s \\\\ -\\cline{2-10} - """ % \ - ( \ - binary(yank(match,25,7),7), \ - binary(yank(match,23,2),2), \ - str_arg('rm','',match,arguments), \ - binary(yank(match,15,5),5), \ - str_arg('rs2','',match,arguments), \ - str_arg('rs1','',match,arguments), \ - str_arg('rd','',match,arguments), \ - str_inst(name,arguments) \ - ) - -def print_r4_type(name,match,arguments): - print """ -& -\\multicolumn{1}{|c|}{%s} & \\multicolumn{3}{c|}{%s} & \\multicolumn{2}{c|}{%s} & \\multicolumn{1}{c|}{%s} & -\\multicolumn{1}{c|}{%s} & \\multicolumn{1}{c|}{%s} & %s \\\\ -\\cline{2-10} +\\cline{2-11} """ % \ ( \ - binary(yank(match,25,7),7), \ - binary(yank(match,20,5),5), \ - str_arg('rs3','',match,arguments), \ - str_arg('rs2','',match,arguments), \ - str_arg('rs1','',match,arguments), \ str_arg('rd','',match,arguments), \ + str_arg('rs1','',match,arguments), \ + str_arg('rs2','',match,arguments), \ + binary(yank(match,12,5),5), \ + str_arg('rm','',match,arguments), \ + binary(yank(match,7,2),2), \ + binary(yank(match,opcode_base,opcode_size),opcode_size), \ str_inst(name,arguments) \ ) @@ -349,21 +333,21 @@ def print_r4_rm_type(name,match,arguments): & \\multicolumn{1}{|c|}{%s} & \\multicolumn{1}{c|}{%s} & -\\multicolumn{2}{c|}{%s} & -\\multicolumn{2}{c|}{%s} & \\multicolumn{1}{c|}{%s} & +\\multicolumn{3}{c|}{%s} & +\\multicolumn{2}{c|}{%s} & \\multicolumn{1}{c|}{%s} & \\multicolumn{1}{c|}{%s} & %s \\\\ -\\cline{2-10} +\\cline{2-11} """ % \ ( \ - binary(yank(match,25,7),7), \ - binary(yank(match,23,2),2), \ - str_arg('rm','',match,arguments), \ - str_arg('rs3','',match,arguments), \ - str_arg('rs2','',match,arguments), \ - str_arg('rs1','',match,arguments), \ str_arg('rd','',match,arguments), \ + str_arg('rs1','',match,arguments), \ + str_arg('rs2','',match,arguments), \ + str_arg('rs3','',match,arguments), \ + str_arg('rm','',match,arguments), \ + binary(yank(match,7,2),2), \ + binary(yank(match,opcode_base,opcode_size),opcode_size), \ str_inst(name,arguments) \ ) @@ -374,11 +358,12 @@ def print_header(): \\begin{table}[p] \\begin{small} \\begin{center} -\\begin{tabular}{rcccccccccl} +\\begin{tabular}{rccccccccccl} & \\hspace*{0.6in} & \\hspace*{0.3in} & \\hspace*{0.1in} & +\\hspace*{0.1in} & \\hspace*{0.2in} & \\hspace*{0.2in} & \\hspace*{0.1in} & @@ -386,64 +371,66 @@ def print_header(): \\hspace*{0.3in} & \\hspace*{0.3in} \\\\ & -\\instbitrange{31}{25} & -\\instbitrange{24}{23} & -\\instbit{22} & -\\instbitrange{21}{20} & -\\instbitrange{19}{16} & +\\instbitrange{31}{27} & +\\instbitrange{26}{22} & +\\instbitrange{21}{17} & +\\instbit{16} & \\instbit{15} & -\\instbitrange{14}{10} & -\\instbitrange{9}{5} & -\\instbitrange{4}{0} \\\\ -\\cline{2-10} +\\instbitrange{14}{12} & +\\instbitrange{11}{10} & +\\instbit{9} & +\\instbitrange{8}{7} & +\\instbitrange{6}{0} \\\\ +\\cline{2-11} & -\\multicolumn{1}{|c|}{opcode} & -\\multicolumn{8}{c|}{jump target} & J-type \\\\ -\\cline{2-10} +\\multicolumn{9}{|c|}{jump target} & +\\multicolumn{1}{c|}{opcode} & J-type \\\\ +\\cline{2-11} & -\\multicolumn{1}{|c|}{opcode} & -\\multicolumn{7}{c|}{LUI-immediate} & -\\multicolumn{1}{c|}{rd} & LUI-type \\\\ -\\cline{2-10} +\\multicolumn{1}{|c|}{rd} & +\\multicolumn{8}{c|}{LUI-immediate} & +\\multicolumn{1}{c|}{opcode} & LUI-type \\\\ +\\cline{2-11} & -\\multicolumn{1}{|c|}{opcode} & -\\multicolumn{2}{c|}{funct3} & -\\multicolumn{4}{c|}{immediate} & +\\multicolumn{1}{|c|}{rd} & \\multicolumn{1}{c|}{rs1} & -\\multicolumn{1}{c|}{rd} & I-type \\\\ -\\cline{2-10} -& -\\multicolumn{1}{|c|}{opcode} & +\\multicolumn{1}{c|}{imm[11:7]} & +\\multicolumn{4}{c|}{imm[6:0]} & \\multicolumn{2}{c|}{funct3} & -\\multicolumn{3}{c|}{immed[11:5]} & -\\multicolumn{1}{c|}{rs2} & -\\multicolumn{1}{c|}{rs1} & -\\multicolumn{1}{c|}{immed[4:0]} & B-type \\\\ -\\cline{2-10} +\\multicolumn{1}{c|}{opcode} & I-type \\\\ +\\cline{2-11} & -\\multicolumn{1}{|c|}{opcode} & -\\multicolumn{5}{c|}{funct10} & -\\multicolumn{1}{c|}{rs2} & +\\multicolumn{1}{|c|}{imm[11:7]} & \\multicolumn{1}{c|}{rs1} & -\\multicolumn{1}{c|}{rd} & R-type \\\\ -\\cline{2-10} +\\multicolumn{1}{c|}{rs2} & +\\multicolumn{4}{c|}{imm[6:0]} & +\\multicolumn{2}{c|}{funct3} & +\\multicolumn{1}{c|}{opcode} & B-type \\\\ +\\cline{2-11} & -\\multicolumn{1}{|c|}{opcode} & -\\multicolumn{3}{c|}{funct5} & -\\multicolumn{2}{c|}{rs3} & +\\multicolumn{1}{|c|}{rd} & +\\multicolumn{1}{c|}{rs1} & \\multicolumn{1}{c|}{rs2} & +\\multicolumn{6}{c|}{funct10} & +\\multicolumn{1}{c|}{opcode} & R-type \\\\ +\\cline{2-11} +& +\\multicolumn{1}{|c|}{rd} & \\multicolumn{1}{c|}{rs1} & -\\multicolumn{1}{c|}{rd} & R4-type \\\\ -\\cline{2-10} +\\multicolumn{1}{c|}{rs2} & +\\multicolumn{3}{c|}{rs3} & +\\multicolumn{3}{c|}{funct5} & +\\multicolumn{1}{c|}{opcode} & R4-type \\\\ +\\cline{2-11} """ def print_subtitle(title): print """ & -\\multicolumn{9}{c}{} & \\\\ +\\multicolumn{10}{c}{} & \\\\ & -\\multicolumn{9}{c}{\\bf %s} & \\\\ -\\cline{2-10} +\\multicolumn{10}{c}{\\bf %s} & \\\\ +\\cline{2-11} """ % title def print_footer(caption): @@ -458,7 +445,7 @@ def print_footer(caption): def print_insts(opcode,name,type,min,max): for n in namelist: - if yank(match[n],25,7) == opcode or n == name: + if yank(match[n],opcode_base,opcode_size) == opcode or n == name: if type == -1 or types[n] == type: if types[n] == 0: print_unimp_type(n,match[n],arguments[n]) @@ -490,101 +477,104 @@ def make_latex_table(): print_subtitle('Unimplemented Instruction') print_insts(0x00,'',-1,-1,-1) print_subtitle('Control Transfer Instructions') - print_insts(0x60,'',-1,-1,-1) - print_insts(0x61,'',-1,-1,-1) - print_insts(0x62,'',-1,-1,-1) + print_insts(0x67,'',-1,-1,-1) + print_insts(0x6f,'',-1,-1,-1) print_insts(0x63,'',-1,-1,-1) + print_insts(0x6b,'',-1,-1,-1) print_subtitle('Memory Instructions') - print_insts(0x78,'',-1,-1,-1) - print_insts(0x79,'',-1,-1,-1) + print_insts(0x03,'',-1,-1,-1) + print_insts(0x23,'',-1,-1,-1) print_subtitle('Atomic Memory Instructions') - print_insts(0x7a,'',-1,-1,-1) + print_insts(0x2b,'',-1,-1,-1) print_footer(0) print_header() print_subtitle('Integer Compute Instructions') - print_insts(0x71,'',-1,-1,-1) - print_insts(0x74,'',-1,-1,-1) - print_insts(0x75,'',-1,-1,-1) + print_insts(0x13,'',-1,-1,-1) + print_insts(0x33,'',-1,-1,-1) + print_insts(0x37,'',-1,-1,-1) print_subtitle('32-bit Integer Compute Instructions') - print_insts(0x76,'',-1,-1,-1) - print_insts(0x77,'',-1,-1,-1) + print_insts(0x1b,'',-1,-1,-1) + print_insts(0x3b,'',-1,-1,-1) print_footer(0) print_header() print_subtitle('Floating-Point Memory Instructions') - print_insts(0x68,'',-1,-1,-1) - print_insts(0x69,'',-1,-1,-1) + print_insts(0x07,'',-1,-1,-1) + print_insts(0x27,'',-1,-1,-1) print_subtitle('Floating-Point Compute Instructions') - print_insts(-1,'add.s',-1,-1,-1) - print_insts(-1,'sub.s',-1,-1,-1) - print_insts(-1,'mul.s',-1,-1,-1) - print_insts(-1,'div.s',-1,-1,-1) - print_insts(-1,'sqrt.s',-1,-1,-1) - print_insts(-1,'add.d',-1,-1,-1) - print_insts(-1,'sub.d',-1,-1,-1) - print_insts(-1,'mul.d',-1,-1,-1) - print_insts(-1,'div.d',-1,-1,-1) - print_insts(-1,'sqrt.d',-1,-1,-1) - print_insts(-1,'madd.s',-1,-1,-1) - print_insts(-1,'msub.s',-1,-1,-1) - print_insts(-1,'nmsub.s',-1,-1,-1) - print_insts(-1,'nmadd.s',-1,-1,-1) - print_insts(-1,'madd.d',-1,-1,-1) - print_insts(-1,'msub.d',-1,-1,-1) - print_insts(-1,'nmsub.d',-1,-1,-1) - print_insts(-1,'nmadd.d',-1,-1,-1) + print_insts(-1,'fadd.s',-1,-1,-1) + print_insts(-1,'fsub.s',-1,-1,-1) + print_insts(-1,'fmul.s',-1,-1,-1) + print_insts(-1,'fdiv.s',-1,-1,-1) + print_insts(-1,'fsqrt.s',-1,-1,-1) + print_insts(-1,'fmin.s',-1,-1,-1) + print_insts(-1,'fmax.s',-1,-1,-1) + print_insts(-1,'fadd.d',-1,-1,-1) + print_insts(-1,'fsub.d',-1,-1,-1) + print_insts(-1,'fmul.d',-1,-1,-1) + print_insts(-1,'fdiv.d',-1,-1,-1) + print_insts(-1,'fsqrt.d',-1,-1,-1) + print_insts(-1,'fmin.d',-1,-1,-1) + print_insts(-1,'fmax.d',-1,-1,-1) + print_insts(-1,'fmadd.s',-1,-1,-1) + print_insts(-1,'fmsub.s',-1,-1,-1) + print_insts(-1,'fnmsub.s',-1,-1,-1) + print_insts(-1,'fnmadd.s',-1,-1,-1) + print_insts(-1,'fmadd.d',-1,-1,-1) + print_insts(-1,'fmsub.d',-1,-1,-1) + print_insts(-1,'fnmsub.d',-1,-1,-1) + print_insts(-1,'fnmadd.d',-1,-1,-1) print_footer(0) print_header() print_subtitle('Floating-Point Move \& Conversion Instructions') - print_insts(-1,'sgninj.s',-1,-1,-1) - print_insts(-1,'sgninjn.s',-1,-1,-1) - print_insts(-1,'sgnmul.s',-1,-1,-1) - print_insts(-1,'sgninj.d',-1,-1,-1) - print_insts(-1,'sgninjn.d',-1,-1,-1) - print_insts(-1,'sgnmul.d',-1,-1,-1) - print_insts(-1,'cvt.s.d',-1,-1,-1) - print_insts(-1,'cvt.d.s',-1,-1,-1) + print_insts(-1,'fsgnj.s',-1,-1,-1) + print_insts(-1,'fsgnjn.s',-1,-1,-1) + print_insts(-1,'fsgnjx.s',-1,-1,-1) + print_insts(-1,'fsgnj.d',-1,-1,-1) + print_insts(-1,'fsgnjn.d',-1,-1,-1) + print_insts(-1,'fsgnjx.d',-1,-1,-1) + print_insts(-1,'fcvt.s.d',-1,-1,-1) + print_insts(-1,'fcvt.d.s',-1,-1,-1) print_subtitle('Integer to Floating-Point Move \& Conversion Instructions') - print_insts(-1,'cvt.s.l',-1,-1,-1) - print_insts(-1,'cvtu.s.l',-1,-1,-1) - print_insts(-1,'cvt.s.w',-1,-1,-1) - print_insts(-1,'cvtu.s.w',-1,-1,-1) - print_insts(-1,'cvt.d.l',-1,-1,-1) - print_insts(-1,'cvtu.d.l',-1,-1,-1) - print_insts(-1,'cvt.d.w',-1,-1,-1) - print_insts(-1,'cvtu.d.w',-1,-1,-1) - print_insts(-1,'mtflh.d',-1,-1,-1) - print_insts(-1,'mtf.s',-1,-1,-1) - print_insts(-1,'mtf.d',-1,-1,-1) + print_insts(-1,'fcvt.s.l',-1,-1,-1) + print_insts(-1,'fcvt.s.lu',-1,-1,-1) + print_insts(-1,'fcvt.s.w',-1,-1,-1) + print_insts(-1,'fcvt.s.wu',-1,-1,-1) + print_insts(-1,'fcvt.d.l',-1,-1,-1) + print_insts(-1,'fcvt.d.lu',-1,-1,-1) + print_insts(-1,'fcvt.d.w',-1,-1,-1) + print_insts(-1,'fcvt.d.wu',-1,-1,-1) + print_insts(-1,'mxtf.s',-1,-1,-1) + print_insts(-1,'mxtf.d',-1,-1,-1) + print_insts(-1,'mtfsr',-1,-1,-1) print_subtitle('Floating-Point to Integer Move \& Conversion Instructions') - print_insts(-1,'cvt.l.s',-1,-1,-1) - print_insts(-1,'cvtu.l.s',-1,-1,-1) - print_insts(-1,'cvt.w.s',-1,-1,-1) - print_insts(-1,'cvtu.w.s',-1,-1,-1) - print_insts(-1,'cvt.l.d',-1,-1,-1) - print_insts(-1,'cvtu.l.d',-1,-1,-1) - print_insts(-1,'cvt.w.d',-1,-1,-1) - print_insts(-1,'cvtu.w.d',-1,-1,-1) - print_insts(-1,'mffl.d',-1,-1,-1) - print_insts(-1,'mffh.d',-1,-1,-1) - print_insts(-1,'mff.s',-1,-1,-1) - print_insts(-1,'mff.d',-1,-1,-1) + print_insts(-1,'fcvt.l.s',-1,-1,-1) + print_insts(-1,'fcvt.lu.s',-1,-1,-1) + print_insts(-1,'fcvt.w.s',-1,-1,-1) + print_insts(-1,'fcvt.wu.s',-1,-1,-1) + print_insts(-1,'fcvt.l.d',-1,-1,-1) + print_insts(-1,'fcvt.lu.d',-1,-1,-1) + print_insts(-1,'fcvt.w.d',-1,-1,-1) + print_insts(-1,'fcvt.wu.d',-1,-1,-1) + print_insts(-1,'mftx.s',-1,-1,-1) + print_insts(-1,'mftx.d',-1,-1,-1) + print_insts(-1,'mffsr',-1,-1,-1) print_footer(0) print_header() print_subtitle('Floating-Point Compare Instructions') - print_insts(-1,'c.eq.s',-1,-1,-1) - print_insts(-1,'c.lt.s',-1,-1,-1) - print_insts(-1,'c.le.s',-1,-1,-1) - print_insts(-1,'c.eq.d',-1,-1,-1) - print_insts(-1,'c.lt.d',-1,-1,-1) - print_insts(-1,'c.le.d',-1,-1,-1) - print_subtitle('Miscellaneous Instructions') - print_insts(0x7b,'',-1,-1,-1) - print_subtitle('Privileged Instructions') - print_insts(0x6b,'',-1,-1,-1) + print_insts(-1,'feq.s',-1,-1,-1) + print_insts(-1,'flt.s',-1,-1,-1) + print_insts(-1,'fle.s',-1,-1,-1) + print_insts(-1,'feq.d',-1,-1,-1) + print_insts(-1,'flt.d',-1,-1,-1) + print_insts(-1,'fle.d',-1,-1,-1) + print_subtitle('Miscellaneous Memory Instructions') + print_insts(0x2f,'',-1,-1,-1) + print_subtitle('System Instructions') + print_insts(0x77,'',-1,-1,-1) print_footer(1) def str_verilog_arg(arg0,arg1,match,arguments): |