From 9f93b98c87cfdbcbeb59b9da298344c840f747a4 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Tue, 13 Dec 2022 16:51:45 -0800 Subject: Rename memif_endianness_t to endianness_t --- riscv/processor.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'riscv/processor.cc') diff --git a/riscv/processor.cc b/riscv/processor.cc index 8ca3bb7..560f71e 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -30,7 +30,7 @@ processor_t::processor_t(const isa_parser_t *isa, const char* varch, simif_t* sim, uint32_t id, bool halt_on_reset, - memif_endianness_t endianness, + endianness_t endianness, FILE* log_file, std::ostream& sout_) : debug(false), halt_request(HR_NONE), isa(isa), sim(sim), id(id), xlen(0), histogram_enabled(false), log_commits_enabled(false), -- cgit v1.1