From 8e023fa06a47cca7c7da50b5358ed9dc48f579f9 Mon Sep 17 00:00:00 2001
From: Ben Marshall <ben.marshall@bristol.ac.uk>
Date: Wed, 28 Jul 2021 11:50:57 +0100
Subject: scalar-crypto: Remove remaining RV*_ONLY code

- Remove remaining code which allowed spike to differentiate between
  RV32 and RV64 instructions which share an encoding.

 On branch scalar-crypto
 Changes to be committed:
	modified:   disasm/disasm.cc
	modified:   riscv/processor.cc
---
 disasm/disasm.cc   |  8 --------
 riscv/processor.cc | 12 +++---------
 2 files changed, 3 insertions(+), 17 deletions(-)

diff --git a/disasm/disasm.cc b/disasm/disasm.cc
index fe1e24e..b6ad437 100644
--- a/disasm/disasm.cc
+++ b/disasm/disasm.cc
@@ -447,11 +447,7 @@ disassembler_t::disassembler_t(int xlen)
   #define DECLARE_INSN(code, match, mask) \
    const uint32_t match_##code = match; \
    const uint32_t mask_##code = mask;
-  #define DECLARE_RV32_ONLY(code) {}
-  #define DECLARE_RV64_ONLY(code) {}
   #include "encoding.h"
-  #undef DECLARE_RV64_INSN
-  #undef DECLARE_RV32_INSN
   #undef DECLARE_INSN
 
   // explicit per-instruction disassembly
@@ -1682,11 +1678,7 @@ disassembler_t::disassembler_t(int xlen)
   // provide a default disassembly for all instructions as a fallback
   #define DECLARE_INSN(code, match, mask) \
    add_insn(new disasm_insn_t(#code " (args unknown)", match, mask, {}));
-  #define DECLARE_RV32_ONLY(code) {}
-  #define DECLARE_RV64_ONLY(code) {}
   #include "encoding.h"
-  #undef DECLARE_RV64_INSN
-  #undef DECLARE_RV32_INSN
   #undef DECLARE_INSN
 }
 
diff --git a/riscv/processor.cc b/riscv/processor.cc
index fa574ff..655dd18 100644
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -1860,14 +1860,8 @@ void processor_t::register_extension(extension_t* x)
 void processor_t::register_base_instructions()
 {
   #define DECLARE_INSN(name, match, mask) \
-    insn_bits_t name##_match = (match), name##_mask = (mask); \
-    unsigned name##_arch_en = (unsigned)-1;
-  #define DECLARE_RV32_ONLY(name) {name##_arch_en = 32;}
-  #define DECLARE_RV64_ONLY(name) {name##_arch_en = 64;}
-
+    insn_bits_t name##_match = (match), name##_mask = (mask);
   #include "encoding.h"
-  #undef DECLARE_RV64_INSN
-  #undef DECLARE_RV32_INSN
   #undef DECLARE_INSN
 
   #define DEFINE_INSN(name) \
@@ -1876,8 +1870,8 @@ void processor_t::register_base_instructions()
     register_insn((insn_desc_t){ \
       name##_match, \
       name##_mask, \
-      (name##_arch_en & 32) ? rv32_##name : nullptr, \
-      (name##_arch_en & 64) ? rv64_##name : nullptr});
+      rv32_##name, \
+      rv64_##name});
   #include "insn_list.h"
   #undef DEFINE_INSN
 
-- 
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