From 4e8cdcaeccd1c714b32b1f8874e995d77230de14 Mon Sep 17 00:00:00 2001
From: Yunsup Lee <yunsup@cs.berkeley.edu>
Date: Tue, 13 Mar 2012 22:23:58 -0700
Subject: add vvcfg,vtcfg

---
 riscv/dispatch.h    | 1 +
 riscv/insns/vtcfg.h | 5 +++++
 riscv/insns/vvcfg.h | 5 +++++
 riscv/opcodes.h     | 4 +++-
 4 files changed, 14 insertions(+), 1 deletion(-)
 create mode 100644 riscv/insns/vtcfg.h
 create mode 100644 riscv/insns/vvcfg.h

diff --git a/riscv/dispatch.h b/riscv/dispatch.h
index 7091899..0110577 100644
--- a/riscv/dispatch.h
+++ b/riscv/dispatch.h
@@ -174,6 +174,7 @@ reg_t insn_func_610(insn_t insn, reg_t reg);
 reg_t insn_func_611(insn_t insn, reg_t reg);
 reg_t insn_func_619(insn_t insn, reg_t reg);
 reg_t insn_func_626(insn_t insn, reg_t reg);
+reg_t insn_func_627(insn_t insn, reg_t reg);
 reg_t insn_func_631(insn_t insn, reg_t reg);
 reg_t insn_func_633(insn_t insn, reg_t reg);
 reg_t insn_func_634(insn_t insn, reg_t reg);
diff --git a/riscv/insns/vtcfg.h b/riscv/insns/vtcfg.h
new file mode 100644
index 0000000..6e8cbd1
--- /dev/null
+++ b/riscv/insns/vtcfg.h
@@ -0,0 +1,5 @@
+require_vector;
+nxpr_use = RS1 & 0x3f;
+nfpr_use = RS2 & 0x3f;
+vcfg();
+setvl(0);
diff --git a/riscv/insns/vvcfg.h b/riscv/insns/vvcfg.h
new file mode 100644
index 0000000..6e8cbd1
--- /dev/null
+++ b/riscv/insns/vvcfg.h
@@ -0,0 +1,5 @@
+require_vector;
+nxpr_use = RS1 & 0x3f;
+nfpr_use = RS2 & 0x3f;
+vcfg();
+setvl(0);
diff --git a/riscv/opcodes.h b/riscv/opcodes.h
index 8627e72..1600477 100644
--- a/riscv/opcodes.h
+++ b/riscv/opcodes.h
@@ -6,8 +6,10 @@ DECLARE_INSN(vlsthu, 0x128b, 0x1ffff)
 DECLARE_INSN(c_swsp, 0x8, 0x1f)
 DECLARE_INSN(bltu, 0x363, 0x3ff)
 DECLARE_INSN(vlsegstwu, 0xb0b, 0xfff)
+DECLARE_INSN(vvcfg, 0x473, 0xf801ffff)
 DECLARE_INSN(movz, 0x2f7, 0x1ffff)
 DECLARE_INSN(fcvt_lu_s, 0x9053, 0x3ff1ff)
+DECLARE_INSN(c_ld, 0x9, 0x1f)
 DECLARE_INSN(fence_l_cv, 0x32f, 0x3ff)
 DECLARE_INSN(c_srli32, 0xc19, 0x1c1f)
 DECLARE_INSN(fmin_s, 0x18053, 0x1ffff)
@@ -63,7 +65,7 @@ DECLARE_INSN(srlw, 0x2bb, 0x1ffff)
 DECLARE_INSN(vssegstb, 0x80f, 0xfff)
 DECLARE_INSN(mftx_d, 0x1c0d3, 0x3fffff)
 DECLARE_INSN(div, 0x633, 0x1ffff)
-DECLARE_INSN(c_ld, 0x9, 0x1f)
+DECLARE_INSN(vtcfg, 0xc73, 0xf801ffff)
 DECLARE_INSN(mftx_s, 0x1c053, 0x3fffff)
 DECLARE_INSN(vssegsth, 0x88f, 0xfff)
 DECLARE_INSN(vvcfgivl, 0xf3, 0x3ff)
-- 
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