diff options
| -rw-r--r-- | disasm/disasm.cc | 9 | ||||
| -rw-r--r-- | disasm/isa_parser.cc | 25 | ||||
| -rw-r--r-- | riscv/csrs.cc | 8 | ||||
| -rw-r--r-- | riscv/isa_parser.h | 2 |
4 files changed, 36 insertions, 8 deletions
diff --git a/disasm/disasm.cc b/disasm/disasm.cc index 08571a2..65c15f5 100644 --- a/disasm/disasm.cc +++ b/disasm/disasm.cc @@ -809,7 +809,8 @@ void disassembler_t::add_instructions(const isa_parser_t* isa) DEFINE_XSTORE(sw) DEFINE_XSTORE(sd) - if (isa->extension_enabled('A')) { + if (isa->extension_enabled('A') || + isa->extension_enabled(EXT_ZAAMO)) { DEFINE_XAMO(amoadd_w) DEFINE_XAMO(amoswap_w) DEFINE_XAMO(amoand_w) @@ -828,6 +829,10 @@ void disassembler_t::add_instructions(const isa_parser_t* isa) DEFINE_XAMO(amomax_d) DEFINE_XAMO(amominu_d) DEFINE_XAMO(amomaxu_d) + } + + if (isa->extension_enabled('A') || + isa->extension_enabled(EXT_ZALRSC)) { DEFINE_XLOAD_BASE(lr_w) DEFINE_XAMO(sc_w) DEFINE_XLOAD_BASE(lr_d) @@ -2390,7 +2395,7 @@ disassembler_t::disassembler_t(const isa_parser_t *isa) // next-highest priority: other instructions in same base ISA std::string fallback_isa_string = std::string("rv") + std::to_string(isa->get_max_xlen()) + - "gqchv_zfh_zba_zbb_zbc_zbs_zcb_zicbom_zicboz_zicond_zkn_zkr_zks_svinval_zcmop_zimop"; + "gqcvh_zfh_zba_zbb_zbc_zbs_zcb_zicbom_zicboz_zicond_zkn_zkr_zks_svinval_zcmop_zimop"; isa_parser_t fallback_isa(fallback_isa_string.c_str(), DEFAULT_PRIV); add_instructions(&fallback_isa); diff --git a/disasm/isa_parser.cc b/disasm/isa_parser.cc index 25d1aff..7a133e4 100644 --- a/disasm/isa_parser.cc +++ b/disasm/isa_parser.cc @@ -29,7 +29,7 @@ static void bad_priv_string(const char* priv) isa_parser_t::isa_parser_t(const char* str, const char *priv) { isa_string = strtolower(str); - const char* all_subsets = "mafdqchpv"; + const char* all_subsets = "mafdqcpvh"; if (isa_string.compare(0, 4, "rv32") == 0) max_xlen = 32; @@ -119,6 +119,10 @@ isa_parser_t::isa_parser_t(const char* str, const char *priv) // HINTs encoded in base-ISA instructions are always present. } else if (ext_str == "zihintntl") { // HINTs encoded in base-ISA instructions are always present. + } else if (ext_str == "zaamo") { + extension_table[EXT_ZAAMO] = true; + } else if (ext_str == "zalrsc") { + extension_table[EXT_ZALRSC] = true; } else if (ext_str == "zacas") { extension_table[EXT_ZACAS] = true; } else if (ext_str == "zabha") { @@ -330,6 +334,17 @@ isa_parser_t::isa_parser_t(const char* str, const char *priv) extension_table[EXT_INTERNAL_ZFH_MOVE] = true; } + if (extension_table['A']) { + extension_table[EXT_ZAAMO] = true; + extension_table[EXT_ZALRSC] = true; + } + + if (extension_table['B']) { + extension_table[EXT_ZBA] = true; + extension_table[EXT_ZBB] = true; + extension_table[EXT_ZBS] = true; + } + if (extension_table['C']) { extension_table[EXT_ZCA] = true; if (extension_table['F'] && max_xlen == 32) @@ -359,12 +374,12 @@ isa_parser_t::isa_parser_t(const char* str, const char *priv) bad_isa_string(str, "'Zcf/Zcd/Zcb/Zcmp/Zcmt' extensions require 'Zca' extension"); } - if (extension_table[EXT_ZACAS] && !extension_table['A']) { - bad_isa_string(str, "'Zacas' extension requires 'A' extension"); + if (extension_table[EXT_ZACAS] && !extension_table['A'] && !extension_table[EXT_ZAAMO]) { + bad_isa_string(str, "'Zacas' extension requires either the 'A' or the 'Zaamo' extension"); } - if (extension_table[EXT_ZABHA] && !extension_table['A']) { - bad_isa_string(str, "'Zabha' extension requires 'A' extension"); + if (extension_table[EXT_ZABHA] && !extension_table['A'] && !extension_table[EXT_ZAAMO]) { + bad_isa_string(str, "'Zabha' extension requires either the 'A' or the 'Zaamo' extension"); } // Zpn conflicts with Zvknha/Zvknhb in both rv32 and rv64 diff --git a/riscv/csrs.cc b/riscv/csrs.cc index ce14b28..b76b496 100644 --- a/riscv/csrs.cc +++ b/riscv/csrs.cc @@ -622,9 +622,10 @@ bool sstatus_csr_t::enabled(const reg_t which) { misa_csr_t::misa_csr_t(processor_t* const proc, const reg_t addr, const reg_t max_isa): basic_csr_t(proc, addr, max_isa), max_isa(max_isa), - write_mask(max_isa & (0 // allow MAFDQCHV bits in MISA to be modified + write_mask(max_isa & (0 // allow MABFDQCHV bits in MISA to be modified | (1L << ('M' - 'A')) | (1L << ('A' - 'A')) + | (1L << ('B' - 'A')) | (1L << ('F' - 'A')) | (1L << ('D' - 'A')) | (1L << ('Q' - 'A')) @@ -665,6 +666,11 @@ bool misa_csr_t::unlogged_write(const reg_t val) noexcept { proc->set_extension_enable(EXT_ZFHMIN, new_misa & (1L << ('F' - 'A'))); proc->set_extension_enable(EXT_ZVFH, (new_misa & (1L << ('V' - 'A'))) && proc->extension_enabled(EXT_ZFHMIN)); proc->set_extension_enable(EXT_ZVFHMIN, new_misa & (1L << ('V' - 'A'))); + proc->set_extension_enable(EXT_ZAAMO, (new_misa & (1L << ('A' - 'A'))) || !proc->get_isa().extension_enabled('A')); + proc->set_extension_enable(EXT_ZALRSC, (new_misa & (1L << ('A' - 'A'))) || !proc->get_isa().extension_enabled('A')); + proc->set_extension_enable(EXT_ZBA, (new_misa & (1L << ('B' - 'A'))) || !proc->get_isa().extension_enabled('B')); + proc->set_extension_enable(EXT_ZBB, (new_misa & (1L << ('B' - 'A'))) || !proc->get_isa().extension_enabled('B')); + proc->set_extension_enable(EXT_ZBS, (new_misa & (1L << ('B' - 'A'))) || !proc->get_isa().extension_enabled('B')); // update the hypervisor-only bits in MEDELEG and other CSRs if (!new_h && prev_h) { diff --git a/riscv/isa_parser.h b/riscv/isa_parser.h index 6719a64..f310b97 100644 --- a/riscv/isa_parser.h +++ b/riscv/isa_parser.h @@ -75,6 +75,8 @@ typedef enum { EXT_XZBR, EXT_XZBT, EXT_SSTC, + EXT_ZAAMO, + EXT_ZALRSC, EXT_ZACAS, EXT_ZABHA, EXT_INTERNAL_ZFH_MOVE, |