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| author | Ming-Yi Lai <ming-yi.lai@mediatek.com> | 2024-01-04 10:04:25 +0800 |
|---|---|---|
| committer | Ming-Yi Lai <ming-yi.lai@mediatek.com> | 2024-03-06 17:21:00 +0800 |
| commit | b618c694d6d039925bb972641737c51d5b6577e1 (patch) | |
| tree | 4bcd4f25165e116226328266b5e9c499ba55ee3d /riscv/processor.cc | |
| parent | 194dfb1d5b84e12b9400729fac27560eceaf6b0d (diff) | |
| download | riscv-isa-sim-b618c694d6d039925bb972641737c51d5b6577e1.zip riscv-isa-sim-b618c694d6d039925bb972641737c51d5b6577e1.tar.gz riscv-isa-sim-b618c694d6d039925bb972641737c51d5b6577e1.tar.bz2 | |
Zicfilp: Set ELP state when executing indirect jumps
Diffstat (limited to 'riscv/processor.cc')
| -rw-r--r-- | riscv/processor.cc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/riscv/processor.cc b/riscv/processor.cc index 09ff3e2..c2b2d45 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -593,6 +593,8 @@ void state_t::reset(processor_t* const proc, reg_t max_isa) last_inst_priv = 0; last_inst_xlen = 0; last_inst_flen = 0; + + elp = elp_t::NO_LP_EXPECTED; } void processor_t::set_debug(bool value) |