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| author | Anup Patel <anup.patel@wdc.com> | 2020-06-22 08:38:44 +0530 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2020-07-09 23:04:23 +0530 |
| commit | 2cb19ac699b51d38fba57f4acb1ce02f06e7548f (patch) | |
| tree | 5fef42799cb4cc024905ca5d0d08f79bfb3b4117 /riscv/dts.h | |
| parent | 564ed97f618321b8499a3e8837c36f622ee8a893 (diff) | |
| download | riscv-isa-sim-2cb19ac699b51d38fba57f4acb1ce02f06e7548f.zip riscv-isa-sim-2cb19ac699b51d38fba57f4acb1ce02f06e7548f.tar.gz riscv-isa-sim-2cb19ac699b51d38fba57f4acb1ce02f06e7548f.tar.bz2 | |
Add bootargs command-line option to Spike
We add bootargs command-line option to Spike which allows us to
provide custom kernel parameters to Linux and Xvisor.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Diffstat (limited to 'riscv/dts.h')
| -rw-r--r-- | riscv/dts.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/riscv/dts.h b/riscv/dts.h index 1c3f701..1f01e0f 100644 --- a/riscv/dts.h +++ b/riscv/dts.h @@ -8,6 +8,7 @@ std::string make_dts(size_t insns_per_rtc_tick, size_t cpu_hz, reg_t initrd_start, reg_t initrd_end, + const char* bootargs, std::vector<processor_t*> procs, std::vector<std::pair<reg_t, mem_t*>> mems); |