From 7364212af9578ea65ddea35a6992bdc8e4efd675 Mon Sep 17 00:00:00 2001 From: Chih-Min Chao Date: Mon, 18 Nov 2019 20:19:36 -0800 Subject: rvv: add quad insn and new vlenb csr Signed-off-by: Chih-Min Chao --- spike_main/disasm.cc | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'spike_main/disasm.cc') diff --git a/spike_main/disasm.cc b/spike_main/disasm.cc index a801b81..ddf40a4 100644 --- a/spike_main/disasm.cc +++ b/spike_main/disasm.cc @@ -922,10 +922,10 @@ disassembler_t::disassembler_t(int xlen) DISASM_OPIV_S___INSN(vwredsum, 1); DISASM_OPIV_V___INSN(vdotu, 0); DISASM_OPIV_V___INSN(vdot, 1); - DISASM_OPIV_VX__INSN(vwsmaccu, 0); - DISASM_OPIV_VX__INSN(vwsmacc, 1); - DISASM_OPIV_VX__INSN(vwsmaccsu, 0); - DISASM_OPIV__X__INSN(vwsmaccus, 1); + DISASM_OPIV_VX__INSN(vqmaccu, 0); + DISASM_OPIV_VX__INSN(vqmacc, 1); + DISASM_OPIV__X__INSN(vqmaccus, 1); + DISASM_OPIV_VX__INSN(vqmaccsu, 0); //OPMVV/OPMVX //0b00_0000 @@ -991,8 +991,8 @@ disassembler_t::disassembler_t(int xlen) DISASM_OPIV_VX__INSN(vwmul, 1); DISASM_OPIV_VX__INSN(vwmaccu, 0); DISASM_OPIV_VX__INSN(vwmacc, 1); - DISASM_OPIV_VX__INSN(vwmaccsu, 0); DISASM_OPIV__X__INSN(vwmaccus, 1); + DISASM_OPIV_VX__INSN(vwmaccsu, 0); #undef DISASM_OPIV_VXI_INSN #undef DISASM_OPIV_VX__INSN -- cgit v1.1