From 55c66198fd6bc8f1b16e67a33d2865ca3e7269cb Mon Sep 17 00:00:00 2001
From: Andrew Waterman <andrew@sifive.com>
Date: Wed, 28 Sep 2022 01:06:53 -0700
Subject: Fix vmv.x.s for RV32

The Spike internals require that, when XLEN is narrower than reg_t,
values be sign-extended to the width of reg_t.
---
 riscv/insns/vmv_x_s.h | 17 +++++++++--------
 1 file changed, 9 insertions(+), 8 deletions(-)

(limited to 'riscv')

diff --git a/riscv/insns/vmv_x_s.h b/riscv/insns/vmv_x_s.h
index 8451d6a..16153eb 100644
--- a/riscv/insns/vmv_x_s.h
+++ b/riscv/insns/vmv_x_s.h
@@ -1,27 +1,28 @@
 // vmv_x_s: rd = vs2[0]
 require_vector(true);
 require(insn.v_vm() == 1);
-uint64_t xmask = UINT64_MAX >> (64 - P.get_isa().get_max_xlen());
 reg_t rs1 = RS1;
 reg_t sew = P.VU.vsew;
 reg_t rs2_num = insn.rs2();
+reg_t res;
 
 switch (sew) {
 case e8:
-  WRITE_RD(P.VU.elt<int8_t>(rs2_num, 0));
+  res = P.VU.elt<int8_t>(rs2_num, 0);
   break;
 case e16:
-  WRITE_RD(P.VU.elt<int16_t>(rs2_num, 0));
+  res = P.VU.elt<int16_t>(rs2_num, 0);
   break;
 case e32:
-  WRITE_RD(P.VU.elt<int32_t>(rs2_num, 0));
+  res = P.VU.elt<int32_t>(rs2_num, 0);
   break;
 case e64:
-  if (P.get_isa().get_max_xlen() <= sew)
-    WRITE_RD(P.VU.elt<uint64_t>(rs2_num, 0) & xmask);
-  else
-    WRITE_RD(P.VU.elt<uint64_t>(rs2_num, 0));
+  res = P.VU.elt<uint64_t>(rs2_num, 0);
   break;
+default:
+  abort();
 }
 
+WRITE_RD(sext_xlen(res));
+
 P.VU.vstart->write(0);
-- 
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