From 5cf439b24e945db47edf6e259044c923384ccdfd Mon Sep 17 00:00:00 2001
From: Jerry Zhao <jerryz123@berkeley.edu>
Date: Fri, 14 Oct 2022 11:41:58 -0700
Subject: Add dump memory command to interactive mode

---
 riscv/devices.cc     | 13 +++++++++++++
 riscv/devices.h      |  1 +
 riscv/interactive.cc | 14 ++++++++++++++
 riscv/sim.h          |  1 +
 4 files changed, 29 insertions(+)

(limited to 'riscv')

diff --git a/riscv/devices.cc b/riscv/devices.cc
index eb677a5..81b232d 100644
--- a/riscv/devices.cc
+++ b/riscv/devices.cc
@@ -137,3 +137,16 @@ char* mem_t::contents(reg_t addr) {
   }
   return search->second + pgoff;
 }
+
+void mem_t::dump(std::ostream& o) {
+  const char empty[PGSIZE] = {0};
+  for (reg_t i = 0; i < sz; i += PGSIZE) {
+    reg_t ppn = i >> PGSHIFT;
+    auto search = sparse_memory_map.find(ppn);
+    if (search == sparse_memory_map.end()) {
+      o.write(empty, PGSIZE);
+    } else {
+      o.write(sparse_memory_map[ppn], PGSIZE);
+    }
+  }
+}
diff --git a/riscv/devices.h b/riscv/devices.h
index 9200f29..8907b87 100644
--- a/riscv/devices.h
+++ b/riscv/devices.h
@@ -43,6 +43,7 @@ class mem_t : public abstract_device_t {
   bool store(reg_t addr, size_t len, const uint8_t* bytes) { return load_store(addr, len, const_cast<uint8_t*>(bytes), true); }
   char* contents(reg_t addr);
   reg_t size() { return sz; }
+  void dump(std::ostream& o);
 
  private:
   bool load_store(reg_t addr, size_t len, uint8_t* bytes, bool store);
diff --git a/riscv/interactive.cc b/riscv/interactive.cc
index bba4540..ffc706b 100644
--- a/riscv/interactive.cc
+++ b/riscv/interactive.cc
@@ -318,6 +318,7 @@ void sim_t::interactive()
   funcs["until"] = &sim_t::interactive_until_silent;
   funcs["untiln"] = &sim_t::interactive_until_noisy;
   funcs["while"] = &sim_t::interactive_until_silent;
+  funcs["dump"] = &sim_t::interactive_dumpmems;
   funcs["quit"] = &sim_t::interactive_quit;
   funcs["q"] = funcs["quit"];
   funcs["help"] = &sim_t::interactive_help;
@@ -395,6 +396,7 @@ void sim_t::interactive_help(const std::string& cmd, const std::vector<std::stri
     "pc <core>                       # Show current PC in <core>\n"
     "mem [core] <hex addr>           # Show contents of virtual memory <hex addr> in [core] (physical memory <hex addr> if omitted)\n"
     "str [core] <hex addr>           # Show NUL-terminated C string at virtual address <hex addr> in [core] (physical address <hex addr> if omitted)\n"
+    "dump                            # Dump physical memory to binary files\n"
     "until reg <core> <reg> <val>    # Stop when <reg> in <core> hits <val>\n"
     "untiln reg <core> <reg> <val>   # Run noisy and stop when <reg> in <core> hits <val>\n"
     "until pc <core> <val>           # Stop when PC in <core> hits <val>\n"
@@ -774,3 +776,15 @@ void sim_t::interactive_until(const std::string& cmd, const std::vector<std::str
     step(1);
   }
 }
+
+void sim_t::interactive_dumpmems(const std::string& cmd, const std::vector<std::string>& args)
+{
+  for (unsigned i = 0; i < mems.size(); i++) {
+    std::stringstream mem_fname;
+    mem_fname << "mem.0x" << std::hex << mems[i].first << ".bin";
+
+    std::ofstream mem_file(mem_fname.str());
+    mems[i].second->dump(mem_file);
+    mem_file.close();
+  }
+}
diff --git a/riscv/sim.h b/riscv/sim.h
index c355f31..5787d5d 100644
--- a/riscv/sim.h
+++ b/riscv/sim.h
@@ -136,6 +136,7 @@ private:
   void interactive_pc(const std::string& cmd, const std::vector<std::string>& args);
   void interactive_mem(const std::string& cmd, const std::vector<std::string>& args);
   void interactive_str(const std::string& cmd, const std::vector<std::string>& args);
+  void interactive_dumpmems(const std::string& cmd, const std::vector<std::string>& args);
   void interactive_until(const std::string& cmd, const std::vector<std::string>& args, bool noisy);
   void interactive_until_silent(const std::string& cmd, const std::vector<std::string>& args);
   void interactive_until_noisy(const std::string& cmd, const std::vector<std::string>& args);
-- 
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