From ea58df801f36605b462783a61b5266bdd9a40eb0 Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Thu, 12 Mar 2015 17:32:43 -0700 Subject: Update to new privileged spec Sorry, everyone. --- riscv/processor.h | 35 ++++++++++++++++++++--------------- 1 file changed, 20 insertions(+), 15 deletions(-) (limited to 'riscv/processor.h') diff --git a/riscv/processor.h b/riscv/processor.h index 4e5b144..4189fea 100644 --- a/riscv/processor.h +++ b/riscv/processor.h @@ -40,18 +40,22 @@ struct state_t regfile_t FPR; // control and status registers - reg_t epc; - reg_t badvaddr; - reg_t evec; - reg_t ptbr; - reg_t pcr_k0; - reg_t pcr_k1; - reg_t cause; + reg_t mstatus; + reg_t mepc; + reg_t mbadaddr; + reg_t mscratch; + reg_t mcause; + reg_t sepc; + reg_t sbadaddr; + reg_t sscratch; + reg_t stvec; + reg_t sptbr; + reg_t scause; reg_t tohost; reg_t fromhost; - reg_t count; - uint32_t compare; - uint32_t sr; // only modify the status register using set_pcr() + reg_t scount; + bool stip; + uint32_t stimecmp; uint32_t fflags; uint32_t frm; @@ -75,13 +79,14 @@ public: void step(size_t n); // run for n cycles void deliver_ipi(); // register an interprocessor interrupt bool running() { return run; } - void set_pcr(int which, reg_t val); - void set_fromhost(reg_t val); - void set_interrupt(int which, bool on); - reg_t get_pcr(int which); + void set_csr(int which, reg_t val); + void raise_interrupt(reg_t which); + reg_t get_csr(int which); mmu_t* get_mmu() { return mmu; } state_t* get_state() { return &state; } extension_t* get_extension() { return ext; } + void push_privilege_stack(); + void pop_privilege_stack(); void yield_load_reservation() { state.load_reservation = (reg_t)-1; } void update_histogram(size_t pc); @@ -95,10 +100,10 @@ private: disassembler_t* disassembler; state_t state; uint32_t id; + int xlen; bool run; // !reset bool debug; bool histogram_enabled; - bool rv64; bool serialized; std::vector instructions; -- cgit v1.1