From f19f39f0c11d793e29196f0afc65f7f21c59871e Mon Sep 17 00:00:00 2001 From: Scott Johnson Date: Tue, 14 Sep 2021 16:29:48 -0700 Subject: Convert minstret to csr_t This is a little messy in RV32 since it's accessed via two different CSRs (upper and lower halves). This changes logging of mcycle[h] to log a change to minstret[h], since that's how it's always been implemented in Spike. There is no separate mcycle register. --- riscv/processor.cc | 31 ++++++++----------------------- 1 file changed, 8 insertions(+), 23 deletions(-) (limited to 'riscv/processor.cc') diff --git a/riscv/processor.cc b/riscv/processor.cc index f5f8aef..5df8ec0 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -376,7 +376,7 @@ void state_t::reset(processor_t* const proc, reg_t max_isa) csrmap[CSR_MSCRATCH] = std::make_shared(proc, CSR_MSCRATCH, 0); csrmap[CSR_MTVEC] = mtvec = std::make_shared(proc, CSR_MTVEC); csrmap[CSR_MCAUSE] = mcause = std::make_shared(proc, CSR_MCAUSE); - minstret = 0; + csrmap[CSR_MINSTRET] = minstret = std::make_shared(proc, CSR_MINSTRET); csrmap[CSR_MIE] = mie = std::make_shared(proc, CSR_MIE); csrmap[CSR_MIP] = mip = std::make_shared(proc, CSR_MIP); auto sip_sie_accr = std::make_shared(this, @@ -972,22 +972,12 @@ void processor_t::set_csr(int which, reg_t val) VU.vxsat = (val & VCSR_VXSAT) >> VCSR_VXSAT_SHIFT; VU.vxrm = (val & VCSR_VXRM) >> VCSR_VXRM_SHIFT; break; - case CSR_MINSTRET: case CSR_MCYCLE: - if (xlen == 32) - state.minstret = (state.minstret >> 32 << 32) | (val & 0xffffffffU); - else - state.minstret = val; - // The ISA mandates that if an instruction writes instret, the write - // takes precedence over the increment to instret. However, Spike - // unconditionally increments instret after executing an instruction. - // Correct for this artifact by decrementing instret here. - state.minstret--; + state.minstret->write(val); break; case CSR_MINSTRETH: case CSR_MCYCLEH: - state.minstret = (val << 32) | (state.minstret << 32 >> 32); - state.minstret--; // See comment above. + state.minstret->write_upper_half(val); break; case CSR_MTVAL2: state.mtval2 = val; break; case CSR_MTINST: state.mtinst = val; break; @@ -1141,10 +1131,6 @@ void processor_t::set_csr(int which, reg_t val) LOG_CSR(CSR_VXRM); break; - case CSR_MINSTRET: - case CSR_MCYCLE: - case CSR_MINSTRETH: - case CSR_MCYCLEH: case CSR_TSELECT: case CSR_TDATA1: case CSR_TDATA2: @@ -1242,15 +1228,14 @@ reg_t processor_t::get_csr(int which, insn_t insn, bool write, bool peek) goto throw_illegal; } if (which == CSR_INSTRET || which == CSR_CYCLE) - ret(state.minstret); + ret(state.minstret->read()); else ret(0); - case CSR_MINSTRET: case CSR_MCYCLE: case CSR_MHPMCOUNTER3 ... CSR_MHPMCOUNTER31: case CSR_MHPMEVENT3 ... CSR_MHPMEVENT31: - if (which == CSR_MINSTRET || which == CSR_MCYCLE) - ret(state.minstret); + if (which == CSR_MCYCLE) + ret(state.minstret->read()); else ret(0); case CSR_INSTRETH: @@ -1267,7 +1252,7 @@ reg_t processor_t::get_csr(int which, insn_t insn, bool write, bool peek) goto throw_illegal; } if (which == CSR_INSTRETH || which == CSR_CYCLEH) - ret(state.minstret >> 32); + ret(state.minstret->read() >> 32); else ret(0); case CSR_MINSTRETH: @@ -1275,7 +1260,7 @@ reg_t processor_t::get_csr(int which, insn_t insn, bool write, bool peek) case CSR_MHPMCOUNTER3H ... CSR_MHPMCOUNTER31H: if (xlen == 32) { if (which == CSR_MINSTRETH || which == CSR_MCYCLEH) - ret(state.minstret >> 32); + ret(state.minstret->read() >> 32); else ret(0); } -- cgit v1.1 From d0a3e776084f3c3d39bba205f6e1304c765c6cc5 Mon Sep 17 00:00:00 2001 From: Scott Johnson Date: Tue, 14 Sep 2021 18:24:24 -0700 Subject: Convert minstreth to csr_t --- riscv/processor.cc | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'riscv/processor.cc') diff --git a/riscv/processor.cc b/riscv/processor.cc index 5df8ec0..9bb56d6 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -377,6 +377,8 @@ void state_t::reset(processor_t* const proc, reg_t max_isa) csrmap[CSR_MTVEC] = mtvec = std::make_shared(proc, CSR_MTVEC); csrmap[CSR_MCAUSE] = mcause = std::make_shared(proc, CSR_MCAUSE); csrmap[CSR_MINSTRET] = minstret = std::make_shared(proc, CSR_MINSTRET); + if (xlen == 32) + csrmap[CSR_MINSTRETH] = std::make_shared(proc, CSR_MINSTRETH, minstret); csrmap[CSR_MIE] = mie = std::make_shared(proc, CSR_MIE); csrmap[CSR_MIP] = mip = std::make_shared(proc, CSR_MIP); auto sip_sie_accr = std::make_shared(this, @@ -975,7 +977,6 @@ void processor_t::set_csr(int which, reg_t val) case CSR_MCYCLE: state.minstret->write(val); break; - case CSR_MINSTRETH: case CSR_MCYCLEH: state.minstret->write_upper_half(val); break; @@ -1255,11 +1256,10 @@ reg_t processor_t::get_csr(int which, insn_t insn, bool write, bool peek) ret(state.minstret->read() >> 32); else ret(0); - case CSR_MINSTRETH: case CSR_MCYCLEH: case CSR_MHPMCOUNTER3H ... CSR_MHPMCOUNTER31H: if (xlen == 32) { - if (which == CSR_MINSTRETH || which == CSR_MCYCLEH) + if (which == CSR_MCYCLEH) ret(state.minstret->read() >> 32); else ret(0); -- cgit v1.1 From b23d9d5b1d906fd92a160774986ad40851c21020 Mon Sep 17 00:00:00 2001 From: Scott Johnson Date: Tue, 14 Sep 2021 18:56:45 -0700 Subject: Convert mcycle[h] (which is a mirror of minstret[h]) to csr_t --- riscv/processor.cc | 26 ++++++++------------------ 1 file changed, 8 insertions(+), 18 deletions(-) (limited to 'riscv/processor.cc') diff --git a/riscv/processor.cc b/riscv/processor.cc index 9bb56d6..22788a8 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -377,8 +377,12 @@ void state_t::reset(processor_t* const proc, reg_t max_isa) csrmap[CSR_MTVEC] = mtvec = std::make_shared(proc, CSR_MTVEC); csrmap[CSR_MCAUSE] = mcause = std::make_shared(proc, CSR_MCAUSE); csrmap[CSR_MINSTRET] = minstret = std::make_shared(proc, CSR_MINSTRET); - if (xlen == 32) - csrmap[CSR_MINSTRETH] = std::make_shared(proc, CSR_MINSTRETH, minstret); + csrmap[CSR_MCYCLE] = std::make_shared(proc, CSR_MCYCLE, minstret); + if (xlen == 32) { + minstreth_csr_t_p minstreth; + csrmap[CSR_MINSTRETH] = minstreth = std::make_shared(proc, CSR_MINSTRETH, minstret); + csrmap[CSR_MCYCLEH] = std::make_shared(proc, CSR_MCYCLEH, minstreth); + } csrmap[CSR_MIE] = mie = std::make_shared(proc, CSR_MIE); csrmap[CSR_MIP] = mip = std::make_shared(proc, CSR_MIP); auto sip_sie_accr = std::make_shared(this, @@ -974,12 +978,6 @@ void processor_t::set_csr(int which, reg_t val) VU.vxsat = (val & VCSR_VXSAT) >> VCSR_VXSAT_SHIFT; VU.vxrm = (val & VCSR_VXRM) >> VCSR_VXRM_SHIFT; break; - case CSR_MCYCLE: - state.minstret->write(val); - break; - case CSR_MCYCLEH: - state.minstret->write_upper_half(val); - break; case CSR_MTVAL2: state.mtval2 = val; break; case CSR_MTINST: state.mtinst = val; break; case CSR_HEDELEG: { @@ -1232,13 +1230,9 @@ reg_t processor_t::get_csr(int which, insn_t insn, bool write, bool peek) ret(state.minstret->read()); else ret(0); - case CSR_MCYCLE: case CSR_MHPMCOUNTER3 ... CSR_MHPMCOUNTER31: case CSR_MHPMEVENT3 ... CSR_MHPMEVENT31: - if (which == CSR_MCYCLE) - ret(state.minstret->read()); - else - ret(0); + ret(0); case CSR_INSTRETH: case CSR_CYCLEH: case CSR_HPMCOUNTER3H ... CSR_HPMCOUNTER31H: @@ -1256,13 +1250,9 @@ reg_t processor_t::get_csr(int which, insn_t insn, bool write, bool peek) ret(state.minstret->read() >> 32); else ret(0); - case CSR_MCYCLEH: case CSR_MHPMCOUNTER3H ... CSR_MHPMCOUNTER31H: if (xlen == 32) { - if (which == CSR_MCYCLEH) - ret(state.minstret->read() >> 32); - else - ret(0); + ret(0); } break; case CSR_MCOUNTINHIBIT: ret(0); -- cgit v1.1 From 3092501627f8d3f7e0aae6dc271a6edc15c80da1 Mon Sep 17 00:00:00 2001 From: Scott Johnson Date: Tue, 14 Sep 2021 19:45:58 -0700 Subject: Convert mhpmcounter, mhpmevents to csr_t --- riscv/processor.cc | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) (limited to 'riscv/processor.cc') diff --git a/riscv/processor.cc b/riscv/processor.cc index 22788a8..bd2d641 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -383,6 +383,19 @@ void state_t::reset(processor_t* const proc, reg_t max_isa) csrmap[CSR_MINSTRETH] = minstreth = std::make_shared(proc, CSR_MINSTRETH, minstret); csrmap[CSR_MCYCLEH] = std::make_shared(proc, CSR_MCYCLEH, minstreth); } + for (reg_t i=3; i<=31; ++i) { + const reg_t which_mcounter = CSR_MHPMCOUNTER3 + i - 3; + const reg_t which_mevent = CSR_MHPMEVENT3 + i - 3; + const reg_t which_mcounterh = CSR_MHPMCOUNTER3H + i - 3; + auto mcounter = std::make_shared(proc, which_mcounter, 0); + auto mevent = std::make_shared(proc, which_mevent, 0); + csrmap[which_mcounter] = mcounter; + csrmap[which_mevent] = mevent; + if (xlen == 32) { + auto mcounterh = std::make_shared(proc, which_mcounterh, 0); + csrmap[which_mcounterh] = mcounterh; + } + } csrmap[CSR_MIE] = mie = std::make_shared(proc, CSR_MIE); csrmap[CSR_MIP] = mip = std::make_shared(proc, CSR_MIP); auto sip_sie_accr = std::make_shared(this, @@ -1230,9 +1243,6 @@ reg_t processor_t::get_csr(int which, insn_t insn, bool write, bool peek) ret(state.minstret->read()); else ret(0); - case CSR_MHPMCOUNTER3 ... CSR_MHPMCOUNTER31: - case CSR_MHPMEVENT3 ... CSR_MHPMEVENT31: - ret(0); case CSR_INSTRETH: case CSR_CYCLEH: case CSR_HPMCOUNTER3H ... CSR_HPMCOUNTER31H: @@ -1250,11 +1260,6 @@ reg_t processor_t::get_csr(int which, insn_t insn, bool write, bool peek) ret(state.minstret->read() >> 32); else ret(0); - case CSR_MHPMCOUNTER3H ... CSR_MHPMCOUNTER31H: - if (xlen == 32) { - ret(0); - } - break; case CSR_MCOUNTINHIBIT: ret(0); case CSR_MSTATUSH: if (xlen == 32) -- cgit v1.1 From 55a272562ea12abc2fe3057e89247615525b7cc7 Mon Sep 17 00:00:00 2001 From: Scott Johnson Date: Tue, 14 Sep 2021 20:17:14 -0700 Subject: Convert unprivileged counter shadows to csr_t Soon I will simplify some of these cpp macros. --- riscv/processor.cc | 72 ++++++++++-------------------------------------------- 1 file changed, 13 insertions(+), 59 deletions(-) (limited to 'riscv/processor.cc') diff --git a/riscv/processor.cc b/riscv/processor.cc index bd2d641..d3009d2 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -378,22 +378,32 @@ void state_t::reset(processor_t* const proc, reg_t max_isa) csrmap[CSR_MCAUSE] = mcause = std::make_shared(proc, CSR_MCAUSE); csrmap[CSR_MINSTRET] = minstret = std::make_shared(proc, CSR_MINSTRET); csrmap[CSR_MCYCLE] = std::make_shared(proc, CSR_MCYCLE, minstret); + csrmap[CSR_INSTRET] = std::make_shared(proc, CSR_INSTRET, minstret); + csrmap[CSR_CYCLE] = std::make_shared(proc, CSR_CYCLE, minstret); if (xlen == 32) { minstreth_csr_t_p minstreth; csrmap[CSR_MINSTRETH] = minstreth = std::make_shared(proc, CSR_MINSTRETH, minstret); csrmap[CSR_MCYCLEH] = std::make_shared(proc, CSR_MCYCLEH, minstreth); + csrmap[CSR_INSTRETH] = std::make_shared(proc, CSR_INSTRETH, minstreth); + csrmap[CSR_CYCLEH] = std::make_shared(proc, CSR_CYCLEH, minstreth); } for (reg_t i=3; i<=31; ++i) { - const reg_t which_mcounter = CSR_MHPMCOUNTER3 + i - 3; const reg_t which_mevent = CSR_MHPMEVENT3 + i - 3; + const reg_t which_mcounter = CSR_MHPMCOUNTER3 + i - 3; const reg_t which_mcounterh = CSR_MHPMCOUNTER3H + i - 3; - auto mcounter = std::make_shared(proc, which_mcounter, 0); + const reg_t which_counter = CSR_HPMCOUNTER3 + i - 3; + const reg_t which_counterh = CSR_HPMCOUNTER3H + i - 3; auto mevent = std::make_shared(proc, which_mevent, 0); - csrmap[which_mcounter] = mcounter; + auto mcounter = std::make_shared(proc, which_mcounter, 0); + auto counter = std::make_shared(proc, which_counter, mcounter); csrmap[which_mevent] = mevent; + csrmap[which_mcounter] = mcounter; + csrmap[which_counter] = counter; if (xlen == 32) { auto mcounterh = std::make_shared(proc, which_mcounterh, 0); + auto counterh = std::make_shared(proc, which_counterh, mcounterh); csrmap[which_mcounterh] = mcounterh; + csrmap[which_counterh] = counterh; } } csrmap[CSR_MIE] = mie = std::make_shared(proc, CSR_MIE); @@ -1162,28 +1172,6 @@ void processor_t::set_csr(int which, reg_t val) // side effects on reads. reg_t processor_t::get_csr(int which, insn_t insn, bool write, bool peek) { -#define mcounteren_ok(__which) \ -({ \ - bool __ctr_ok = true; \ - if (state.prv < PRV_M) \ - __ctr_ok = (state.mcounteren->read() >> (__which & 31)) & 1; \ - __ctr_ok; \ -}) -#define hcounteren_ok(__which) \ -({ \ - bool __ctr_ok = true; \ - if (state.v) \ - __ctr_ok = (state.hcounteren->read() >> (__which & 31)) & 1; \ - __ctr_ok; \ -}) -#define scounteren_ok(__which) \ -({ \ - bool __ctr_ok = true; \ - if (extension_enabled('S') && state.prv < PRV_S) \ - __ctr_ok = (state.scounteren->read() >> (__which & 31)) & 1; \ - __ctr_ok; \ -}) - reg_t res = 0; #define ret(n) do { \ res = (n); \ @@ -1226,40 +1214,6 @@ reg_t processor_t::get_csr(int which, insn_t insn, bool write, bool peek) if (!extension_enabled('V')) break; ret((VU.vxsat << VCSR_VXSAT_SHIFT) | (VU.vxrm << VCSR_VXRM_SHIFT)); - case CSR_INSTRET: - case CSR_CYCLE: - case CSR_HPMCOUNTER3 ... CSR_HPMCOUNTER31: - if (!mcounteren_ok(which)) - goto throw_illegal; - if (!hcounteren_ok(which)) - goto throw_virtual; - if (!scounteren_ok(which)) { - if (state.v) - goto throw_virtual; - else - goto throw_illegal; - } - if (which == CSR_INSTRET || which == CSR_CYCLE) - ret(state.minstret->read()); - else - ret(0); - case CSR_INSTRETH: - case CSR_CYCLEH: - case CSR_HPMCOUNTER3H ... CSR_HPMCOUNTER31H: - if (!mcounteren_ok(which) || xlen != 32) - goto throw_illegal; - if (!hcounteren_ok(which)) - goto throw_virtual; - if (!scounteren_ok(which)) { - if (state.v) - goto throw_virtual; - else - goto throw_illegal; - } - if (which == CSR_INSTRETH || which == CSR_CYCLEH) - ret(state.minstret->read() >> 32); - else - ret(0); case CSR_MCOUNTINHIBIT: ret(0); case CSR_MSTATUSH: if (xlen == 32) -- cgit v1.1 From b3b61bd0fb39f55514026560d24adb20ae8eaf13 Mon Sep 17 00:00:00 2001 From: Scott Johnson Date: Wed, 15 Sep 2021 06:04:16 -0700 Subject: Convert mcountinhibit to csr_t --- riscv/processor.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'riscv/processor.cc') diff --git a/riscv/processor.cc b/riscv/processor.cc index d3009d2..dbf9013 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -406,6 +406,7 @@ void state_t::reset(processor_t* const proc, reg_t max_isa) csrmap[which_counterh] = counterh; } } + csrmap[CSR_MCOUNTINHIBIT] = std::make_shared(proc, CSR_MCOUNTINHIBIT, 0); csrmap[CSR_MIE] = mie = std::make_shared(proc, CSR_MIE); csrmap[CSR_MIP] = mip = std::make_shared(proc, CSR_MIP); auto sip_sie_accr = std::make_shared(this, @@ -1214,7 +1215,6 @@ reg_t processor_t::get_csr(int which, insn_t insn, bool write, bool peek) if (!extension_enabled('V')) break; ret((VU.vxsat << VCSR_VXSAT_SHIFT) | (VU.vxrm << VCSR_VXRM_SHIFT)); - case CSR_MCOUNTINHIBIT: ret(0); case CSR_MSTATUSH: if (xlen == 32) ret((state.mstatus->read() >> 32) & (MSTATUSH_SBE | MSTATUSH_MBE)); -- cgit v1.1