From c4f61cafe2afd53781bc23138b1424430974808f Mon Sep 17 00:00:00 2001
From: Andrew Waterman <andrew@sifive.com>
Date: Fri, 19 Jul 2019 01:41:18 -0700
Subject: Check vtype.vill for all vector instructions except vsetvl[i]

---
 riscv/insns/vrgather_vx.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'riscv/insns/vrgather_vx.h')

diff --git a/riscv/insns/vrgather_vx.h b/riscv/insns/vrgather_vx.h
index d6c2e38..e9ff3b1 100644
--- a/riscv/insns/vrgather_vx.h
+++ b/riscv/insns/vrgather_vx.h
@@ -1,6 +1,6 @@
 // vrgather.vx vd, vs2, rs1, vm # vd[i] = (rs1 >= VLMAX) ? 0 : vs2[rs1];
 require(P.VU.vsew >= e8 && P.VU.vsew <= e64);
-require(!P.VU.vill);
+require_vector;
 reg_t vl = P.VU.vl;
 reg_t sew = P.VU.vsew;
 reg_t rd_num = insn.rd();
-- 
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