From 1cd989add98a8796bf57902853e911608aa737dd Mon Sep 17 00:00:00 2001 From: Chih-Min Chao Date: Mon, 7 Oct 2019 02:27:37 -0700 Subject: rvv: add register using check for wide and narrow insn include 1. narrow shift 2. narrow clip 3. wide mac Signed-off-by: Chih-Min Chao --- riscv/insns/vnsra_vv.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'riscv/insns/vnsra_vv.h') diff --git a/riscv/insns/vnsra_vv.h b/riscv/insns/vnsra_vv.h index 555ce3f..59f255e 100644 --- a/riscv/insns/vnsra_vv.h +++ b/riscv/insns/vnsra_vv.h @@ -2,4 +2,4 @@ VI_VV_LOOP_NSHIFT ({ vd = vs2 >> (vs1 & (sew * 2 - 1)); -}) +}, true) -- cgit v1.1