From 26253c1a4baccba5a9caf869aef97ee3601d07e3 Mon Sep 17 00:00:00 2001 From: Chih-Min Chao Date: Mon, 8 Apr 2019 00:13:05 -0700 Subject: rvv: add mask register operation Signed-off-by: Chih-Min Chao --- riscv/insns/vmnand_mm.h | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) (limited to 'riscv/insns/vmnand_mm.h') diff --git a/riscv/insns/vmnand_mm.h b/riscv/insns/vmnand_mm.h index f188a12..5a3ab09 100644 --- a/riscv/insns/vmnand_mm.h +++ b/riscv/insns/vmnand_mm.h @@ -1,5 +1,2 @@ -// vmnand -VI_VV_LOOP -({ - // NOT IMPLEMENTED YET -}) +// vmnand.mm vd, vs2, vs1 +VI_LOOP_MASK(~(vs2 & vs1)); -- cgit v1.1