From 833b965679f4502f83c66353bfc07a092cfac9f6 Mon Sep 17 00:00:00 2001
From: Chih-Min Chao <chihmin.chao@sifive.com>
Date: Thu, 6 Jun 2019 03:25:04 -0700
Subject: rvv: add floating-point instructions

based on v-spec 0.7.1, support
  sections: 14/15.3 ~ 15.4
  element size: 32

Signed-off-by: Bruce Hoult <bruce@hoult.org>
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Signed-off-by: Dave Wen <dave.wen@sifive.com>
---
 riscv/insns/vfwsub_vf.h | 5 +++++
 1 file changed, 5 insertions(+)
 create mode 100644 riscv/insns/vfwsub_vf.h

(limited to 'riscv/insns/vfwsub_vf.h')

diff --git a/riscv/insns/vfwsub_vf.h b/riscv/insns/vfwsub_vf.h
new file mode 100644
index 0000000..1d20c38
--- /dev/null
+++ b/riscv/insns/vfwsub_vf.h
@@ -0,0 +1,5 @@
+// vfwsub.vf vd, vs2, rs1
+VI_VFP_VF_LOOP_WIDE
+({
+  vd = f64_sub(vs2, rs1);
+})
-- 
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