From 59a9277ac1e3f9aca630fb035d1dbacaa091e375 Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Fri, 20 Mar 2020 01:48:03 -0700 Subject: ebreak should write mtval with 0, not pc Resolves #426 The relevant passage in the spec does not mention software breakpoints as one of the cases that cause mtval to be set to a nonzero value: https://github.com/riscv/riscv-isa-manual/blob/274893e2f0365f904829bbb60fd05cc01d2bfb11/src/machine.tex#L2202 --- riscv/insns/ebreak.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'riscv/insns/ebreak.h') diff --git a/riscv/insns/ebreak.h b/riscv/insns/ebreak.h index 736cebe..c22776c 100644 --- a/riscv/insns/ebreak.h +++ b/riscv/insns/ebreak.h @@ -1 +1 @@ -throw trap_breakpoint(pc); +throw trap_breakpoint(); -- cgit v1.1