From db4962e2af32f784ea4aefeff743e167ac63d8f0 Mon Sep 17 00:00:00 2001 From: Chih-Min Chao Date: Wed, 1 Apr 2020 01:13:29 -0700 Subject: rvv: add vmfxx f16 compare instructions Signed-off-by: Chih-Min Chao --- riscv/decode.h | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) (limited to 'riscv/decode.h') diff --git a/riscv/decode.h b/riscv/decode.h index 1a20716..a86f712 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -1865,10 +1865,18 @@ for (reg_t i = 0; i < vlmax && P.VU.vl != 0; ++i) { \ DEBUG_RVV_FP_VF; \ VI_VFP_LOOP_END -#define VI_VFP_LOOP_CMP(BODY32, BODY64, is_vs1) \ +#define VI_VFP_LOOP_CMP(BODY16, BODY32, BODY64, is_vs1) \ VI_CHECK_MSS(is_vs1); \ VI_VFP_LOOP_CMP_BASE \ switch(P.VU.vsew) { \ + case e16: {\ + float16_t vs2 = P.VU.elt(rs2_num, i); \ + float16_t vs1 = P.VU.elt(rs1_num, i); \ + float16_t rs1 = f16(READ_FREG(rs1_num)); \ + BODY16; \ + set_fp_exceptions; \ + break; \ + }\ case e32: {\ float32_t vs2 = P.VU.elt(rs2_num, i); \ float32_t vs1 = P.VU.elt(rs1_num, i); \ @@ -1885,7 +1893,6 @@ for (reg_t i = 0; i < vlmax && P.VU.vl != 0; ++i) { \ set_fp_exceptions; \ break; \ }\ - case e16: \ default: \ require(0); \ break; \ -- cgit v1.1