From a4a2ce20caf756e39e109f5cc047238c35e03857 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Thu, 29 Aug 2019 21:06:09 +0200 Subject: [riscv-bitmanip] Changes for RISC-V Bitmanip Spec 0.91 Signed-off-by: Clifford Wolf --- riscv/encoding.h | 68 +++++++++++++++++++++++++++++++++------------------- riscv/insns/bfp.h | 10 ++++++++ riscv/insns/bfpw.h | 10 ++++++++ riscv/insns/gorc.h | 10 ++++++++ riscv/insns/gorci.h | 11 +++++++++ riscv/insns/gorciw.h | 11 +++++++++ riscv/insns/gorcw.h | 10 ++++++++ riscv/riscv.mk.in | 6 +++++ 8 files changed, 111 insertions(+), 25 deletions(-) create mode 100644 riscv/insns/bfp.h create mode 100644 riscv/insns/bfpw.h create mode 100644 riscv/insns/gorc.h create mode 100644 riscv/insns/gorci.h create mode 100644 riscv/insns/gorciw.h create mode 100644 riscv/insns/gorcw.h diff --git a/riscv/encoding.h b/riscv/encoding.h index 417fe64..ee0a184 100644 --- a/riscv/encoding.h +++ b/riscv/encoding.h @@ -454,8 +454,6 @@ #define MASK_ORN 0xfe00707f #define MATCH_XNOR 0x40004033 #define MASK_XNOR 0xfe00707f -#define MATCH_GREV 0x40001033 -#define MASK_GREV 0xfe00707f #define MATCH_SLO 0x20001033 #define MASK_SLO 0xfe00707f #define MATCH_SRO 0x20005033 @@ -464,30 +462,36 @@ #define MASK_ROL 0xfe00707f #define MATCH_ROR 0x60005033 #define MASK_ROR 0xfe00707f -#define MATCH_SBSET 0x28001033 -#define MASK_SBSET 0xfe00707f #define MATCH_SBCLR 0x48001033 #define MASK_SBCLR 0xfe00707f +#define MATCH_SBSET 0x28001033 +#define MASK_SBSET 0xfe00707f #define MATCH_SBINV 0x68001033 #define MASK_SBINV 0xfe00707f #define MATCH_SBEXT 0x48005033 #define MASK_SBEXT 0xfe00707f -#define MATCH_GREVI 0x40001013 -#define MASK_GREVI 0xfc00707f +#define MATCH_GORC 0x28005033 +#define MASK_GORC 0xfe00707f +#define MATCH_GREV 0x68005033 +#define MASK_GREV 0xfe00707f #define MATCH_SLOI 0x20001013 #define MASK_SLOI 0xfc00707f #define MATCH_SROI 0x20005013 #define MASK_SROI 0xfc00707f #define MATCH_RORI 0x60005013 #define MASK_RORI 0xfc00707f -#define MATCH_SBSETI 0x28001013 -#define MASK_SBSETI 0xfc00707f #define MATCH_SBCLRI 0x48001013 #define MASK_SBCLRI 0xfc00707f +#define MATCH_SBSETI 0x28001013 +#define MASK_SBSETI 0xfc00707f #define MATCH_SBINVI 0x68001013 #define MASK_SBINVI 0xfc00707f #define MATCH_SBEXTI 0x48005013 #define MASK_SBEXTI 0xfc00707f +#define MATCH_GORCI 0x28005013 +#define MASK_GORCI 0xfc00707f +#define MATCH_GREVI 0x68005013 +#define MASK_GREVI 0xfc00707f #define MATCH_CMIX 0x6001033 #define MASK_CMIX 0x600707f #define MATCH_CMOV 0x6005033 @@ -540,6 +544,8 @@ #define MASK_BEXT 0xfe00707f #define MATCH_PACK 0x8004033 #define MASK_PACK 0xfe00707f +#define MATCH_BFP 0x8007033 +#define MASK_BFP 0xfe00707f #define MATCH_SHFLI 0x8001013 #define MASK_SHFLI 0xfe00707f #define MATCH_UNSHFLI 0x8005013 @@ -552,7 +558,7 @@ #define MASK_CRC32C_D 0xfff0707f #define MATCH_BMATOR 0x8003033 #define MASK_BMATOR 0xfe00707f -#define MATCH_BMATXOR 0x8007033 +#define MATCH_BMATXOR 0x48003033 #define MASK_BMATXOR 0xfe00707f #define MATCH_ADDIWU 0x401b #define MASK_ADDIWU 0x707f @@ -566,8 +572,6 @@ #define MASK_ADDU_W 0xfe00707f #define MATCH_SUBU_W 0x4800003b #define MASK_SUBU_W 0xfe00707f -#define MATCH_GREVW 0x4000103b -#define MASK_GREVW 0xfe00707f #define MATCH_SLOW 0x2000103b #define MASK_SLOW 0xfe00707f #define MATCH_SROW 0x2000503b @@ -576,28 +580,34 @@ #define MASK_ROLW 0xfe00707f #define MATCH_RORW 0x6000503b #define MASK_RORW 0xfe00707f -#define MATCH_SBSETW 0x2800103b -#define MASK_SBSETW 0xfe00707f #define MATCH_SBCLRW 0x4800103b #define MASK_SBCLRW 0xfe00707f +#define MATCH_SBSETW 0x2800103b +#define MASK_SBSETW 0xfe00707f #define MATCH_SBINVW 0x6800103b #define MASK_SBINVW 0xfe00707f #define MATCH_SBEXTW 0x4800503b #define MASK_SBEXTW 0xfe00707f -#define MATCH_GREVIW 0x4000101b -#define MASK_GREVIW 0xfe00707f +#define MATCH_GORCW 0x2800503b +#define MASK_GORCW 0xfe00707f +#define MATCH_GREVW 0x6800503b +#define MASK_GREVW 0xfe00707f #define MATCH_SLOIW 0x2000101b #define MASK_SLOIW 0xfe00707f #define MATCH_SROIW 0x2000501b #define MASK_SROIW 0xfe00707f #define MATCH_RORIW 0x6000501b #define MASK_RORIW 0xfe00707f -#define MATCH_SBSETIW 0x2800101b -#define MASK_SBSETIW 0xfe00707f #define MATCH_SBCLRIW 0x4800101b #define MASK_SBCLRIW 0xfe00707f +#define MATCH_SBSETIW 0x2800101b +#define MASK_SBSETIW 0xfe00707f #define MATCH_SBINVIW 0x6800101b #define MASK_SBINVIW 0xfe00707f +#define MATCH_GORCIW 0x2800501b +#define MASK_GORCIW 0xfe00707f +#define MATCH_GREVIW 0x6800501b +#define MASK_GREVIW 0xfe00707f #define MATCH_FSLW 0x400103b #define MASK_FSLW 0x600707f #define MATCH_FSRW 0x400503b @@ -626,6 +636,8 @@ #define MASK_BEXTW 0xfe00707f #define MATCH_PACKW 0x800403b #define MASK_PACKW 0xfe00707f +#define MATCH_BFPW 0x800703b +#define MASK_BFPW 0xfe00707f #define MATCH_AMOADD_W 0x202f #define MASK_AMOADD_W 0xf800707f #define MATCH_AMOXOR_W 0x2000202f @@ -2404,23 +2416,25 @@ DECLARE_INSN(remuw, MATCH_REMUW, MASK_REMUW) DECLARE_INSN(andn, MATCH_ANDN, MASK_ANDN) DECLARE_INSN(orn, MATCH_ORN, MASK_ORN) DECLARE_INSN(xnor, MATCH_XNOR, MASK_XNOR) -DECLARE_INSN(grev, MATCH_GREV, MASK_GREV) DECLARE_INSN(slo, MATCH_SLO, MASK_SLO) DECLARE_INSN(sro, MATCH_SRO, MASK_SRO) DECLARE_INSN(rol, MATCH_ROL, MASK_ROL) DECLARE_INSN(ror, MATCH_ROR, MASK_ROR) -DECLARE_INSN(sbset, MATCH_SBSET, MASK_SBSET) DECLARE_INSN(sbclr, MATCH_SBCLR, MASK_SBCLR) +DECLARE_INSN(sbset, MATCH_SBSET, MASK_SBSET) DECLARE_INSN(sbinv, MATCH_SBINV, MASK_SBINV) DECLARE_INSN(sbext, MATCH_SBEXT, MASK_SBEXT) -DECLARE_INSN(grevi, MATCH_GREVI, MASK_GREVI) +DECLARE_INSN(gorc, MATCH_GORC, MASK_GORC) +DECLARE_INSN(grev, MATCH_GREV, MASK_GREV) DECLARE_INSN(sloi, MATCH_SLOI, MASK_SLOI) DECLARE_INSN(sroi, MATCH_SROI, MASK_SROI) DECLARE_INSN(rori, MATCH_RORI, MASK_RORI) -DECLARE_INSN(sbseti, MATCH_SBSETI, MASK_SBSETI) DECLARE_INSN(sbclri, MATCH_SBCLRI, MASK_SBCLRI) +DECLARE_INSN(sbseti, MATCH_SBSETI, MASK_SBSETI) DECLARE_INSN(sbinvi, MATCH_SBINVI, MASK_SBINVI) DECLARE_INSN(sbexti, MATCH_SBEXTI, MASK_SBEXTI) +DECLARE_INSN(gorci, MATCH_GORCI, MASK_GORCI) +DECLARE_INSN(grevi, MATCH_GREVI, MASK_GREVI) DECLARE_INSN(cmix, MATCH_CMIX, MASK_CMIX) DECLARE_INSN(cmov, MATCH_CMOV, MASK_CMOV) DECLARE_INSN(fsl, MATCH_FSL, MASK_FSL) @@ -2447,6 +2461,7 @@ DECLARE_INSN(unshfl, MATCH_UNSHFL, MASK_UNSHFL) DECLARE_INSN(bdep, MATCH_BDEP, MASK_BDEP) DECLARE_INSN(bext, MATCH_BEXT, MASK_BEXT) DECLARE_INSN(pack, MATCH_PACK, MASK_PACK) +DECLARE_INSN(bfp, MATCH_BFP, MASK_BFP) DECLARE_INSN(shfli, MATCH_SHFLI, MASK_SHFLI) DECLARE_INSN(unshfli, MATCH_UNSHFLI, MASK_UNSHFLI) DECLARE_INSN(bmatflip, MATCH_BMATFLIP, MASK_BMATFLIP) @@ -2460,22 +2475,24 @@ DECLARE_INSN(addwu, MATCH_ADDWU, MASK_ADDWU) DECLARE_INSN(subwu, MATCH_SUBWU, MASK_SUBWU) DECLARE_INSN(addu_w, MATCH_ADDU_W, MASK_ADDU_W) DECLARE_INSN(subu_w, MATCH_SUBU_W, MASK_SUBU_W) -DECLARE_INSN(grevw, MATCH_GREVW, MASK_GREVW) DECLARE_INSN(slow, MATCH_SLOW, MASK_SLOW) DECLARE_INSN(srow, MATCH_SROW, MASK_SROW) DECLARE_INSN(rolw, MATCH_ROLW, MASK_ROLW) DECLARE_INSN(rorw, MATCH_RORW, MASK_RORW) -DECLARE_INSN(sbsetw, MATCH_SBSETW, MASK_SBSETW) DECLARE_INSN(sbclrw, MATCH_SBCLRW, MASK_SBCLRW) +DECLARE_INSN(sbsetw, MATCH_SBSETW, MASK_SBSETW) DECLARE_INSN(sbinvw, MATCH_SBINVW, MASK_SBINVW) DECLARE_INSN(sbextw, MATCH_SBEXTW, MASK_SBEXTW) -DECLARE_INSN(greviw, MATCH_GREVIW, MASK_GREVIW) +DECLARE_INSN(gorcw, MATCH_GORCW, MASK_GORCW) +DECLARE_INSN(grevw, MATCH_GREVW, MASK_GREVW) DECLARE_INSN(sloiw, MATCH_SLOIW, MASK_SLOIW) DECLARE_INSN(sroiw, MATCH_SROIW, MASK_SROIW) DECLARE_INSN(roriw, MATCH_RORIW, MASK_RORIW) -DECLARE_INSN(sbsetiw, MATCH_SBSETIW, MASK_SBSETIW) DECLARE_INSN(sbclriw, MATCH_SBCLRIW, MASK_SBCLRIW) +DECLARE_INSN(sbsetiw, MATCH_SBSETIW, MASK_SBSETIW) DECLARE_INSN(sbinviw, MATCH_SBINVIW, MASK_SBINVIW) +DECLARE_INSN(gorciw, MATCH_GORCIW, MASK_GORCIW) +DECLARE_INSN(greviw, MATCH_GREVIW, MASK_GREVIW) DECLARE_INSN(fslw, MATCH_FSLW, MASK_FSLW) DECLARE_INSN(fsrw, MATCH_FSRW, MASK_FSRW) DECLARE_INSN(fsriw, MATCH_FSRIW, MASK_FSRIW) @@ -2490,6 +2507,7 @@ DECLARE_INSN(unshflw, MATCH_UNSHFLW, MASK_UNSHFLW) DECLARE_INSN(bdepw, MATCH_BDEPW, MASK_BDEPW) DECLARE_INSN(bextw, MATCH_BEXTW, MASK_BEXTW) DECLARE_INSN(packw, MATCH_PACKW, MASK_PACKW) +DECLARE_INSN(bfpw, MATCH_BFPW, MASK_BFPW) DECLARE_INSN(amoadd_w, MATCH_AMOADD_W, MASK_AMOADD_W) DECLARE_INSN(amoxor_w, MATCH_AMOXOR_W, MASK_AMOXOR_W) DECLARE_INSN(amoor_w, MATCH_AMOOR_W, MASK_AMOOR_W) diff --git a/riscv/insns/bfp.h b/riscv/insns/bfp.h new file mode 100644 index 0000000..705fed0 --- /dev/null +++ b/riscv/insns/bfp.h @@ -0,0 +1,10 @@ +require_extension('B'); +int len = (RS2 >> 24) & 15; +int off = (RS2 >> 16) & (xlen-1); +int roff = -off & (xlen-1); +len = len ? len : 16; +reg_t mask = (1 << len) - 1; +reg_t data = zext_xlen(RS2); +mask = (mask << off) | (mask >> roff); +data = (data << off) | (data >> roff); +WRITE_RD(sext_xlen((data & mask) | (RS1 & ~mask))); diff --git a/riscv/insns/bfpw.h b/riscv/insns/bfpw.h new file mode 100644 index 0000000..1411b88 --- /dev/null +++ b/riscv/insns/bfpw.h @@ -0,0 +1,10 @@ +require_extension('B'); +int len = (RS2 >> 24) & 15; +int off = (RS2 >> 16) & 31; +int roff = -off & 31; +len = len ? len : 16; +reg_t mask = (1 << len) - 1; +reg_t data = zext32(RS2); +mask = (mask << off) | (mask >> roff); +data = (data << off) | (data >> roff); +WRITE_RD(sext32((data & mask) | (RS1 & ~mask))); diff --git a/riscv/insns/gorc.h b/riscv/insns/gorc.h new file mode 100644 index 0000000..097ba9b --- /dev/null +++ b/riscv/insns/gorc.h @@ -0,0 +1,10 @@ +require_extension('B'); +reg_t x = RS1; +int shamt = RS2 & (xlen-1); +if (shamt & 1) x |= ((x & 0x5555555555555555LL) << 1) | ((x & 0xAAAAAAAAAAAAAAAALL) >> 1); +if (shamt & 2) x |= ((x & 0x3333333333333333LL) << 2) | ((x & 0xCCCCCCCCCCCCCCCCLL) >> 2); +if (shamt & 4) x |= ((x & 0x0F0F0F0F0F0F0F0FLL) << 4) | ((x & 0xF0F0F0F0F0F0F0F0LL) >> 4); +if (shamt & 8) x |= ((x & 0x00FF00FF00FF00FFLL) << 8) | ((x & 0xFF00FF00FF00FF00LL) >> 8); +if (shamt & 16) x |= ((x & 0x0000FFFF0000FFFFLL) << 16) | ((x & 0xFFFF0000FFFF0000LL) >> 16); +if (shamt & 32) x |= ((x & 0x00000000FFFFFFFFLL) << 32) | ((x & 0xFFFFFFFF00000000LL) >> 32); +WRITE_RD(sext_xlen(x)); diff --git a/riscv/insns/gorci.h b/riscv/insns/gorci.h new file mode 100644 index 0000000..c42142f --- /dev/null +++ b/riscv/insns/gorci.h @@ -0,0 +1,11 @@ +require_extension('B'); +require(SHAMT < xlen); +reg_t x = RS1; +int shamt = SHAMT; +if (shamt & 1) x |= ((x & 0x5555555555555555LL) << 1) | ((x & 0xAAAAAAAAAAAAAAAALL) >> 1); +if (shamt & 2) x |= ((x & 0x3333333333333333LL) << 2) | ((x & 0xCCCCCCCCCCCCCCCCLL) >> 2); +if (shamt & 4) x |= ((x & 0x0F0F0F0F0F0F0F0FLL) << 4) | ((x & 0xF0F0F0F0F0F0F0F0LL) >> 4); +if (shamt & 8) x |= ((x & 0x00FF00FF00FF00FFLL) << 8) | ((x & 0xFF00FF00FF00FF00LL) >> 8); +if (shamt & 16) x |= ((x & 0x0000FFFF0000FFFFLL) << 16) | ((x & 0xFFFF0000FFFF0000LL) >> 16); +if (shamt & 32) x |= ((x & 0x00000000FFFFFFFFLL) << 32) | ((x & 0xFFFFFFFF00000000LL) >> 32); +WRITE_RD(sext_xlen(x)); diff --git a/riscv/insns/gorciw.h b/riscv/insns/gorciw.h new file mode 100644 index 0000000..27bc753 --- /dev/null +++ b/riscv/insns/gorciw.h @@ -0,0 +1,11 @@ +require_rv64; +require_extension('B'); +require(SHAMT < 32); +reg_t x = RS1; +int shamt = SHAMT; +if (shamt & 1) x |= ((x & 0x5555555555555555LL) << 1) | ((x & 0xAAAAAAAAAAAAAAAALL) >> 1); +if (shamt & 2) x |= ((x & 0x3333333333333333LL) << 2) | ((x & 0xCCCCCCCCCCCCCCCCLL) >> 2); +if (shamt & 4) x |= ((x & 0x0F0F0F0F0F0F0F0FLL) << 4) | ((x & 0xF0F0F0F0F0F0F0F0LL) >> 4); +if (shamt & 8) x |= ((x & 0x00FF00FF00FF00FFLL) << 8) | ((x & 0xFF00FF00FF00FF00LL) >> 8); +if (shamt & 16) x |= ((x & 0x0000FFFF0000FFFFLL) << 16) | ((x & 0xFFFF0000FFFF0000LL) >> 16); +WRITE_RD(sext32(x)); diff --git a/riscv/insns/gorcw.h b/riscv/insns/gorcw.h new file mode 100644 index 0000000..88642fb --- /dev/null +++ b/riscv/insns/gorcw.h @@ -0,0 +1,10 @@ +require_rv64; +require_extension('B'); +reg_t x = RS1; +int shamt = RS2 & 31; +if (shamt & 1) x |= ((x & 0x5555555555555555LL) << 1) | ((x & 0xAAAAAAAAAAAAAAAALL) >> 1); +if (shamt & 2) x |= ((x & 0x3333333333333333LL) << 2) | ((x & 0xCCCCCCCCCCCCCCCCLL) >> 2); +if (shamt & 4) x |= ((x & 0x0F0F0F0F0F0F0F0FLL) << 4) | ((x & 0xF0F0F0F0F0F0F0F0LL) >> 4); +if (shamt & 8) x |= ((x & 0x00FF00FF00FF00FFLL) << 8) | ((x & 0xFF00FF00FF00FF00LL) >> 8); +if (shamt & 16) x |= ((x & 0x0000FFFF0000FFFFLL) << 16) | ((x & 0xFFFF0000FFFF0000LL) >> 16); +WRITE_RD(sext32(x)); diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in index 126c23a..04c35da 100644 --- a/riscv/riscv.mk.in +++ b/riscv/riscv.mk.in @@ -342,6 +342,8 @@ riscv_insn_ext_b = \ bdepw \ bext \ bextw \ + bfp \ + bfpw \ bmatflip \ bmator \ bmatxor \ @@ -371,6 +373,10 @@ riscv_insn_ext_b = \ fsri \ fsriw \ fsrw \ + gorc \ + gorci \ + gorciw \ + gorcw \ grev \ grevi \ greviw \ -- cgit v1.1