From 3a4f1702eda753c4a0a0eba25156fc612b4001d9 Mon Sep 17 00:00:00 2001
From: Andrew Waterman <andrew@sifive.com>
Date: Wed, 1 May 2024 16:20:59 -0700
Subject: Remove Zbpbo, Zpn, and Zpsfoperand from disassembler

---
 disasm/disasm.cc | 319 -------------------------------------------------------
 1 file changed, 319 deletions(-)

diff --git a/disasm/disasm.cc b/disasm/disasm.cc
index 187a1d5..6716e5b 100644
--- a/disasm/disasm.cc
+++ b/disasm/disasm.cc
@@ -1852,31 +1852,6 @@ void disassembler_t::add_instructions(const isa_parser_t* isa)
     DEFINE_VECTOR_VV(vfwmaccbf16_vv);
     DEFINE_VECTOR_VF(vfwmaccbf16_vf);
   }
-
-#define DEFINE_PI3TYPE(code) add_pitype3_insn(this, #code, match_##code, mask_##code);
-#define DEFINE_PI4TYPE(code) add_pitype4_insn(this, #code, match_##code, mask_##code);
-#define DEFINE_PI5TYPE(code) add_pitype5_insn(this, #code, match_##code, mask_##code);
-#define DEFINE_PI6TYPE(code) add_pitype6_insn(this, #code, match_##code, mask_##code);
-
-#define DISASM_8_AND_16_RINSN(code) \
-  DEFINE_RTYPE(code##8); \
-  DEFINE_RTYPE(code##16);
-
-#define DISASM_8_AND_16_RINSN_ROUND(code) \
-  DEFINE_RTYPE(code##8_u); \
-  DEFINE_RTYPE(code##16_u);
-
-#define DISASM_8_AND_16_PIINSN(code) \
-  DEFINE_PI3TYPE(code##8); \
-  DEFINE_PI4TYPE(code##16);
-
-#define DISASM_8_AND_16_PIINSN_ROUND(code) \
-  DEFINE_PI3TYPE(code##8_u); \
-  DEFINE_PI4TYPE(code##16_u);
-
-#define DISASM_RINSN_AND_ROUND(code) \
-  DEFINE_RTYPE(code); \
-  DEFINE_RTYPE(code##_u); \
   
   if (isa->extension_enabled(EXT_ZMMUL)) {
     DEFINE_RTYPE(mul);
@@ -1886,300 +1861,6 @@ void disassembler_t::add_instructions(const isa_parser_t* isa)
     DEFINE_RTYPE(mulw);
   }
 
-  if (isa->extension_enabled(EXT_ZBPBO)) {
-    DEFINE_RTYPE(min);
-    DEFINE_RTYPE(max);
-    DEFINE_R3TYPE(cmix);
-    DEFINE_RTYPE(pack);
-    DEFINE_RTYPE(packu);
-    add_insn(new disasm_insn_t("rev", match_grevi | ((isa->get_max_xlen() - 1) << imm_shift), mask_grevi | mask_imm, {&xrd, &xrs1}));
-    add_insn(new disasm_insn_t("rev8.h", match_grevi | (0x8 << imm_shift), mask_grevi | mask_imm, {&xrd, &xrs1})); // swap16
-    if (isa->get_max_xlen() == 32) {
-      DEFINE_R1TYPE(clz);
-      DEFINE_R3TYPE(fsr);
-      DEFINE_R3TYPE(fsri);
-    } else {
-      DEFINE_R3TYPE(fsrw);
-    }
-  }
-
-  if (isa->extension_enabled(EXT_ZPSFOPERAND)) {
-    DEFINE_RTYPE(smal)
-    DEFINE_RTYPE(radd64);
-    DEFINE_RTYPE(uradd64);
-    DEFINE_RTYPE(kadd64);
-    DEFINE_RTYPE(ukadd64);
-    DEFINE_RTYPE(rsub64);
-    DEFINE_RTYPE(ursub64);
-    DEFINE_RTYPE(ksub64);
-    DEFINE_RTYPE(uksub64);
-    DEFINE_RTYPE(smar64);
-    DEFINE_RTYPE(smsr64);
-    DEFINE_RTYPE(umar64);
-    DEFINE_RTYPE(umsr64);
-    DEFINE_RTYPE(kmar64);
-    DEFINE_RTYPE(kmsr64);
-    DEFINE_RTYPE(ukmar64);
-    DEFINE_RTYPE(ukmsr64);
-    DEFINE_RTYPE(smalbb);
-    DEFINE_RTYPE(smalbt);
-    DEFINE_RTYPE(smaltt);
-    DEFINE_RTYPE(smalda);
-    DEFINE_RTYPE(smalxda);
-    DEFINE_RTYPE(smalds);
-    DEFINE_RTYPE(smaldrs);
-    DEFINE_RTYPE(smalxds);
-    DEFINE_RTYPE(smslda);
-    DEFINE_RTYPE(smslxda);
-    DEFINE_RTYPE(mulr64);
-    DEFINE_RTYPE(mulsr64);
-    if (isa->get_max_xlen() == 32) {
-      DEFINE_RTYPE(add64);
-      DEFINE_RTYPE(sub64);
-    }
-  }
-
-  if (isa->extension_enabled(EXT_ZPN)) {
-    DISASM_8_AND_16_RINSN(add);
-    DISASM_8_AND_16_RINSN(radd);
-    DISASM_8_AND_16_RINSN(uradd);
-    DISASM_8_AND_16_RINSN(kadd);
-    DISASM_8_AND_16_RINSN(ukadd);
-    DISASM_8_AND_16_RINSN(sub);
-    DISASM_8_AND_16_RINSN(rsub);
-    DISASM_8_AND_16_RINSN(ursub);
-    DISASM_8_AND_16_RINSN(ksub);
-    DISASM_8_AND_16_RINSN(uksub);
-    DEFINE_RTYPE(cras16);
-    DEFINE_RTYPE(rcras16);
-    DEFINE_RTYPE(urcras16);
-    DEFINE_RTYPE(kcras16);
-    DEFINE_RTYPE(ukcras16);
-    DEFINE_RTYPE(crsa16);
-    DEFINE_RTYPE(rcrsa16);
-    DEFINE_RTYPE(urcrsa16);
-    DEFINE_RTYPE(kcrsa16);
-    DEFINE_RTYPE(ukcrsa16);
-    DEFINE_RTYPE(stas16);
-    DEFINE_RTYPE(rstas16);
-    DEFINE_RTYPE(urstas16);
-    DEFINE_RTYPE(kstas16);
-    DEFINE_RTYPE(ukstas16);
-    DEFINE_RTYPE(stsa16);
-    DEFINE_RTYPE(rstsa16);
-    DEFINE_RTYPE(urstsa16);
-    DEFINE_RTYPE(kstsa16);
-    DEFINE_RTYPE(ukstsa16);
-    DISASM_8_AND_16_RINSN(sra);
-    DISASM_8_AND_16_RINSN(srl);
-    DISASM_8_AND_16_RINSN(sll);
-    DISASM_8_AND_16_RINSN(ksll);
-    DISASM_8_AND_16_RINSN(kslra);
-    DISASM_8_AND_16_PIINSN(srai);
-    DISASM_8_AND_16_PIINSN(srli);
-    DISASM_8_AND_16_PIINSN(slli);
-    DISASM_8_AND_16_PIINSN(kslli);
-    DISASM_8_AND_16_RINSN_ROUND(sra);
-    DISASM_8_AND_16_RINSN_ROUND(srl);
-    DISASM_8_AND_16_RINSN_ROUND(kslra);
-    DISASM_8_AND_16_PIINSN_ROUND(srai);
-    DISASM_8_AND_16_PIINSN_ROUND(srli);
-
-    DISASM_8_AND_16_RINSN(cmpeq);
-    DISASM_8_AND_16_RINSN(scmplt);
-    DISASM_8_AND_16_RINSN(scmple);
-    DISASM_8_AND_16_RINSN(ucmplt);
-    DISASM_8_AND_16_RINSN(ucmple);
-
-    DISASM_8_AND_16_RINSN(smul);
-    DISASM_8_AND_16_RINSN(smulx);
-    DISASM_8_AND_16_RINSN(umul);
-    DISASM_8_AND_16_RINSN(umulx);
-    DISASM_8_AND_16_RINSN(khm);
-    DISASM_8_AND_16_RINSN(khmx);
-
-    DISASM_8_AND_16_RINSN(smin);
-    DISASM_8_AND_16_RINSN(umin);
-    DISASM_8_AND_16_RINSN(smax);
-    DISASM_8_AND_16_RINSN(umax);
-    DISASM_8_AND_16_PIINSN(sclip);
-    DISASM_8_AND_16_PIINSN(uclip);
-    DEFINE_R1TYPE(kabs16);
-    DEFINE_R1TYPE(clrs16);
-    DEFINE_R1TYPE(clz16);
-    DEFINE_R1TYPE(kabs8);
-    DEFINE_R1TYPE(clrs8);
-    DEFINE_R1TYPE(clz8);
-
-    DEFINE_R1TYPE(sunpkd810);
-    DEFINE_R1TYPE(sunpkd820);
-    DEFINE_R1TYPE(sunpkd830);
-    DEFINE_R1TYPE(sunpkd831);
-    DEFINE_R1TYPE(sunpkd832);
-    DEFINE_R1TYPE(zunpkd810);
-    DEFINE_R1TYPE(zunpkd820);
-    DEFINE_R1TYPE(zunpkd830);
-    DEFINE_R1TYPE(zunpkd831);
-    DEFINE_R1TYPE(zunpkd832);
-
-    DEFINE_RTYPE(pkbb16);
-    DEFINE_RTYPE(pkbt16);
-    DEFINE_RTYPE(pktb16);
-    DEFINE_RTYPE(pktt16);
-    DISASM_RINSN_AND_ROUND(smmul);
-    DISASM_RINSN_AND_ROUND(kmmac);
-    DISASM_RINSN_AND_ROUND(kmmsb);
-    DISASM_RINSN_AND_ROUND(kwmmul);
-    DISASM_RINSN_AND_ROUND(smmwb);
-    DISASM_RINSN_AND_ROUND(smmwt);
-    DISASM_RINSN_AND_ROUND(kmmawb);
-    DISASM_RINSN_AND_ROUND(kmmawt);
-    DISASM_RINSN_AND_ROUND(kmmwb2);
-    DISASM_RINSN_AND_ROUND(kmmwt2);
-    DISASM_RINSN_AND_ROUND(kmmawb2);
-    DISASM_RINSN_AND_ROUND(kmmawt2);
-    DEFINE_RTYPE(smbb16)
-    DEFINE_RTYPE(smbt16)
-    DEFINE_RTYPE(smtt16)
-    DEFINE_RTYPE(kmda)
-    DEFINE_RTYPE(kmxda)
-    DEFINE_RTYPE(smds)
-    DEFINE_RTYPE(smdrs)
-    DEFINE_RTYPE(smxds)
-    DEFINE_RTYPE(kmabb)
-    DEFINE_RTYPE(kmabt)
-    DEFINE_RTYPE(kmatt)
-    DEFINE_RTYPE(kmada)
-    DEFINE_RTYPE(kmaxda)
-    DEFINE_RTYPE(kmads)
-    DEFINE_RTYPE(kmadrs)
-    DEFINE_RTYPE(kmaxds)
-    DEFINE_RTYPE(kmsda)
-    DEFINE_RTYPE(kmsxda)
-    DEFINE_RTYPE(sclip32)
-    DEFINE_RTYPE(uclip32)
-    DEFINE_R1TYPE(clrs32);
-    DEFINE_R1TYPE(clz32);
-    DEFINE_RTYPE(pbsad);
-    DEFINE_RTYPE(pbsada);
-    DEFINE_RTYPE(smaqa);
-    DEFINE_RTYPE(umaqa);
-    DEFINE_RTYPE(smaqa_su);
-
-    DEFINE_RTYPE(kaddh);
-    DEFINE_RTYPE(ksubh);
-    DEFINE_RTYPE(khmbb);
-    DEFINE_RTYPE(khmbt);
-    DEFINE_RTYPE(khmtt);
-    DEFINE_RTYPE(ukaddh);
-    DEFINE_RTYPE(uksubh);
-    DEFINE_RTYPE(kaddw);
-    DEFINE_RTYPE(ukaddw);
-    DEFINE_RTYPE(ksubw);
-    DEFINE_RTYPE(uksubw);
-    DEFINE_RTYPE(kdmbb);
-    DEFINE_RTYPE(kdmbt);
-    DEFINE_RTYPE(kdmtt);
-    DEFINE_RTYPE(kslraw);
-    DEFINE_RTYPE(kslraw_u);
-    DEFINE_RTYPE(ksllw);
-    DEFINE_PI5TYPE(kslliw);
-    DEFINE_RTYPE(kdmabb);
-    DEFINE_RTYPE(kdmabt);
-    DEFINE_RTYPE(kdmatt);
-    DEFINE_RTYPE(kabsw);
-    DEFINE_RTYPE(raddw);
-    DEFINE_RTYPE(uraddw);
-    DEFINE_RTYPE(rsubw);
-    DEFINE_RTYPE(ursubw);
-    DEFINE_RTYPE(msubr32);
-    DEFINE_RTYPE(ave);
-    DEFINE_RTYPE(sra_u);
-    DEFINE_PI6TYPE(srai_u);
-    DEFINE_PI3TYPE(insb);
-    DEFINE_RTYPE(maddr32)
-
-    if (isa->get_max_xlen() == 64) {
-      DEFINE_RTYPE(add32);
-      DEFINE_RTYPE(radd32);
-      DEFINE_RTYPE(uradd32);
-      DEFINE_RTYPE(kadd32);
-      DEFINE_RTYPE(ukadd32);
-      DEFINE_RTYPE(sub32);
-      DEFINE_RTYPE(rsub32);
-      DEFINE_RTYPE(ursub32);
-      DEFINE_RTYPE(ksub32);
-      DEFINE_RTYPE(uksub32);
-      DEFINE_RTYPE(cras32);
-      DEFINE_RTYPE(rcras32);
-      DEFINE_RTYPE(urcras32);
-      DEFINE_RTYPE(kcras32);
-      DEFINE_RTYPE(ukcras32);
-      DEFINE_RTYPE(crsa32);
-      DEFINE_RTYPE(rcrsa32);
-      DEFINE_RTYPE(urcrsa32);
-      DEFINE_RTYPE(kcrsa32);
-      DEFINE_RTYPE(ukcrsa32);
-      DEFINE_RTYPE(stas32);
-      DEFINE_RTYPE(rstas32);
-      DEFINE_RTYPE(urstas32);
-      DEFINE_RTYPE(kstas32);
-      DEFINE_RTYPE(ukstas32);
-      DEFINE_RTYPE(stsa32);
-      DEFINE_RTYPE(rstsa32);
-      DEFINE_RTYPE(urstsa32);
-      DEFINE_RTYPE(kstsa32);
-      DEFINE_RTYPE(ukstsa32);
-      DEFINE_RTYPE(sra32);
-      DEFINE_PI5TYPE(srai32);
-      DEFINE_RTYPE(sra32_u);
-      DEFINE_PI5TYPE(srai32_u);
-      DEFINE_RTYPE(srl32);
-      DEFINE_PI5TYPE(srli32);
-      DEFINE_RTYPE(srl32_u);
-      DEFINE_PI5TYPE(srli32_u);
-      DEFINE_RTYPE(sll32);
-      DEFINE_PI5TYPE(slli32);
-      DEFINE_RTYPE(ksll32);
-      DEFINE_PI5TYPE(kslli32);
-      DEFINE_RTYPE(kslra32);
-      DEFINE_RTYPE(kslra32_u);
-      DEFINE_RTYPE(smin32);
-      DEFINE_RTYPE(umin32);
-      DEFINE_RTYPE(smax32);
-      DEFINE_RTYPE(umax32);
-      DEFINE_R1TYPE(kabs32);
-      DEFINE_RTYPE(khmbb16);
-      DEFINE_RTYPE(khmbt16);
-      DEFINE_RTYPE(khmtt16);
-      DEFINE_RTYPE(kdmbb16);
-      DEFINE_RTYPE(kdmbt16);
-      DEFINE_RTYPE(kdmtt16);
-      DEFINE_RTYPE(kdmabb16);
-      DEFINE_RTYPE(kdmabt16);
-      DEFINE_RTYPE(kdmatt16);
-      DEFINE_RTYPE(smbt32);
-      DEFINE_RTYPE(smtt32);
-      DEFINE_RTYPE(kmabb32);
-      DEFINE_RTYPE(kmabt32);
-      DEFINE_RTYPE(kmatt32);
-      DEFINE_RTYPE(kmda32);
-      DEFINE_RTYPE(kmxda32);
-      DEFINE_RTYPE(kmaxda32);
-      DEFINE_RTYPE(kmads32);
-      DEFINE_RTYPE(kmadrs32);
-      DEFINE_RTYPE(kmaxds32);
-      DEFINE_RTYPE(kmsda32);
-      DEFINE_RTYPE(kmsxda32);
-      DEFINE_RTYPE(smds32);
-      DEFINE_RTYPE(smdrs32);
-      DEFINE_RTYPE(smxds32);
-      DEFINE_PI5TYPE(sraiw_u);
-      DEFINE_RTYPE(pkbt32);
-      DEFINE_RTYPE(pktb32);
-    }
-  }
-
   if (isa->extension_enabled(EXT_ZICBOM)) {
     DISASM_INSN("cbo.clean", cbo_clean, 0, {&base_only_address});
     DISASM_INSN("cbo.flush", cbo_flush, 0, {&base_only_address});
-- 
cgit v1.1


From c4edeabbe756b2527a63970492dfb2239953a990 Mon Sep 17 00:00:00 2001
From: Andrew Waterman <andrew@sifive.com>
Date: Wed, 1 May 2024 16:22:20 -0700
Subject: Remove P, Zbpbo, Zpn, and Zpsfoperand from ISA parser

---
 disasm/isa_parser.cc | 14 --------------
 1 file changed, 14 deletions(-)

diff --git a/disasm/isa_parser.cc b/disasm/isa_parser.cc
index 62466d0..c0869f3 100644
--- a/disasm/isa_parser.cc
+++ b/disasm/isa_parser.cc
@@ -70,10 +70,6 @@ isa_parser_t::isa_parser_t(const char* str, const char *priv)
     }
 
     switch (*p) {
-      case 'p': extension_table[EXT_ZBPBO] = true;
-                extension_table[EXT_ZPN] = true;
-                extension_table[EXT_ZPSFOPERAND] = true;
-                extension_table[EXT_ZMMUL] = true; break;
       case 'v': // even rv32iv implies double float
       case 'q': extension_table['D'] = true;
                 // Fall through
@@ -390,16 +386,6 @@ isa_parser_t::isa_parser_t(const char* str, const char *priv)
     bad_isa_string(str, "'Zabha' extension requires either the 'A' or the 'Zaamo' extension");
   }
 
-  // Zpn conflicts with Zvknha/Zvknhb in both rv32 and rv64
-  if (extension_table[EXT_ZPN] && (extension_table[EXT_ZVKNHA] || extension_table[EXT_ZVKNHB])) {
-    bad_isa_string(str, "'Zvkna' and 'Zvknhb' extensions are incompatible with 'Zpn' extension");
-  }
-  // In rv64 only, Zpn (rv64_zpn) conflicts with Zvkg/Zvkned/Zvksh
-  if (max_xlen == 64 && extension_table[EXT_ZPN] &&
-      (extension_table[EXT_ZVKG] || extension_table[EXT_ZVKNED] || extension_table[EXT_ZVKSH])) {
-    bad_isa_string(str, "'Zvkg', 'Zvkned', and 'Zvksh' extensions are incompatible with 'Zpn' extension in rv64");
-  }
-
   // When SSE is 0, Zicfiss behavior is defined by Zicmop
   if (extension_table[EXT_ZICFISS] && !extension_table[EXT_ZIMOP]) {
     bad_isa_string(str, "'Zicfiss' extension requires 'Zimop' extension");
-- 
cgit v1.1


From c9468f6e024abb6d620ace295ef6e2e58e8f7eb2 Mon Sep 17 00:00:00 2001
From: Andrew Waterman <andrew@sifive.com>
Date: Wed, 1 May 2024 16:25:46 -0700
Subject: Remove Zbpbo, Zpn, and Zpsfoperand implementation

---
 riscv/csrs.cc           |   2 -
 riscv/decode_macros.h   |  17 ++
 riscv/insn_template.h   |   1 -
 riscv/insns/add16.h     |   3 -
 riscv/insns/add32.h     |   4 -
 riscv/insns/add64.h     |   3 -
 riscv/insns/add8.h      |   3 -
 riscv/insns/ave.h       |   5 -
 riscv/insns/clo16.h     |  11 --
 riscv/insns/clo32.h     |  12 --
 riscv/insns/clo8.h      |  10 -
 riscv/insns/clrs16.h    |  12 --
 riscv/insns/clrs32.h    |  13 --
 riscv/insns/clrs8.h     |  11 --
 riscv/insns/clz.h       |   2 +-
 riscv/insns/clz16.h     |  10 -
 riscv/insns/clz32.h     |  12 --
 riscv/insns/clz8.h      |   9 -
 riscv/insns/cmix.h      |   2 -
 riscv/insns/cmpeq16.h   |   3 -
 riscv/insns/cmpeq8.h    |   3 -
 riscv/insns/cras16.h    |   5 -
 riscv/insns/cras32.h    |   6 -
 riscv/insns/crsa16.h    |   5 -
 riscv/insns/crsa32.h    |   6 -
 riscv/insns/fsr.h       |  10 -
 riscv/insns/fsri.h      |  10 -
 riscv/insns/fsrw.h      |  10 -
 riscv/insns/grevi.h     |   4 +-
 riscv/insns/insb.h      |   4 -
 riscv/insns/kabs16.h    |  10 -
 riscv/insns/kabs32.h    |  11 --
 riscv/insns/kabs8.h     |  10 -
 riscv/insns/kabsw.h     |  10 -
 riscv/insns/kadd16.h    |   6 -
 riscv/insns/kadd32.h    |   7 -
 riscv/insns/kadd64.h    |   6 -
 riscv/insns/kadd8.h     |   6 -
 riscv/insns/kaddh.h     |   5 -
 riscv/insns/kaddw.h     |   5 -
 riscv/insns/kcras16.h   |  10 -
 riscv/insns/kcras32.h   |  11 --
 riscv/insns/kcrsa16.h   |  10 -
 riscv/insns/kcrsa32.h   |  11 --
 riscv/insns/kdmabb.h    |  17 --
 riscv/insns/kdmabb16.h  |  18 --
 riscv/insns/kdmabt.h    |  17 --
 riscv/insns/kdmabt16.h  |  18 --
 riscv/insns/kdmatt.h    |  17 --
 riscv/insns/kdmatt16.h  |  18 --
 riscv/insns/kdmbb.h     |  13 --
 riscv/insns/kdmbb16.h   |  13 --
 riscv/insns/kdmbt.h     |  13 --
 riscv/insns/kdmbt16.h   |  13 --
 riscv/insns/kdmtt.h     |  13 --
 riscv/insns/kdmtt16.h   |  13 --
 riscv/insns/khm16.h     |   9 -
 riscv/insns/khm8.h      |   9 -
 riscv/insns/khmbb.h     |  13 --
 riscv/insns/khmbb16.h   |  14 --
 riscv/insns/khmbt.h     |  13 --
 riscv/insns/khmbt16.h   |  14 --
 riscv/insns/khmtt.h     |  13 --
 riscv/insns/khmtt16.h   |  14 --
 riscv/insns/khmx16.h    |   9 -
 riscv/insns/khmx8.h     |   9 -
 riscv/insns/kmabb.h     |   7 -
 riscv/insns/kmabb32.h   |   8 -
 riscv/insns/kmabt.h     |   7 -
 riscv/insns/kmabt32.h   |   8 -
 riscv/insns/kmada.h     |   4 -
 riscv/insns/kmadrs.h    |   7 -
 riscv/insns/kmadrs32.h  |  10 -
 riscv/insns/kmads.h     |   7 -
 riscv/insns/kmads32.h   |  10 -
 riscv/insns/kmar64.h    |  15 --
 riscv/insns/kmatt.h     |   7 -
 riscv/insns/kmatt32.h   |   8 -
 riscv/insns/kmaxda.h    |   4 -
 riscv/insns/kmaxda32.h  |  10 -
 riscv/insns/kmaxds.h    |   7 -
 riscv/insns/kmaxds32.h  |  10 -
 riscv/insns/kmda.h      |   4 -
 riscv/insns/kmda32.h    |  10 -
 riscv/insns/kmmac.h     |   7 -
 riscv/insns/kmmac_u.h   |   8 -
 riscv/insns/kmmawb.h    |   7 -
 riscv/insns/kmmawb2.h   |  15 --
 riscv/insns/kmmawb2_u.h |  15 --
 riscv/insns/kmmawb_u.h  |   8 -
 riscv/insns/kmmawt.h    |   7 -
 riscv/insns/kmmawt2.h   |  15 --
 riscv/insns/kmmawt2_u.h |  15 --
 riscv/insns/kmmawt_u.h  |   8 -
 riscv/insns/kmmsb.h     |   7 -
 riscv/insns/kmmsb_u.h   |   8 -
 riscv/insns/kmmwb2.h    |  10 -
 riscv/insns/kmmwb2_u.h  |  10 -
 riscv/insns/kmmwt2.h    |  10 -
 riscv/insns/kmmwt2_u.h  |  10 -
 riscv/insns/kmsda.h     |   4 -
 riscv/insns/kmsda32.h   |  10 -
 riscv/insns/kmsr64.h    |  26 ---
 riscv/insns/kmsxda.h    |   4 -
 riscv/insns/kmsxda32.h  |  10 -
 riscv/insns/kmxda.h     |   4 -
 riscv/insns/kmxda32.h   |  10 -
 riscv/insns/ksll16.h    |   6 -
 riscv/insns/ksll32.h    |   7 -
 riscv/insns/ksll8.h     |   6 -
 riscv/insns/kslli16.h   |   6 -
 riscv/insns/kslli32.h   |   7 -
 riscv/insns/kslli8.h    |   6 -
 riscv/insns/kslliw.h    |   8 -
 riscv/insns/ksllw.h     |   8 -
 riscv/insns/kslra16.h   |  12 --
 riscv/insns/kslra16_u.h |  15 --
 riscv/insns/kslra32.h   |  13 --
 riscv/insns/kslra32_u.h |  16 --
 riscv/insns/kslra8.h    |  12 --
 riscv/insns/kslra8_u.h  |  15 --
 riscv/insns/kslraw.h    |  14 --
 riscv/insns/kslraw_u.h  |  14 --
 riscv/insns/kstas16.h   |  10 -
 riscv/insns/kstas32.h   |  11 --
 riscv/insns/kstsa16.h   |  10 -
 riscv/insns/kstsa32.h   |  11 --
 riscv/insns/ksub16.h    |   6 -
 riscv/insns/ksub32.h    |   7 -
 riscv/insns/ksub64.h    |   6 -
 riscv/insns/ksub8.h     |   6 -
 riscv/insns/ksubh.h     |   5 -
 riscv/insns/ksubw.h     |   5 -
 riscv/insns/kwmmul.h    |  10 -
 riscv/insns/kwmmul_u.h  |  10 -
 riscv/insns/maddr32.h   |   5 -
 riscv/insns/max.h       |   2 +-
 riscv/insns/min.h       |   2 +-
 riscv/insns/msubr32.h   |   5 -
 riscv/insns/mulr64.h    |   3 -
 riscv/insns/mulsr64.h   |   3 -
 riscv/insns/pack.h      |   1 -
 riscv/insns/packu.h     |   4 -
 riscv/insns/pbsad.h     |   3 -
 riscv/insns/pbsada.h    |   3 -
 riscv/insns/pkbb16.h    |   2 -
 riscv/insns/pkbt16.h    |   1 -
 riscv/insns/pkbt32.h    |   2 -
 riscv/insns/pktb16.h    |   1 -
 riscv/insns/pktb32.h    |   2 -
 riscv/insns/pktt16.h    |   2 -
 riscv/insns/radd16.h    |   3 -
 riscv/insns/radd32.h    |   4 -
 riscv/insns/radd64.h    |   8 -
 riscv/insns/radd8.h     |   3 -
 riscv/insns/raddw.h     |   4 -
 riscv/insns/rcras16.h   |   5 -
 riscv/insns/rcras32.h   |   6 -
 riscv/insns/rcrsa16.h   |   5 -
 riscv/insns/rcrsa32.h   |   6 -
 riscv/insns/rstas16.h   |   5 -
 riscv/insns/rstas32.h   |   6 -
 riscv/insns/rstsa16.h   |   5 -
 riscv/insns/rstsa32.h   |   6 -
 riscv/insns/rsub16.h    |   3 -
 riscv/insns/rsub32.h    |   4 -
 riscv/insns/rsub64.h    |   8 -
 riscv/insns/rsub8.h     |   3 -
 riscv/insns/rsubw.h     |   4 -
 riscv/insns/sclip16.h   |  14 --
 riscv/insns/sclip32.h   |  14 --
 riscv/insns/sclip8.h    |  14 --
 riscv/insns/scmple16.h  |   3 -
 riscv/insns/scmple8.h   |   3 -
 riscv/insns/scmplt16.h  |   3 -
 riscv/insns/scmplt8.h   |   3 -
 riscv/insns/sll16.h     |   3 -
 riscv/insns/sll32.h     |   4 -
 riscv/insns/sll8.h      |   3 -
 riscv/insns/slli16.h    |   3 -
 riscv/insns/slli32.h    |   4 -
 riscv/insns/slli8.h     |   3 -
 riscv/insns/smal.h      |  11 --
 riscv/insns/smalbb.h    |   3 -
 riscv/insns/smalbt.h    |   3 -
 riscv/insns/smalda.h    |   3 -
 riscv/insns/smaldrs.h   |   7 -
 riscv/insns/smalds.h    |   7 -
 riscv/insns/smaltt.h    |   3 -
 riscv/insns/smalxda.h   |   4 -
 riscv/insns/smalxds.h   |   4 -
 riscv/insns/smaqa.h     |   3 -
 riscv/insns/smaqa_su.h  |   3 -
 riscv/insns/smar64.h    |   3 -
 riscv/insns/smax16.h    |   3 -
 riscv/insns/smax32.h    |   3 -
 riscv/insns/smax8.h     |   3 -
 riscv/insns/smbb16.h    |   3 -
 riscv/insns/smbt16.h    |   3 -
 riscv/insns/smbt32.h    |   3 -
 riscv/insns/smdrs.h     |   6 -
 riscv/insns/smdrs32.h   |   7 -
 riscv/insns/smds.h      |   6 -
 riscv/insns/smds32.h    |   7 -
 riscv/insns/smin16.h    |   3 -
 riscv/insns/smin32.h    |   3 -
 riscv/insns/smin8.h     |   3 -
 riscv/insns/smmul.h     |   4 -
 riscv/insns/smmul_u.h   |   4 -
 riscv/insns/smmwb.h     |   4 -
 riscv/insns/smmwb_u.h   |   4 -
 riscv/insns/smmwt.h     |   4 -
 riscv/insns/smmwt_u.h   |   4 -
 riscv/insns/smslda.h    |   3 -
 riscv/insns/smslxda.h   |   4 -
 riscv/insns/smsr64.h    |   3 -
 riscv/insns/smtt16.h    |   3 -
 riscv/insns/smtt32.h    |   3 -
 riscv/insns/smul16.h    |   3 -
 riscv/insns/smul8.h     |   3 -
 riscv/insns/smulx16.h   |   3 -
 riscv/insns/smulx8.h    |   3 -
 riscv/insns/smxds.h     |   6 -
 riscv/insns/smxds32.h   |   7 -
 riscv/insns/sra16.h     |   3 -
 riscv/insns/sra16_u.h   |   6 -
 riscv/insns/sra32.h     |   4 -
 riscv/insns/sra32_u.h   |   7 -
 riscv/insns/sra8.h      |   3 -
 riscv/insns/sra8_u.h    |   6 -
 riscv/insns/sra_u.h     |   9 -
 riscv/insns/srai16.h    |   3 -
 riscv/insns/srai16_u.h  |   6 -
 riscv/insns/srai32.h    |   4 -
 riscv/insns/srai32_u.h  |   7 -
 riscv/insns/srai8.h     |   3 -
 riscv/insns/srai8_u.h   |   6 -
 riscv/insns/srai_u.h    |  10 -
 riscv/insns/sraiw_u.h   |   9 -
 riscv/insns/srl16.h     |   3 -
 riscv/insns/srl16_u.h   |   7 -
 riscv/insns/srl32.h     |   4 -
 riscv/insns/srl32_u.h   |   8 -
 riscv/insns/srl8.h      |   3 -
 riscv/insns/srl8_u.h    |   7 -
 riscv/insns/srli16.h    |   3 -
 riscv/insns/srli16_u.h  |   7 -
 riscv/insns/srli32.h    |   4 -
 riscv/insns/srli32_u.h  |   8 -
 riscv/insns/srli8.h     |   3 -
 riscv/insns/srli8_u.h   |   7 -
 riscv/insns/stas16.h    |   5 -
 riscv/insns/stas32.h    |   6 -
 riscv/insns/stsa16.h    |   5 -
 riscv/insns/stsa32.h    |   6 -
 riscv/insns/sub16.h     |   3 -
 riscv/insns/sub32.h     |   4 -
 riscv/insns/sub64.h     |   3 -
 riscv/insns/sub8.h      |   3 -
 riscv/insns/sunpkd810.h |   1 -
 riscv/insns/sunpkd820.h |   1 -
 riscv/insns/sunpkd830.h |   1 -
 riscv/insns/sunpkd831.h |   1 -
 riscv/insns/sunpkd832.h |   1 -
 riscv/insns/uclip16.h   |  13 --
 riscv/insns/uclip32.h   |  13 --
 riscv/insns/uclip8.h    |  13 --
 riscv/insns/ucmple16.h  |   3 -
 riscv/insns/ucmple8.h   |   3 -
 riscv/insns/ucmplt16.h  |   3 -
 riscv/insns/ucmplt8.h   |   3 -
 riscv/insns/ukadd16.h   |   6 -
 riscv/insns/ukadd32.h   |   7 -
 riscv/insns/ukadd64.h   |   6 -
 riscv/insns/ukadd8.h    |   6 -
 riscv/insns/ukaddh.h    |   5 -
 riscv/insns/ukaddw.h    |   5 -
 riscv/insns/ukcras16.h  |  10 -
 riscv/insns/ukcras32.h  |  11 --
 riscv/insns/ukcrsa16.h  |  10 -
 riscv/insns/ukcrsa32.h  |  11 --
 riscv/insns/ukmar64.h   |   6 -
 riscv/insns/ukmsr64.h   |   6 -
 riscv/insns/ukstas16.h  |  10 -
 riscv/insns/ukstas32.h  |  11 --
 riscv/insns/ukstsa16.h  |  10 -
 riscv/insns/ukstsa32.h  |  11 --
 riscv/insns/uksub16.h   |   6 -
 riscv/insns/uksub32.h   |   7 -
 riscv/insns/uksub64.h   |   6 -
 riscv/insns/uksub8.h    |   6 -
 riscv/insns/uksubh.h    |   5 -
 riscv/insns/uksubw.h    |   5 -
 riscv/insns/umaqa.h     |   3 -
 riscv/insns/umar64.h    |   3 -
 riscv/insns/umax16.h    |   3 -
 riscv/insns/umax32.h    |   4 -
 riscv/insns/umax8.h     |   3 -
 riscv/insns/umin16.h    |   3 -
 riscv/insns/umin32.h    |   4 -
 riscv/insns/umin8.h     |   3 -
 riscv/insns/umsr64.h    |   3 -
 riscv/insns/umul16.h    |   3 -
 riscv/insns/umul8.h     |   3 -
 riscv/insns/umulx16.h   |   3 -
 riscv/insns/umulx8.h    |   3 -
 riscv/insns/uradd16.h   |   3 -
 riscv/insns/uradd32.h   |   4 -
 riscv/insns/uradd64.h   |   9 -
 riscv/insns/uradd8.h    |   3 -
 riscv/insns/uraddw.h    |   4 -
 riscv/insns/urcras16.h  |   5 -
 riscv/insns/urcras32.h  |   6 -
 riscv/insns/urcrsa16.h  |   5 -
 riscv/insns/urcrsa32.h  |   6 -
 riscv/insns/urstas16.h  |   5 -
 riscv/insns/urstas32.h  |   6 -
 riscv/insns/urstsa16.h  |   5 -
 riscv/insns/urstsa32.h  |   6 -
 riscv/insns/ursub16.h   |   3 -
 riscv/insns/ursub32.h   |   4 -
 riscv/insns/ursub64.h   |   9 -
 riscv/insns/ursub8.h    |   3 -
 riscv/insns/ursubw.h    |   4 -
 riscv/insns/zunpkd810.h |   1 -
 riscv/insns/zunpkd820.h |   1 -
 riscv/insns/zunpkd830.h |   1 -
 riscv/insns/zunpkd831.h |   1 -
 riscv/insns/zunpkd832.h |   1 -
 riscv/isa_parser.h      |  11 --
 riscv/overlap_list.h    |   4 -
 riscv/p_ext_macros.h    | 506 ------------------------------------------------
 riscv/riscv.mk.in       | 336 --------------------------------
 riscv/v_ext_macros.h    |   3 +
 334 files changed, 24 insertions(+), 3013 deletions(-)
 delete mode 100644 riscv/insns/add16.h
 delete mode 100644 riscv/insns/add32.h
 delete mode 100644 riscv/insns/add64.h
 delete mode 100644 riscv/insns/add8.h
 delete mode 100644 riscv/insns/ave.h
 delete mode 100644 riscv/insns/clo16.h
 delete mode 100644 riscv/insns/clo32.h
 delete mode 100644 riscv/insns/clo8.h
 delete mode 100644 riscv/insns/clrs16.h
 delete mode 100644 riscv/insns/clrs32.h
 delete mode 100644 riscv/insns/clrs8.h
 delete mode 100644 riscv/insns/clz16.h
 delete mode 100644 riscv/insns/clz32.h
 delete mode 100644 riscv/insns/clz8.h
 delete mode 100644 riscv/insns/cmix.h
 delete mode 100644 riscv/insns/cmpeq16.h
 delete mode 100644 riscv/insns/cmpeq8.h
 delete mode 100644 riscv/insns/cras16.h
 delete mode 100644 riscv/insns/cras32.h
 delete mode 100644 riscv/insns/crsa16.h
 delete mode 100644 riscv/insns/crsa32.h
 delete mode 100644 riscv/insns/fsr.h
 delete mode 100644 riscv/insns/fsri.h
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 delete mode 100644 riscv/insns/insb.h
 delete mode 100644 riscv/insns/kabs16.h
 delete mode 100644 riscv/insns/kabs32.h
 delete mode 100644 riscv/insns/kabs8.h
 delete mode 100644 riscv/insns/kabsw.h
 delete mode 100644 riscv/insns/kadd16.h
 delete mode 100644 riscv/insns/kadd32.h
 delete mode 100644 riscv/insns/kadd64.h
 delete mode 100644 riscv/insns/kadd8.h
 delete mode 100644 riscv/insns/kaddh.h
 delete mode 100644 riscv/insns/kaddw.h
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 delete mode 100644 riscv/insns/kcras32.h
 delete mode 100644 riscv/insns/kcrsa16.h
 delete mode 100644 riscv/insns/kcrsa32.h
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 delete mode 100644 riscv/insns/kdmabt.h
 delete mode 100644 riscv/insns/kdmabt16.h
 delete mode 100644 riscv/insns/kdmatt.h
 delete mode 100644 riscv/insns/kdmatt16.h
 delete mode 100644 riscv/insns/kdmbb.h
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 delete mode 100644 riscv/insns/kdmbt.h
 delete mode 100644 riscv/insns/kdmbt16.h
 delete mode 100644 riscv/insns/kdmtt.h
 delete mode 100644 riscv/insns/kdmtt16.h
 delete mode 100644 riscv/insns/khm16.h
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 delete mode 100644 riscv/insns/khmbb.h
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 delete mode 100644 riscv/insns/khmtt.h
 delete mode 100644 riscv/insns/khmtt16.h
 delete mode 100644 riscv/insns/khmx16.h
 delete mode 100644 riscv/insns/khmx8.h
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 delete mode 100644 riscv/insns/kmabb32.h
 delete mode 100644 riscv/insns/kmabt.h
 delete mode 100644 riscv/insns/kmabt32.h
 delete mode 100644 riscv/insns/kmada.h
 delete mode 100644 riscv/insns/kmadrs.h
 delete mode 100644 riscv/insns/kmadrs32.h
 delete mode 100644 riscv/insns/kmads.h
 delete mode 100644 riscv/insns/kmads32.h
 delete mode 100644 riscv/insns/kmar64.h
 delete mode 100644 riscv/insns/kmatt.h
 delete mode 100644 riscv/insns/kmatt32.h
 delete mode 100644 riscv/insns/kmaxda.h
 delete mode 100644 riscv/insns/kmaxda32.h
 delete mode 100644 riscv/insns/kmaxds.h
 delete mode 100644 riscv/insns/kmaxds32.h
 delete mode 100644 riscv/insns/kmda.h
 delete mode 100644 riscv/insns/kmda32.h
 delete mode 100644 riscv/insns/kmmac.h
 delete mode 100644 riscv/insns/kmmac_u.h
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 delete mode 100644 riscv/insns/kmmawb2.h
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 delete mode 100644 riscv/insns/kmmawb_u.h
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 delete mode 100644 riscv/insns/kmmawt2_u.h
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 delete mode 100644 riscv/insns/kmmwb2.h
 delete mode 100644 riscv/insns/kmmwb2_u.h
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 delete mode 100644 riscv/insns/kmsda.h
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 delete mode 100644 riscv/insns/kmsr64.h
 delete mode 100644 riscv/insns/kmsxda.h
 delete mode 100644 riscv/insns/kmsxda32.h
 delete mode 100644 riscv/insns/kmxda.h
 delete mode 100644 riscv/insns/kmxda32.h
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 delete mode 100644 riscv/insns/ksll32.h
 delete mode 100644 riscv/insns/ksll8.h
 delete mode 100644 riscv/insns/kslli16.h
 delete mode 100644 riscv/insns/kslli32.h
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 delete mode 100644 riscv/insns/kslra16.h
 delete mode 100644 riscv/insns/kslra16_u.h
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 delete mode 100644 riscv/insns/ksub64.h
 delete mode 100644 riscv/insns/ksub8.h
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 delete mode 100644 riscv/insns/kwmmul.h
 delete mode 100644 riscv/insns/kwmmul_u.h
 delete mode 100644 riscv/insns/maddr32.h
 delete mode 100644 riscv/insns/msubr32.h
 delete mode 100644 riscv/insns/mulr64.h
 delete mode 100644 riscv/insns/mulsr64.h
 delete mode 100644 riscv/insns/packu.h
 delete mode 100644 riscv/insns/pbsad.h
 delete mode 100644 riscv/insns/pbsada.h
 delete mode 100644 riscv/insns/pkbb16.h
 delete mode 100644 riscv/insns/pkbt16.h
 delete mode 100644 riscv/insns/pkbt32.h
 delete mode 100644 riscv/insns/pktb16.h
 delete mode 100644 riscv/insns/pktb32.h
 delete mode 100644 riscv/insns/pktt16.h
 delete mode 100644 riscv/insns/radd16.h
 delete mode 100644 riscv/insns/radd32.h
 delete mode 100644 riscv/insns/radd64.h
 delete mode 100644 riscv/insns/radd8.h
 delete mode 100644 riscv/insns/raddw.h
 delete mode 100644 riscv/insns/rcras16.h
 delete mode 100644 riscv/insns/rcras32.h
 delete mode 100644 riscv/insns/rcrsa16.h
 delete mode 100644 riscv/insns/rcrsa32.h
 delete mode 100644 riscv/insns/rstas16.h
 delete mode 100644 riscv/insns/rstas32.h
 delete mode 100644 riscv/insns/rstsa16.h
 delete mode 100644 riscv/insns/rstsa32.h
 delete mode 100644 riscv/insns/rsub16.h
 delete mode 100644 riscv/insns/rsub32.h
 delete mode 100644 riscv/insns/rsub64.h
 delete mode 100644 riscv/insns/rsub8.h
 delete mode 100644 riscv/insns/rsubw.h
 delete mode 100644 riscv/insns/sclip16.h
 delete mode 100644 riscv/insns/sclip32.h
 delete mode 100644 riscv/insns/sclip8.h
 delete mode 100644 riscv/insns/scmple16.h
 delete mode 100644 riscv/insns/scmple8.h
 delete mode 100644 riscv/insns/scmplt16.h
 delete mode 100644 riscv/insns/scmplt8.h
 delete mode 100644 riscv/insns/sll16.h
 delete mode 100644 riscv/insns/sll32.h
 delete mode 100644 riscv/insns/sll8.h
 delete mode 100644 riscv/insns/slli16.h
 delete mode 100644 riscv/insns/slli32.h
 delete mode 100644 riscv/insns/slli8.h
 delete mode 100644 riscv/insns/smal.h
 delete mode 100644 riscv/insns/smalbb.h
 delete mode 100644 riscv/insns/smalbt.h
 delete mode 100644 riscv/insns/smalda.h
 delete mode 100644 riscv/insns/smaldrs.h
 delete mode 100644 riscv/insns/smalds.h
 delete mode 100644 riscv/insns/smaltt.h
 delete mode 100644 riscv/insns/smalxda.h
 delete mode 100644 riscv/insns/smalxds.h
 delete mode 100644 riscv/insns/smaqa.h
 delete mode 100644 riscv/insns/smaqa_su.h
 delete mode 100644 riscv/insns/smar64.h
 delete mode 100644 riscv/insns/smax16.h
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 delete mode 100644 riscv/insns/smax8.h
 delete mode 100644 riscv/insns/smbb16.h
 delete mode 100644 riscv/insns/smbt16.h
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 delete mode 100644 riscv/insns/smdrs.h
 delete mode 100644 riscv/insns/smdrs32.h
 delete mode 100644 riscv/insns/smds.h
 delete mode 100644 riscv/insns/smds32.h
 delete mode 100644 riscv/insns/smin16.h
 delete mode 100644 riscv/insns/smin32.h
 delete mode 100644 riscv/insns/smin8.h
 delete mode 100644 riscv/insns/smmul.h
 delete mode 100644 riscv/insns/smmul_u.h
 delete mode 100644 riscv/insns/smmwb.h
 delete mode 100644 riscv/insns/smmwb_u.h
 delete mode 100644 riscv/insns/smmwt.h
 delete mode 100644 riscv/insns/smmwt_u.h
 delete mode 100644 riscv/insns/smslda.h
 delete mode 100644 riscv/insns/smslxda.h
 delete mode 100644 riscv/insns/smsr64.h
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 delete mode 100644 riscv/insns/ucmplt16.h
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 delete mode 100644 riscv/insns/ursub64.h
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 delete mode 100644 riscv/insns/ursubw.h
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 delete mode 100644 riscv/p_ext_macros.h

diff --git a/riscv/csrs.cc b/riscv/csrs.cc
index b4c6b6a..95638d3 100644
--- a/riscv/csrs.cc
+++ b/riscv/csrs.cc
@@ -1452,8 +1452,6 @@ vxsat_csr_t::vxsat_csr_t(processor_t* const proc, const reg_t addr):
 
 void vxsat_csr_t::verify_permissions(insn_t insn, bool write) const {
   require_vector_vs;
-  if (!proc->extension_enabled('V') && !proc->extension_enabled(EXT_ZPN))
-    throw trap_illegal_instruction(insn.bits());
   masked_csr_t::verify_permissions(insn, write);
 }
 
diff --git a/riscv/decode_macros.h b/riscv/decode_macros.h
index 4050000..bd871fa 100644
--- a/riscv/decode_macros.h
+++ b/riscv/decode_macros.h
@@ -60,6 +60,23 @@
 #define SP READ_REG(X_SP)
 #define RA READ_REG(X_RA)
 
+// Zdinx macros
+#define READ_REG_PAIR(reg) ({ \
+  require((reg) % 2 == 0); \
+  (reg) == 0 ? reg_t(0) : \
+  (READ_REG((reg) + 1) << 32) + zext32(READ_REG(reg)); })
+
+#define RS1_PAIR READ_REG_PAIR(insn.rs1())
+#define RS2_PAIR READ_REG_PAIR(insn.rs2())
+#define RD_PAIR READ_REG_PAIR(insn.rd())
+
+#define WRITE_RD_PAIR(value) \
+  if (insn.rd() != 0) { \
+    require(insn.rd() % 2 == 0); \
+    WRITE_REG(insn.rd(), sext32(value)); \
+    WRITE_REG(insn.rd() + 1, (sreg_t(value)) >> 32); \
+  }
+
 // FPU macros
 #define READ_ZDINX_REG(reg) (xlen == 32 ? f64(READ_REG_PAIR(reg)) : f64(STATE.XPR[reg] & (uint64_t)-1))
 #define READ_FREG_H(reg) (p->extension_enabled(EXT_ZFINX) ? f16(STATE.XPR[reg] & (uint16_t)-1) : f16(READ_FREG(reg)))
diff --git a/riscv/insn_template.h b/riscv/insn_template.h
index cead6d7..88a41c2 100644
--- a/riscv/insn_template.h
+++ b/riscv/insn_template.h
@@ -7,6 +7,5 @@
 #include "internals.h"
 #include "specialize.h"
 #include "tracer.h"
-#include "p_ext_macros.h"
 #include "v_ext_macros.h"
 #include <assert.h>
diff --git a/riscv/insns/add16.h b/riscv/insns/add16.h
deleted file mode 100644
index fae4316..0000000
--- a/riscv/insns/add16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_LOOP(16, {
-  pd = ps1 + ps2;
-})
diff --git a/riscv/insns/add32.h b/riscv/insns/add32.h
deleted file mode 100644
index ca544ce..0000000
--- a/riscv/insns/add32.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_rv64;
-P_LOOP(32, {
-  pd = ps1 + ps2;
-})
diff --git a/riscv/insns/add64.h b/riscv/insns/add64.h
deleted file mode 100644
index 0968656..0000000
--- a/riscv/insns/add64.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_64_PROFILE({
-  rd = rs1 + rs2;
-})
diff --git a/riscv/insns/add8.h b/riscv/insns/add8.h
deleted file mode 100644
index bb54a7b..0000000
--- a/riscv/insns/add8.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_LOOP(8, {
-  pd = ps1 + ps2;
-})
diff --git a/riscv/insns/ave.h b/riscv/insns/ave.h
deleted file mode 100644
index 5997900..0000000
--- a/riscv/insns/ave.h
+++ /dev/null
@@ -1,5 +0,0 @@
-require_extension(EXT_ZPN);
-sreg_t rs1 = RS1;
-sreg_t rs2 = RS2;
-sreg_t carry = (rs1 & 1) | (rs2 & 1);
-WRITE_RD(sext_xlen((rs1 >> 1) + (rs2 >> 1) + carry));
diff --git a/riscv/insns/clo16.h b/riscv/insns/clo16.h
deleted file mode 100644
index 9da6599..0000000
--- a/riscv/insns/clo16.h
+++ /dev/null
@@ -1,11 +0,0 @@
-P_ONE_LOOP(16, {
-  pd = 0;
-  ps1 = ~ps1;
-  if (!ps1) pd = 16;
-  else {
-    if ((ps1 & 0xFF00) == 0) { pd += 8; ps1 <<= 8; }
-    if ((ps1 & 0xF000) == 0) { pd += 4; ps1 <<= 4; }
-    if ((ps1 & 0xC000) == 0) { pd += 2; ps1 <<= 2; }
-    if ((ps1 & 0x8000) == 0) { pd += 1; }
-  }
-})
diff --git a/riscv/insns/clo32.h b/riscv/insns/clo32.h
deleted file mode 100644
index 431bb0e..0000000
--- a/riscv/insns/clo32.h
+++ /dev/null
@@ -1,12 +0,0 @@
-P_ONE_LOOP(32, {
-  pd = 0;
-  ps1 = ~ps1;
-  if (!ps1) pd = 32;
-  else {
-    if ((ps1 & 0xFFFF0000) == 0) { pd += 16; ps1 <<= 16; }
-    if ((ps1 & 0xFF000000) == 0) { pd += 8; ps1 <<= 8; }
-    if ((ps1 & 0xF0000000) == 0) { pd += 4; ps1 <<= 4; }
-    if ((ps1 & 0xC0000000) == 0) { pd += 2; ps1 <<= 2; }
-    if ((ps1 & 0x80000000) == 0) { pd += 1; }
-  }
-})
diff --git a/riscv/insns/clo8.h b/riscv/insns/clo8.h
deleted file mode 100644
index 2581ade..0000000
--- a/riscv/insns/clo8.h
+++ /dev/null
@@ -1,10 +0,0 @@
-P_ONE_LOOP(8, {
-  pd = 0;
-  ps1 = ~ps1;
-  if (!ps1) pd = 8;
-  else {
-    if ((ps1 & 0xF0) == 0) { pd += 4; ps1 <<= 4; }
-    if ((ps1 & 0xC0) == 0) { pd += 2; ps1 <<= 2; }
-    if ((ps1 & 0x80) == 0) { pd += 1; }
-  }
-})
diff --git a/riscv/insns/clrs16.h b/riscv/insns/clrs16.h
deleted file mode 100644
index 6541262..0000000
--- a/riscv/insns/clrs16.h
+++ /dev/null
@@ -1,12 +0,0 @@
-P_ONE_LOOP(16, {
-  pd = 0;
-  if (ps1 < 0) ps1 = ~ps1;
-  if (!ps1) pd = 16;
-  else {
-    if ((ps1 & 0xFF00) == 0) { pd += 8; ps1 <<= 8; }
-    if ((ps1 & 0xF000) == 0) { pd += 4; ps1 <<= 4; }
-    if ((ps1 & 0xC000) == 0) { pd += 2; ps1 <<= 2; }
-    if ((ps1 & 0x8000) == 0) { pd += 1; }
-  }
-  pd -= 1;
-})
diff --git a/riscv/insns/clrs32.h b/riscv/insns/clrs32.h
deleted file mode 100644
index c75db18..0000000
--- a/riscv/insns/clrs32.h
+++ /dev/null
@@ -1,13 +0,0 @@
-P_ONE_LOOP(32, {
-  pd = 0;
-  if (ps1 < 0) ps1 = ~ps1;
-  if (!ps1) pd = 32;
-  else {
-    if ((ps1 & 0xFFFF0000) == 0) { pd += 16; ps1 <<= 16; }
-    if ((ps1 & 0xFF000000) == 0) { pd += 8; ps1 <<= 8; }
-    if ((ps1 & 0xF0000000) == 0) { pd += 4; ps1 <<= 4; }
-    if ((ps1 & 0xC0000000) == 0) { pd += 2; ps1 <<= 2; }
-    if ((ps1 & 0x80000000) == 0) { pd += 1; }
-  }
-  pd -= 1;
-})
diff --git a/riscv/insns/clrs8.h b/riscv/insns/clrs8.h
deleted file mode 100644
index f6f8298..0000000
--- a/riscv/insns/clrs8.h
+++ /dev/null
@@ -1,11 +0,0 @@
-P_ONE_LOOP(8, {
-  pd = 0;
-  if (ps1 < 0) ps1 = ~ps1;
-  if (!ps1) pd = 8;
-  else {
-    if ((ps1 & 0xF0) == 0) { pd += 4; ps1 <<= 4; }
-    if ((ps1 & 0xC0) == 0) { pd += 2; ps1 <<= 2; }
-    if ((ps1 & 0x80) == 0) { pd += 1; }
-  }
-  pd -= 1;
-})
diff --git a/riscv/insns/clz.h b/riscv/insns/clz.h
index e10e4d2..d334e40 100644
--- a/riscv/insns/clz.h
+++ b/riscv/insns/clz.h
@@ -1,4 +1,4 @@
-require_either_extension(xlen == 32 ? EXT_ZBPBO : EXT_ZBB, EXT_ZBB);
+require_extension(EXT_ZBB);
 reg_t x = xlen;
 for (int i = 0; i < xlen; i++)
   if (1 & (RS1 >> (xlen-i-1))) { x = i; break; }
diff --git a/riscv/insns/clz16.h b/riscv/insns/clz16.h
deleted file mode 100644
index a129d59..0000000
--- a/riscv/insns/clz16.h
+++ /dev/null
@@ -1,10 +0,0 @@
-P_ONE_LOOP(16, {
-  pd = 0;
-  if (ps1 == 0) pd = 16;
-  else {
-    if ((ps1 & 0xFF00) == 0) { pd += 8; ps1 <<= 8; }
-    if ((ps1 & 0xF000) == 0) { pd += 4; ps1 <<= 4; }
-    if ((ps1 & 0xC000) == 0) { pd += 2; ps1 <<= 2; }
-    if ((ps1 & 0x8000) == 0) { pd += 1; }
-  }
-})
diff --git a/riscv/insns/clz32.h b/riscv/insns/clz32.h
deleted file mode 100644
index a38dda7..0000000
--- a/riscv/insns/clz32.h
+++ /dev/null
@@ -1,12 +0,0 @@
-require_rv64;
-P_ONE_LOOP(32, {
-  pd = 0;
-  if (ps1 == 0) pd = 32;
-  else {
-    if ((ps1 & 0xFFFF0000) == 0) { pd += 16; ps1 <<= 16; }
-    if ((ps1 & 0xFF000000) == 0) { pd += 8; ps1 <<= 8; }
-    if ((ps1 & 0xF0000000) == 0) { pd += 4; ps1 <<= 4; }
-    if ((ps1 & 0xC0000000) == 0) { pd += 2; ps1 <<= 2; }
-    if ((ps1 & 0x80000000) == 0) { pd += 1; }
-  }
-})
diff --git a/riscv/insns/clz8.h b/riscv/insns/clz8.h
deleted file mode 100644
index 78ff6b7..0000000
--- a/riscv/insns/clz8.h
+++ /dev/null
@@ -1,9 +0,0 @@
-P_ONE_LOOP(8, {
-  pd = 0;
-  if (ps1 == 0) pd = 8;
-  else {
-    if ((ps1 & 0xF0) == 0) { pd += 4; ps1 <<= 4; }
-    if ((ps1 & 0xC0) == 0) { pd += 2; ps1 <<= 2; }
-    if ((ps1 & 0x80) == 0) { pd += 1; }
-  }
-})
diff --git a/riscv/insns/cmix.h b/riscv/insns/cmix.h
deleted file mode 100644
index f3b7977..0000000
--- a/riscv/insns/cmix.h
+++ /dev/null
@@ -1,2 +0,0 @@
-require_extension(EXT_ZBPBO);
-WRITE_RD((RS1 & RS2) | (RS3 & ~RS2));
diff --git a/riscv/insns/cmpeq16.h b/riscv/insns/cmpeq16.h
deleted file mode 100644
index 4fb6faa..0000000
--- a/riscv/insns/cmpeq16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_LOOP(16, {
-  pd = (ps1 == ps2) ? -1 : 0;
-})
diff --git a/riscv/insns/cmpeq8.h b/riscv/insns/cmpeq8.h
deleted file mode 100644
index fba1bf6..0000000
--- a/riscv/insns/cmpeq8.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_LOOP(8, {
-  pd = (ps1 == ps2) ? -1 : 0;
-})
diff --git a/riscv/insns/cras16.h b/riscv/insns/cras16.h
deleted file mode 100644
index 6717e09..0000000
--- a/riscv/insns/cras16.h
+++ /dev/null
@@ -1,5 +0,0 @@
-P_CROSS_LOOP(16, {
-  pd = ps1 + ps2;
-}, {
-  pd = ps1 - ps2;
-})
diff --git a/riscv/insns/cras32.h b/riscv/insns/cras32.h
deleted file mode 100644
index 8f53e98..0000000
--- a/riscv/insns/cras32.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_rv64;
-P_CROSS_LOOP(32, {
-  pd = ps1 + ps2;
-}, {
-  pd = ps1 - ps2;
-})
diff --git a/riscv/insns/crsa16.h b/riscv/insns/crsa16.h
deleted file mode 100644
index 2c1997a..0000000
--- a/riscv/insns/crsa16.h
+++ /dev/null
@@ -1,5 +0,0 @@
-P_CROSS_LOOP(16, {
-  pd = ps1 - ps2;
-}, {
-  pd = ps1 + ps2;
-})
diff --git a/riscv/insns/crsa32.h b/riscv/insns/crsa32.h
deleted file mode 100644
index 4290e9e..0000000
--- a/riscv/insns/crsa32.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_rv64;
-P_CROSS_LOOP(32, {
-  pd = (int64_t)ps1 - ps2;
-}, {
-  pd = (int64_t)ps1 + ps2;
-})
diff --git a/riscv/insns/fsr.h b/riscv/insns/fsr.h
deleted file mode 100644
index d94f922..0000000
--- a/riscv/insns/fsr.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_rv32;
-require_extension(EXT_ZBPBO);
-int shamt = RS2 & (2*xlen-1);
-reg_t a = RS1, b = RS3;
-if (shamt >= xlen) {
-	a = RS3, b = RS1;
-	shamt -= xlen;
-}
-int rshamt = -shamt & (xlen-1);
-WRITE_RD(sext_xlen(shamt ? (b << rshamt) | (zext_xlen(a) >> shamt) : a));
diff --git a/riscv/insns/fsri.h b/riscv/insns/fsri.h
deleted file mode 100644
index ced2364..0000000
--- a/riscv/insns/fsri.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_rv32;
-require_extension(EXT_ZBPBO);
-int shamt = SHAMT & (2*xlen-1);
-reg_t a = RS1, b = RS3;
-if (shamt >= xlen) {
-	a = RS3, b = RS1;
-	shamt -= xlen;
-}
-int rshamt = -shamt & (xlen-1);
-WRITE_RD(sext_xlen(shamt ? (b << rshamt) | (zext_xlen(a) >> shamt) : a));
diff --git a/riscv/insns/fsrw.h b/riscv/insns/fsrw.h
deleted file mode 100644
index 9471e36..0000000
--- a/riscv/insns/fsrw.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_rv64;
-require_extension(EXT_ZBPBO);
-int shamt = RS2 & 63;
-reg_t a = RS1, b = RS3;
-if (shamt >= 32) {
-	a = RS3, b = RS1;
-	shamt -= 32;
-}
-int rshamt = -shamt & 31;
-WRITE_RD(sext32(shamt ? (b << rshamt) | (zext32(a) >> shamt) : a));
diff --git a/riscv/insns/grevi.h b/riscv/insns/grevi.h
index c37f59b..a274cdd 100644
--- a/riscv/insns/grevi.h
+++ b/riscv/insns/grevi.h
@@ -2,9 +2,7 @@
 // Zbkb contains rev8 and brev8 (a.k.a. rev.b) but not general grevi
 int shamt = SHAMT;
 require(((shamt == xlen - 8) && (p->extension_enabled(EXT_ZBB) || p->extension_enabled(EXT_ZBKB))) //rev8
-  || ((shamt == 7) && p->extension_enabled(EXT_ZBKB)) // rev8.b
-  || ((shamt == 8) && p->extension_enabled(EXT_ZPN)) // rev8.h
-  || ((shamt == xlen - 1) && p->extension_enabled(EXT_ZPN)));
+  || ((shamt == 7) && p->extension_enabled(EXT_ZBKB))); // rev8.b
 require(shamt < xlen);
 reg_t x = RS1;
 if (shamt &  1) x = ((x & 0x5555555555555555LL) <<  1) | ((x & 0xAAAAAAAAAAAAAAAALL) >>  1);
diff --git a/riscv/insns/insb.h b/riscv/insns/insb.h
deleted file mode 100644
index 020e905..0000000
--- a/riscv/insns/insb.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_extension(EXT_ZPN);
-reg_t bpos = insn.p_imm3();
-require(bpos < (unsigned long)xlen/8); // imm[2] == 1 is illegal on rv32
-WRITE_RD(sext_xlen(set_field(RD, make_mask64(bpos * 8, 8), P_B(RS1, 0))));
diff --git a/riscv/insns/kabs16.h b/riscv/insns/kabs16.h
deleted file mode 100644
index 8d1d9b8..0000000
--- a/riscv/insns/kabs16.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_vector_vs;
-P_ONE_LOOP(16, {
-  pd = ps1;
-  if (ps1 == INT16_MIN) {
-    pd = INT16_MAX;
-    P_SET_OV(1);
-  } else if (ps1 < 0) {
-    pd = - ps1;
-  }
-})
diff --git a/riscv/insns/kabs32.h b/riscv/insns/kabs32.h
deleted file mode 100644
index 0536aac..0000000
--- a/riscv/insns/kabs32.h
+++ /dev/null
@@ -1,11 +0,0 @@
-require_vector_vs;
-require_rv64;
-P_ONE_LOOP(32, {
-  pd = ps1;
-  if (ps1 == INT32_MIN) {
-    pd = INT32_MAX;
-    P_SET_OV(1);
-  } else if (ps1 < 0) {
-    pd = - ps1;
-  }
-})
diff --git a/riscv/insns/kabs8.h b/riscv/insns/kabs8.h
deleted file mode 100644
index 2e6e1f1..0000000
--- a/riscv/insns/kabs8.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_vector_vs;
-P_ONE_LOOP(8, {
-  pd = ps1;
-  if (ps1 == INT8_MIN) {
-    pd = INT8_MAX;
-    P_SET_OV(1);
-  } else if (ps1 < 0) {
-    pd = - ps1;
-  }
-})
diff --git a/riscv/insns/kabsw.h b/riscv/insns/kabsw.h
deleted file mode 100644
index 5e83b75..0000000
--- a/riscv/insns/kabsw.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_vector_vs;
-require_extension(EXT_ZPN);
-int32_t rs1 = P_W(RS1, 0);
-
-if (rs1 == INT32_MIN) {
-  rs1 = INT32_MAX;
-  P_SET_OV(1);
-}
-
-WRITE_RD(sext_xlen(rs1 >= 0 ? rs1 : -rs1));
diff --git a/riscv/insns/kadd16.h b/riscv/insns/kadd16.h
deleted file mode 100644
index b6defe1..0000000
--- a/riscv/insns/kadd16.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_vector_vs;
-P_LOOP(16, {
-  bool sat = false;
-  pd = (sat_add<int16_t, uint16_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kadd32.h b/riscv/insns/kadd32.h
deleted file mode 100644
index 1728847..0000000
--- a/riscv/insns/kadd32.h
+++ /dev/null
@@ -1,7 +0,0 @@
-require_vector_vs;
-require_rv64;
-P_LOOP(32, {
-  bool sat = false;
-  pd = (sat_add<int32_t, uint32_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kadd64.h b/riscv/insns/kadd64.h
deleted file mode 100644
index c58fff0..0000000
--- a/riscv/insns/kadd64.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_vector_vs;
-P_64_PROFILE({
-  bool sat = false;
-  rd = (sat_add<int64_t, uint64_t>(rs1, rs2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kadd8.h b/riscv/insns/kadd8.h
deleted file mode 100644
index 98864c7..0000000
--- a/riscv/insns/kadd8.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_vector_vs;
-P_LOOP(8, {
-  bool sat = false;
-  pd = (sat_add<int8_t, uint8_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kaddh.h b/riscv/insns/kaddh.h
deleted file mode 100644
index 43aedb2..0000000
--- a/riscv/insns/kaddh.h
+++ /dev/null
@@ -1,5 +0,0 @@
-require_vector_vs;
-require_extension(EXT_ZPN);
-sreg_t res = (sreg_t)P_SH(RS1, 0) + (sreg_t)P_SH(RS2, 0);
-P_SAT(res, 16);
-WRITE_RD(sext_xlen((int16_t)res));
diff --git a/riscv/insns/kaddw.h b/riscv/insns/kaddw.h
deleted file mode 100644
index 3298d57..0000000
--- a/riscv/insns/kaddw.h
+++ /dev/null
@@ -1,5 +0,0 @@
-require_vector_vs;
-require_extension(EXT_ZPN);
-sreg_t res = (sreg_t)P_SW(RS1, 0) + (sreg_t)P_SW(RS2, 0);
-P_SAT(res, 32);
-WRITE_RD(sext32(res));
diff --git a/riscv/insns/kcras16.h b/riscv/insns/kcras16.h
deleted file mode 100644
index d746425..0000000
--- a/riscv/insns/kcras16.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_vector_vs;
-P_CROSS_ULOOP(16, {
-  bool sat = false;
-  pd = (sat_add<int16_t, uint16_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-}, {
-  bool sat = false;
-  pd = (sat_sub<int16_t, uint16_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kcras32.h b/riscv/insns/kcras32.h
deleted file mode 100644
index ead31f8..0000000
--- a/riscv/insns/kcras32.h
+++ /dev/null
@@ -1,11 +0,0 @@
-require_vector_vs;
-require_rv64;
-P_CROSS_ULOOP(32, {
-  bool sat = false;
-  pd = (sat_add<int32_t, uint32_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-}, {
-  bool sat = false;
-  pd = (sat_sub<int32_t, uint32_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kcrsa16.h b/riscv/insns/kcrsa16.h
deleted file mode 100644
index 2a7ca4d..0000000
--- a/riscv/insns/kcrsa16.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_vector_vs;
-P_CROSS_ULOOP(16, {
-  bool sat = false;
-  pd = (sat_sub<int16_t, uint16_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-}, {
-  bool sat = false;
-  pd = (sat_add<int16_t, uint16_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kcrsa32.h b/riscv/insns/kcrsa32.h
deleted file mode 100644
index b688fd3..0000000
--- a/riscv/insns/kcrsa32.h
+++ /dev/null
@@ -1,11 +0,0 @@
-require_vector_vs;
-require_rv64;
-P_CROSS_ULOOP(32, {
-  bool sat = false;
-  pd = (sat_sub<int32_t, uint32_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-}, {
-  bool sat = false;
-  pd = (sat_add<int32_t, uint32_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kdmabb.h b/riscv/insns/kdmabb.h
deleted file mode 100644
index 7ca0563..0000000
--- a/riscv/insns/kdmabb.h
+++ /dev/null
@@ -1,17 +0,0 @@
-require_vector_vs;
-require_extension(EXT_ZPN);
-sreg_t res;
-sreg_t aop = P_SH(RS1, 0);
-sreg_t bop = P_SH(RS2, 0);
-
-if ((INT16_MIN != aop) | (INT16_MIN != bop)) {
-  res = aop * bop;
-  res <<= 1;
-} else {
-  res = INT32_MAX;
-  P_SET_OV(1);
-}
-
-res += sext32(RD);
-P_SAT(res, 32);
-WRITE_RD(sext32(res));
diff --git a/riscv/insns/kdmabb16.h b/riscv/insns/kdmabb16.h
deleted file mode 100644
index 2ccd40b..0000000
--- a/riscv/insns/kdmabb16.h
+++ /dev/null
@@ -1,18 +0,0 @@
-require_vector_vs;
-require_rv64;
-P_LOOP(32, {
-  int32_t aop = P_SH(ps1, 0);
-  int32_t bop = P_SH(ps2, 0);  
-  int32_t mres;
-  bool sat;
-
-  if ((INT16_MIN != aop) | (INT16_MIN != bop)) {
-    mres = aop * bop;
-    mres <<= 1;
-  } else {
-    mres = INT32_MAX;
-    P_SET_OV(1);
-  }
-  pd = (sat_add<int32_t, uint32_t>(pd, mres, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kdmabt.h b/riscv/insns/kdmabt.h
deleted file mode 100644
index d50a6df..0000000
--- a/riscv/insns/kdmabt.h
+++ /dev/null
@@ -1,17 +0,0 @@
-require_vector_vs;
-require_extension(EXT_ZPN);
-sreg_t res;
-sreg_t aop = P_SH(RS1, 0);
-sreg_t bop = P_SH(RS2, 1);
-
-if ((INT16_MIN != aop) | (INT16_MIN != bop)) {
-  res = aop * bop;
-  res <<= 1;
-} else {
-  res = INT32_MAX;
-  P_SET_OV(1);
-}
-
-res += sext32(RD);
-P_SAT(res, 32);
-WRITE_RD(sext32(res));
diff --git a/riscv/insns/kdmabt16.h b/riscv/insns/kdmabt16.h
deleted file mode 100644
index 49538b3..0000000
--- a/riscv/insns/kdmabt16.h
+++ /dev/null
@@ -1,18 +0,0 @@
-require_vector_vs;
-require_rv64;
-P_LOOP(32, {
-  int32_t aop = P_SH(ps1, 0);
-  int32_t bop = P_SH(ps2, 1);  
-  int32_t mres;
-  bool sat;
-
-  if ((INT16_MIN != aop) | (INT16_MIN != bop)) {
-    mres = aop * bop;
-    mres <<= 1;
-  } else {
-    mres = INT32_MAX;
-    P_SET_OV(1);
-  }
-  pd = (sat_add<int32_t, uint32_t>(pd, mres, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kdmatt.h b/riscv/insns/kdmatt.h
deleted file mode 100644
index e917d41..0000000
--- a/riscv/insns/kdmatt.h
+++ /dev/null
@@ -1,17 +0,0 @@
-require_vector_vs;
-require_extension(EXT_ZPN);
-sreg_t res;
-sreg_t aop = P_SH(RS1, 1);
-sreg_t bop = P_SH(RS2, 1);
-
-if ((INT16_MIN != aop) | (INT16_MIN != bop)) {
-  res = aop * bop;
-  res <<= 1;
-} else {
-  res = INT32_MAX;
-  P_SET_OV(1);
-}
-
-res += sext32(RD);
-P_SAT(res, 32);
-WRITE_RD(sext32(res));
diff --git a/riscv/insns/kdmatt16.h b/riscv/insns/kdmatt16.h
deleted file mode 100644
index ebce13f..0000000
--- a/riscv/insns/kdmatt16.h
+++ /dev/null
@@ -1,18 +0,0 @@
-require_vector_vs;
-require_rv64;
-P_LOOP(32, {
-  int32_t aop = P_SH(ps1, 1);
-  int32_t bop = P_SH(ps2, 1);  
-  int32_t mres;
-  bool sat;
-
-  if ((INT16_MIN != aop) | (INT16_MIN != bop)) {
-    mres = aop * bop;
-    mres <<= 1;
-  } else {
-    mres = INT32_MAX;
-    P_SET_OV(1);
-  }
-  pd = (sat_add<int32_t, uint32_t>(pd, mres, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kdmbb.h b/riscv/insns/kdmbb.h
deleted file mode 100644
index 2f7a3f9..0000000
--- a/riscv/insns/kdmbb.h
+++ /dev/null
@@ -1,13 +0,0 @@
-require_vector_vs;
-require_extension(EXT_ZPN);
-sreg_t res;
-sreg_t aop = P_SH(RS1, 0);
-sreg_t bop = P_SH(RS2, 0);
-if ((INT16_MIN != aop) | (INT16_MIN != bop)) {
-  res = aop * bop;
-  res <<= 1;
-} else {
-  res = INT32_MAX;
-  P_SET_OV(1);
-}
-WRITE_RD(sext32(res));
diff --git a/riscv/insns/kdmbb16.h b/riscv/insns/kdmbb16.h
deleted file mode 100644
index a84877d..0000000
--- a/riscv/insns/kdmbb16.h
+++ /dev/null
@@ -1,13 +0,0 @@
-require_vector_vs;
-require_rv64;
-P_LOOP(32, {
-  int32_t aop = P_SH(ps1, 0);
-  int32_t bop = P_SH(ps2, 0);  
-  if ((INT16_MIN != aop) | (INT16_MIN != bop)) {
-    pd = aop * bop;
-    pd <<= 1;
-  } else {
-    pd = INT32_MAX;
-    P_SET_OV(1);
-  }
-})
diff --git a/riscv/insns/kdmbt.h b/riscv/insns/kdmbt.h
deleted file mode 100644
index 7f093e3..0000000
--- a/riscv/insns/kdmbt.h
+++ /dev/null
@@ -1,13 +0,0 @@
-require_vector_vs;
-require_extension(EXT_ZPN);
-sreg_t res;
-sreg_t aop = P_SH(RS1, 0);
-sreg_t bop = P_SH(RS2, 1);
-if ((INT16_MIN != aop) | (INT16_MIN != bop)) {
-  res = aop * bop;
-  res <<= 1;
-} else {
-  res = INT32_MAX;
-  P_SET_OV(1);
-}
-WRITE_RD(sext32(res));
diff --git a/riscv/insns/kdmbt16.h b/riscv/insns/kdmbt16.h
deleted file mode 100644
index 85e9d0e..0000000
--- a/riscv/insns/kdmbt16.h
+++ /dev/null
@@ -1,13 +0,0 @@
-require_vector_vs;
-require_rv64;
-P_LOOP(32, {
-  int32_t aop = P_SH(ps1, 0);
-  int32_t bop = P_SH(ps2, 1);  
-  if ((INT16_MIN != aop) | (INT16_MIN != bop)) {
-    pd = aop * bop;
-    pd <<= 1;
-  } else {
-    pd = INT32_MAX;
-    P_SET_OV(1);
-  }
-})
diff --git a/riscv/insns/kdmtt.h b/riscv/insns/kdmtt.h
deleted file mode 100644
index 05a4c8c..0000000
--- a/riscv/insns/kdmtt.h
+++ /dev/null
@@ -1,13 +0,0 @@
-require_vector_vs;
-require_extension(EXT_ZPN);
-sreg_t res;
-sreg_t aop = P_SH(RS1, 1);
-sreg_t bop = P_SH(RS2, 1);
-if ((INT16_MIN != aop) | (INT16_MIN != bop)) {
-  res = aop * bop;
-  res <<= 1;
-} else {
-  res = INT32_MAX;
-  P_SET_OV(1);
-}
-WRITE_RD(sext32(res));
diff --git a/riscv/insns/kdmtt16.h b/riscv/insns/kdmtt16.h
deleted file mode 100644
index 2190710..0000000
--- a/riscv/insns/kdmtt16.h
+++ /dev/null
@@ -1,13 +0,0 @@
-require_vector_vs;
-require_rv64;
-P_LOOP(32, {
-  int32_t aop = P_SH(ps1, 1);
-  int32_t bop = P_SH(ps2, 1);  
-  if ((INT16_MIN != aop) | (INT16_MIN != bop)) {
-    pd = aop * bop;
-    pd <<= 1;
-  } else {
-    pd = INT32_MAX;
-    P_SET_OV(1);
-  }
-})
diff --git a/riscv/insns/khm16.h b/riscv/insns/khm16.h
deleted file mode 100644
index 9c2e28c..0000000
--- a/riscv/insns/khm16.h
+++ /dev/null
@@ -1,9 +0,0 @@
-require_vector_vs;
-P_LOOP(16, {
-  if ((ps1 != INT16_MIN) | (ps2 != INT16_MIN)) {
-    pd = (ps1 * ps2) >> 15;
-  } else {
-    pd = INT16_MAX;
-    P_SET_OV(1);
-  }
-})
diff --git a/riscv/insns/khm8.h b/riscv/insns/khm8.h
deleted file mode 100644
index ac21d68..0000000
--- a/riscv/insns/khm8.h
+++ /dev/null
@@ -1,9 +0,0 @@
-require_vector_vs;
-P_LOOP(8, {
-  if ((ps1 != INT8_MIN) | (ps2 != INT8_MIN)) {
-    pd = (ps1 * ps2) >> 7;
-  } else {
-    pd = INT8_MAX;
-    P_SET_OV(1);
-  }
-})
diff --git a/riscv/insns/khmbb.h b/riscv/insns/khmbb.h
deleted file mode 100644
index e08eddc..0000000
--- a/riscv/insns/khmbb.h
+++ /dev/null
@@ -1,13 +0,0 @@
-require_vector_vs;
-require_extension(EXT_ZPN);
-sreg_t res;
-sreg_t aop = P_SH(RS1, 0);
-sreg_t bop = P_SH(RS2, 0);
-if ((INT16_MIN != aop) | (INT16_MIN != bop)) {
-  res = aop * bop;
-  res >>= 15;
-} else {
-  res = INT16_MAX;
-  P_SET_OV(1);
-}
-WRITE_RD(sext_xlen((int16_t)res));
diff --git a/riscv/insns/khmbb16.h b/riscv/insns/khmbb16.h
deleted file mode 100644
index efbd7eb..0000000
--- a/riscv/insns/khmbb16.h
+++ /dev/null
@@ -1,14 +0,0 @@
-require_vector_vs;
-require_rv64;
-P_LOOP(32, {
-  int32_t aop = P_SH(ps1, 0);
-  int32_t bop = P_SH(ps2, 0);  
-  if ((INT16_MIN != aop) | (INT16_MIN != bop)) {
-    pd = aop * bop;
-    pd >>= 15;
-  } else {
-    pd = INT16_MAX;
-    P_SET_OV(1);
-  }
-  pd = (int16_t)pd;
-})
diff --git a/riscv/insns/khmbt.h b/riscv/insns/khmbt.h
deleted file mode 100644
index 0c19cd1..0000000
--- a/riscv/insns/khmbt.h
+++ /dev/null
@@ -1,13 +0,0 @@
-require_vector_vs;
-require_extension(EXT_ZPN);
-sreg_t res;
-sreg_t aop = P_SH(RS1, 0);
-sreg_t bop = P_SH(RS2, 1);
-if ((INT16_MIN != aop) | (INT16_MIN != bop)) {
-  res = aop * bop;
-  res >>= 15;
-} else {
-  res = INT16_MAX;
-  P_SET_OV(1);
-}
-WRITE_RD(sext_xlen((int16_t)res));
diff --git a/riscv/insns/khmbt16.h b/riscv/insns/khmbt16.h
deleted file mode 100644
index 4bb1f48..0000000
--- a/riscv/insns/khmbt16.h
+++ /dev/null
@@ -1,14 +0,0 @@
-require_vector_vs;
-require_rv64;
-P_LOOP(32, {
-  int32_t aop = P_SH(ps1, 0);
-  int32_t bop = P_SH(ps2, 1);  
-  if ((INT16_MIN != aop) | (INT16_MIN != bop)) {
-    pd = aop * bop;
-    pd >>= 15;
-  } else {
-    pd = INT16_MAX;
-    P_SET_OV(1);
-  }
-  pd = (int16_t)pd;
-})
diff --git a/riscv/insns/khmtt.h b/riscv/insns/khmtt.h
deleted file mode 100644
index dcd4503..0000000
--- a/riscv/insns/khmtt.h
+++ /dev/null
@@ -1,13 +0,0 @@
-require_vector_vs;
-require_extension(EXT_ZPN);
-sreg_t res;
-sreg_t aop = P_SH(RS1, 1);
-sreg_t bop = P_SH(RS2, 1);
-if ((INT16_MIN != aop) | (INT16_MIN != bop)) {
-  res = aop * bop;
-  res >>= 15;
-} else {
-  res = INT16_MAX;
-  P_SET_OV(1);
-}
-WRITE_RD(sext_xlen((int16_t)res));
diff --git a/riscv/insns/khmtt16.h b/riscv/insns/khmtt16.h
deleted file mode 100644
index d3c0b4c..0000000
--- a/riscv/insns/khmtt16.h
+++ /dev/null
@@ -1,14 +0,0 @@
-require_vector_vs;
-require_rv64;
-P_LOOP(32, {
-  int32_t aop = P_SH(ps1, 1);
-  int32_t bop = P_SH(ps2, 1);  
-  if ((INT16_MIN != aop) | (INT16_MIN != bop)) {
-    pd = aop * bop;
-    pd >>= 15;
-  } else {
-    pd = INT16_MAX;
-    P_SET_OV(1);
-  }
-  pd = (int16_t)pd;
-})
diff --git a/riscv/insns/khmx16.h b/riscv/insns/khmx16.h
deleted file mode 100644
index bf93462..0000000
--- a/riscv/insns/khmx16.h
+++ /dev/null
@@ -1,9 +0,0 @@
-require_vector_vs;
-P_CROSS_LOOP(16, {
-  if ((ps1 != INT16_MIN) | (ps2 != INT16_MIN)) {
-    pd = (ps1 * ps2) >> 15;
-  } else {
-    pd = INT16_MAX;
-    P_SET_OV(1);
-  }
-},)
diff --git a/riscv/insns/khmx8.h b/riscv/insns/khmx8.h
deleted file mode 100644
index 0d6a5d5..0000000
--- a/riscv/insns/khmx8.h
+++ /dev/null
@@ -1,9 +0,0 @@
-require_vector_vs;
-P_CROSS_LOOP(8, {
-  if ((ps1 != INT8_MIN) | (ps2 != INT8_MIN)) {
-    pd = (ps1 * ps2) >> 7;
-  } else {
-    pd = INT8_MAX;
-    P_SET_OV(1);
-  }
-},)
diff --git a/riscv/insns/kmabb.h b/riscv/insns/kmabb.h
deleted file mode 100644
index f2d7715..0000000
--- a/riscv/insns/kmabb.h
+++ /dev/null
@@ -1,7 +0,0 @@
-require_vector_vs;
-P_LOOP(32, {
-  int32_t mres = P_SH(ps1, 0) * P_SH(ps2, 0);
-  bool sat = false;
-  pd = (sat_add<int32_t, uint32_t>(pd, mres, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kmabb32.h b/riscv/insns/kmabb32.h
deleted file mode 100644
index 752bf8b..0000000
--- a/riscv/insns/kmabb32.h
+++ /dev/null
@@ -1,8 +0,0 @@
-require_vector_vs;
-require_rv64;
-require_extension(EXT_ZPN);
-
-bool sat = false;
-sreg_t mres = (sreg_t)P_SW(RS1, 0) * P_SW(RS2, 0);
-WRITE_RD((sat_add<int64_t, uint64_t>(RD, mres, sat)));
-P_SET_OV(sat);
diff --git a/riscv/insns/kmabt.h b/riscv/insns/kmabt.h
deleted file mode 100644
index 4ead23b..0000000
--- a/riscv/insns/kmabt.h
+++ /dev/null
@@ -1,7 +0,0 @@
-require_vector_vs;
-P_LOOP(32, {
-  int32_t mres = P_SH(ps1, 0) * P_SH(ps2, 1);
-  bool sat = false;
-  pd = (sat_add<int32_t, uint32_t>(pd, mres, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kmabt32.h b/riscv/insns/kmabt32.h
deleted file mode 100644
index ee7511b..0000000
--- a/riscv/insns/kmabt32.h
+++ /dev/null
@@ -1,8 +0,0 @@
-require_vector_vs;
-require_rv64;
-require_extension(EXT_ZPN);
-
-bool sat = false;
-sreg_t mres = (sreg_t)P_SW(RS1, 0) * P_SW(RS2, 1);
-WRITE_RD((sat_add<int64_t, uint64_t>(RD, mres, sat)));
-P_SET_OV(sat);
diff --git a/riscv/insns/kmada.h b/riscv/insns/kmada.h
deleted file mode 100644
index 3c082c7..0000000
--- a/riscv/insns/kmada.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_vector_vs;
-P_REDUCTION_LOOP(32, 16, true, true, {
-  pd_res += ps1 * ps2;
-})
diff --git a/riscv/insns/kmadrs.h b/riscv/insns/kmadrs.h
deleted file mode 100644
index a450351..0000000
--- a/riscv/insns/kmadrs.h
+++ /dev/null
@@ -1,7 +0,0 @@
-require_vector_vs;
-P_REDUCTION_LOOP(32, 16, true, true, {
-  if (j & 1)
-    pd_res -= ps1 * ps2;
-  else
-    pd_res += ps1 * ps2;
-})
diff --git a/riscv/insns/kmadrs32.h b/riscv/insns/kmadrs32.h
deleted file mode 100644
index 0f71e90..0000000
--- a/riscv/insns/kmadrs32.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_vector_vs;
-require_rv64;
-require_extension(EXT_ZPN);
-
-bool sat;
-sreg_t mres0 = (sreg_t)P_SW(RS1, 0) * P_SW(RS2, 0);
-sreg_t mres1 = (sreg_t)P_SW(RS1, 1) * P_SW(RS2, 1);
-
-WRITE_RD((sat_add<sreg_t, reg_t>(RD, mres0, -mres1, sat)));
-P_SET_OV(sat);
diff --git a/riscv/insns/kmads.h b/riscv/insns/kmads.h
deleted file mode 100644
index 89aabe0..0000000
--- a/riscv/insns/kmads.h
+++ /dev/null
@@ -1,7 +0,0 @@
-require_vector_vs;
-P_REDUCTION_LOOP(32, 16, true, true, {
-  if (j & 1)
-    pd_res += ps1 * ps2;
-  else
-    pd_res -= ps1 * ps2;
-})
diff --git a/riscv/insns/kmads32.h b/riscv/insns/kmads32.h
deleted file mode 100644
index 0a3b590..0000000
--- a/riscv/insns/kmads32.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_vector_vs;
-require_rv64;
-require_extension(EXT_ZPN);
-
-bool sat;
-sreg_t mres0 = (sreg_t)P_SW(RS1, 0) * P_SW(RS2, 0);
-sreg_t mres1 = (sreg_t)P_SW(RS1, 1) * P_SW(RS2, 1);
-
-WRITE_RD((sat_add<sreg_t, reg_t>(RD, -mres0, mres1, sat)));
-P_SET_OV(sat);
diff --git a/riscv/insns/kmar64.h b/riscv/insns/kmar64.h
deleted file mode 100644
index a4d332b..0000000
--- a/riscv/insns/kmar64.h
+++ /dev/null
@@ -1,15 +0,0 @@
-require_vector_vs;
-P_64_PROFILE_BASE()
-P_64_PROFILE_PARAM(true, false)
-
-bool sat = false;
-sreg_t mres0 = (sreg_t)P_SW(rs1, 0) * P_SW(rs2, 0);
-sreg_t mres1 = (sreg_t)P_SW(rs1, 1) * P_SW(rs2, 1);
-
-if (xlen == 32) {
-  rd = (sat_add<int64_t, uint64_t>(rd, mres0, sat));
-} else {
-  rd = (sat_add<int64_t, uint64_t>(rd, mres0, mres1, sat));
-}
-P_SET_OV(sat);
-P_64_PROFILE_END()
diff --git a/riscv/insns/kmatt.h b/riscv/insns/kmatt.h
deleted file mode 100644
index 4be2f3d..0000000
--- a/riscv/insns/kmatt.h
+++ /dev/null
@@ -1,7 +0,0 @@
-require_vector_vs;
-P_LOOP(32, {
-  int32_t mres = P_SH(ps1, 1) * P_SH(ps2, 1);
-  bool sat = false;
-  pd = (sat_add<int32_t, uint32_t>(pd, mres, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kmatt32.h b/riscv/insns/kmatt32.h
deleted file mode 100644
index 4fe9ed2..0000000
--- a/riscv/insns/kmatt32.h
+++ /dev/null
@@ -1,8 +0,0 @@
-require_vector_vs;
-require_rv64;
-require_extension(EXT_ZPN);
-
-bool sat = false;
-sreg_t mres = (sreg_t)P_SW(RS1, 1) * P_SW(RS2, 1);
-WRITE_RD((sat_add<int64_t, uint64_t>(RD, mres, sat)));
-P_SET_OV(sat);
diff --git a/riscv/insns/kmaxda.h b/riscv/insns/kmaxda.h
deleted file mode 100644
index 393f047..0000000
--- a/riscv/insns/kmaxda.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_vector_vs;
-P_REDUCTION_CROSS_LOOP(32, 16, true, true, {
-  pd_res += ps1 * ps2;
-})
diff --git a/riscv/insns/kmaxda32.h b/riscv/insns/kmaxda32.h
deleted file mode 100644
index b9346b9..0000000
--- a/riscv/insns/kmaxda32.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_vector_vs;
-require_rv64;
-require_extension(EXT_ZPN);
-
-bool sat;
-sreg_t mres0 = (sreg_t)P_SW(RS1, 0) * P_SW(RS2, 1);
-sreg_t mres1 = (sreg_t)P_SW(RS1, 1) * P_SW(RS2, 0);
-
-WRITE_RD((sat_add<sreg_t, reg_t>(RD, mres0, mres1, sat)));
-P_SET_OV(sat);
diff --git a/riscv/insns/kmaxds.h b/riscv/insns/kmaxds.h
deleted file mode 100644
index c2f0e59..0000000
--- a/riscv/insns/kmaxds.h
+++ /dev/null
@@ -1,7 +0,0 @@
-require_vector_vs;
-P_REDUCTION_CROSS_LOOP(32, 16, true, true, {
-  if (j & 1)
-    pd_res += ps1 * ps2;
-  else
-    pd_res -= ps1 * ps2;
-})
diff --git a/riscv/insns/kmaxds32.h b/riscv/insns/kmaxds32.h
deleted file mode 100644
index 6a7d64e..0000000
--- a/riscv/insns/kmaxds32.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_vector_vs;
-require_rv64;
-require_extension(EXT_ZPN);
-
-bool sat;
-sreg_t mres0 = (sreg_t)P_SW(RS1, 0) * P_SW(RS2, 1);
-sreg_t mres1 = (sreg_t)P_SW(RS1, 1) * P_SW(RS2, 0);
-
-WRITE_RD((sat_add<sreg_t, reg_t>(RD, -mres0, mres1, sat)));
-P_SET_OV(sat);
diff --git a/riscv/insns/kmda.h b/riscv/insns/kmda.h
deleted file mode 100644
index 68b6c9a..0000000
--- a/riscv/insns/kmda.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_vector_vs;
-P_REDUCTION_LOOP(32, 16, false, true, {
-  pd_res += ps1 * ps2;
-})
diff --git a/riscv/insns/kmda32.h b/riscv/insns/kmda32.h
deleted file mode 100644
index 646021f..0000000
--- a/riscv/insns/kmda32.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_vector_vs;
-require_rv64;
-require_extension(EXT_ZPN);
-
-bool sat;
-sreg_t mres0 = (sreg_t)P_SW(RS1, 0) * P_SW(RS2, 0);
-sreg_t mres1 = (sreg_t)P_SW(RS1, 1) * P_SW(RS2, 1);
-
-WRITE_RD((sat_add<sreg_t, reg_t>(mres0, mres1, sat)));
-P_SET_OV(sat);
diff --git a/riscv/insns/kmmac.h b/riscv/insns/kmmac.h
deleted file mode 100644
index 946f0fe..0000000
--- a/riscv/insns/kmmac.h
+++ /dev/null
@@ -1,7 +0,0 @@
-require_vector_vs;
-P_LOOP(32, {
-  int64_t mres = (int64_t) ps1 * (int64_t) ps2;
-  bool sat = false;
-  pd = (sat_add<int32_t, uint32_t>(pd, (mres >> 32), sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kmmac_u.h b/riscv/insns/kmmac_u.h
deleted file mode 100644
index 5a06a4d..0000000
--- a/riscv/insns/kmmac_u.h
+++ /dev/null
@@ -1,8 +0,0 @@
-require_vector_vs;
-P_LOOP(32, {
-  int64_t mres = (int64_t) ps1 * (int64_t) ps2;
-  int32_t round = (((mres >> 31) + 1) >> 1);
-  bool sat = false;
-  pd = (sat_add<int32_t, uint32_t>(pd, round, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kmmawb.h b/riscv/insns/kmmawb.h
deleted file mode 100644
index 0e3a694..0000000
--- a/riscv/insns/kmmawb.h
+++ /dev/null
@@ -1,7 +0,0 @@
-require_vector_vs;
-P_LOOP(32, {
-  int64_t mres = (int64_t)ps1 * P_SH(ps2, 0);
-  bool sat = false;
-  pd = (sat_add<int32_t, uint32_t>(pd, (mres >> 16), sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kmmawb2.h b/riscv/insns/kmmawb2.h
deleted file mode 100644
index 274f9dd..0000000
--- a/riscv/insns/kmmawb2.h
+++ /dev/null
@@ -1,15 +0,0 @@
-require_vector_vs;
-P_LOOP(32, {
-  int64_t addop = 0;
-  int64_t mres = 0;
-  bool sat = false;
-  if ((INT32_MIN != ps1) | (INT16_MIN != P_SH(ps2, 0))) {
-    mres = ((int64_t) ps1 * P_SH(ps2, 0)) << 1;
-    addop = mres >> 16;
-  } else {
-    addop = INT32_MAX;
-    P_SET_OV(1);
-  }
-  pd = (sat_add<int32_t, uint32_t>(pd, addop, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kmmawb2_u.h b/riscv/insns/kmmawb2_u.h
deleted file mode 100644
index 447a3f4..0000000
--- a/riscv/insns/kmmawb2_u.h
+++ /dev/null
@@ -1,15 +0,0 @@
-require_vector_vs;
-P_LOOP(32, {
-  int64_t addop = 0;
-  int64_t mres = 0;
-  bool sat = false;
-  if ((INT32_MIN != ps1) | (INT16_MIN != P_SH(ps2, 0))) {
-    mres = ((int64_t) ps1 * P_SH(ps2, 0)) << 1;
-    addop = ((mres >> 15) + 1) >> 1;
-  } else {
-    addop = INT32_MAX;
-    P_SET_OV(1);
-  }
-  pd = (sat_add<int32_t, uint32_t>(pd, addop, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kmmawb_u.h b/riscv/insns/kmmawb_u.h
deleted file mode 100644
index 766dd71..0000000
--- a/riscv/insns/kmmawb_u.h
+++ /dev/null
@@ -1,8 +0,0 @@
-require_vector_vs;
-P_LOOP(32, {
-  int64_t mres = (int64_t)ps1 * P_SH(ps2, 0);
-  int32_t round = (((mres >> 15) + 1) >> 1);
-  bool sat = false;
-  pd = (sat_add<int32_t, uint32_t>(pd, round, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kmmawt.h b/riscv/insns/kmmawt.h
deleted file mode 100644
index 514ee48..0000000
--- a/riscv/insns/kmmawt.h
+++ /dev/null
@@ -1,7 +0,0 @@
-require_vector_vs;
-P_LOOP(32, {
-  int64_t mres = (int64_t)ps1 * P_SH(ps2, 1);
-  bool sat = false;
-  pd = (sat_add<int32_t, uint32_t>(pd, (mres >> 16), sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kmmawt2.h b/riscv/insns/kmmawt2.h
deleted file mode 100644
index 6eb22ac..0000000
--- a/riscv/insns/kmmawt2.h
+++ /dev/null
@@ -1,15 +0,0 @@
-require_vector_vs;
-P_LOOP(32, {
-  int64_t addop = 0;
-  int64_t mres = 0;
-  bool sat = false;
-  if ((INT32_MIN != ps1) | (INT16_MIN != P_SH(ps2, 1))) {
-    mres = ((int64_t) ps1 *  P_SH(ps2, 1)) << 1;
-    addop = mres >> 16;
-  } else {
-    addop = INT32_MAX;
-    P_SET_OV(1);
-  }
-  pd = (sat_add<int32_t, uint32_t>(pd, addop, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kmmawt2_u.h b/riscv/insns/kmmawt2_u.h
deleted file mode 100644
index b82e090..0000000
--- a/riscv/insns/kmmawt2_u.h
+++ /dev/null
@@ -1,15 +0,0 @@
-require_vector_vs;
-P_LOOP(32, {
-  int64_t addop = 0;
-  int64_t mres = 0;
-  bool sat = false;
-  if ((INT32_MIN != ps1) | (INT16_MIN != P_SH(ps2, 1))) {
-    mres = ((int64_t) ps1 *  P_SH(ps2, 1)) << 1;
-    addop = ((mres >> 15) + 1) >> 1;
-  } else {
-    addop = INT32_MAX;
-    P_SET_OV(1);
-  }
-  pd = (sat_add<int32_t, uint32_t>(pd, addop, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kmmawt_u.h b/riscv/insns/kmmawt_u.h
deleted file mode 100644
index 74d8fd0..0000000
--- a/riscv/insns/kmmawt_u.h
+++ /dev/null
@@ -1,8 +0,0 @@
-require_vector_vs;
-P_LOOP(32, {
-  int64_t mres = (int64_t)ps1 * P_SH(ps2, 1);
-  int32_t round = (((mres >> 15) + 1) >> 1);
-  bool sat = false;
-  pd = (sat_add<int32_t, uint32_t>(pd, round, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kmmsb.h b/riscv/insns/kmmsb.h
deleted file mode 100644
index 29ad1bf..0000000
--- a/riscv/insns/kmmsb.h
+++ /dev/null
@@ -1,7 +0,0 @@
-require_vector_vs;
-P_LOOP(32, {
-  int64_t mres = (int64_t) ps1 * (int64_t) ps2;
-  bool sat = false;
-  pd = (sat_sub<int32_t, uint32_t>(pd, (mres >> 32), sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kmmsb_u.h b/riscv/insns/kmmsb_u.h
deleted file mode 100644
index c7b283e..0000000
--- a/riscv/insns/kmmsb_u.h
+++ /dev/null
@@ -1,8 +0,0 @@
-require_vector_vs;
-P_LOOP(32, {
-  int64_t mres = (int64_t) ps1 * (int64_t) ps2;
-  int32_t round = (((mres >> 31) + 1) >> 1);
-  bool sat = false;
-  pd = (sat_sub<int32_t, uint32_t>(pd, round, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kmmwb2.h b/riscv/insns/kmmwb2.h
deleted file mode 100644
index d08b0ef..0000000
--- a/riscv/insns/kmmwb2.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_vector_vs;
-P_LOOP(32, {
-  if ((INT32_MIN != ps1) | (INT16_MIN != P_SH(ps2, 0))) {
-    int64_t mres = ((int64_t) ps1 * P_SH(ps2, 0)) << 1;
-    pd = mres >> 16;
-  } else {
-    pd = INT32_MAX;
-    P_SET_OV(1);
-  }
-})
diff --git a/riscv/insns/kmmwb2_u.h b/riscv/insns/kmmwb2_u.h
deleted file mode 100644
index d308bf3..0000000
--- a/riscv/insns/kmmwb2_u.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_vector_vs;
-P_LOOP(32, {
-  if ((INT32_MIN != ps1) | (INT16_MIN != P_SH(ps2, 0))) {
-    int64_t mres = ((int64_t) ps1 * P_SH(ps2, 0)) << 1;
-    pd = ((mres >> 15) + 1) >> 1;
-  } else {
-    pd = INT32_MAX;
-    P_SET_OV(1);
-  }
-})
diff --git a/riscv/insns/kmmwt2.h b/riscv/insns/kmmwt2.h
deleted file mode 100644
index 38ba9b1..0000000
--- a/riscv/insns/kmmwt2.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_vector_vs;
-P_LOOP(32, {
-  if ((INT32_MIN != ps1) | (INT16_MIN != P_SH(ps2, 1))) {
-    int64_t mres = ((int64_t) ps1 * P_SH(ps2, 1)) << 1;
-    pd = mres >> 16;
-  } else {
-    pd = INT32_MAX;
-    P_SET_OV(1);
-  }
-})
diff --git a/riscv/insns/kmmwt2_u.h b/riscv/insns/kmmwt2_u.h
deleted file mode 100644
index e855786..0000000
--- a/riscv/insns/kmmwt2_u.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_vector_vs;
-P_LOOP(32, {
-  if ((INT32_MIN != ps1) | (INT16_MIN != P_SH(ps2, 1))) {
-    int64_t mres = ((int64_t) ps1 * P_SH(ps2, 1)) << 1;
-    pd = ((mres >> 15) + 1) >> 1;
-  } else {
-    pd = INT32_MAX;
-    P_SET_OV(1);
-  }
-})
diff --git a/riscv/insns/kmsda.h b/riscv/insns/kmsda.h
deleted file mode 100644
index 94b118a..0000000
--- a/riscv/insns/kmsda.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_vector_vs;
-P_REDUCTION_LOOP(32, 16, true, true, {
-  pd_res -= ps1 * ps2;
-})
diff --git a/riscv/insns/kmsda32.h b/riscv/insns/kmsda32.h
deleted file mode 100644
index d54d42c..0000000
--- a/riscv/insns/kmsda32.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_vector_vs;
-require_rv64;
-require_extension(EXT_ZPN);
-
-bool sat;
-sreg_t mres0 = (sreg_t)P_SW(RS1, 0) * P_SW(RS2, 0);
-sreg_t mres1 = (sreg_t)P_SW(RS1, 1) * P_SW(RS2, 1);
-
-WRITE_RD((sat_add<sreg_t, reg_t>(RD, -mres0, -mres1, sat)));
-P_SET_OV(sat);
diff --git a/riscv/insns/kmsr64.h b/riscv/insns/kmsr64.h
deleted file mode 100644
index bfef503..0000000
--- a/riscv/insns/kmsr64.h
+++ /dev/null
@@ -1,26 +0,0 @@
-require_vector_vs;
-P_64_PROFILE_BASE()
-P_64_PROFILE_PARAM(true, false)
-
-bool sat = false;
-sreg_t mres0 = -(sreg_t)P_SW(rs1, 0) * P_SW(rs2, 0);
-sreg_t mres1 = -(sreg_t)P_SW(rs1, 1) * P_SW(rs2, 1);
-sreg_t res;
-
-if (xlen == 32) {
-  rd = (sat_add<int64_t, uint64_t>(rd, mres0, sat));
-} else {
-  if ((rd ^ mres0) < 0) {
-    res = rd + mres0;
-    rd = (sat_add<int64_t, uint64_t>(res, mres1, sat));
-  } else if ((rd ^ mres1) < 0) {
-    res = rd + mres1;
-    rd = (sat_add<int64_t, uint64_t>(res, mres0, sat));
-  } else {
-    rd = (sat_add<int64_t, uint64_t>(rd, mres0, sat));
-    P_SET_OV(sat);
-    rd = (sat_add<int64_t, uint64_t>(rd, mres1, sat));
-  }
-}
-P_SET_OV(sat);
-P_64_PROFILE_END()
diff --git a/riscv/insns/kmsxda.h b/riscv/insns/kmsxda.h
deleted file mode 100644
index 2d0faa3..0000000
--- a/riscv/insns/kmsxda.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_vector_vs;
-P_REDUCTION_CROSS_LOOP(32, 16, true, true, {
-  pd_res -= ps1 * ps2;
-})
diff --git a/riscv/insns/kmsxda32.h b/riscv/insns/kmsxda32.h
deleted file mode 100644
index 3006b54..0000000
--- a/riscv/insns/kmsxda32.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_vector_vs;
-require_rv64;
-require_extension(EXT_ZPN);
-
-bool sat;
-sreg_t mres0 = (sreg_t)P_SW(RS1, 0) * P_SW(RS2, 1);
-sreg_t mres1 = (sreg_t)P_SW(RS1, 1) * P_SW(RS2, 0);
-
-WRITE_RD((sat_add<sreg_t, reg_t>(RD, -mres0, -mres1, sat)));
-P_SET_OV(sat);
diff --git a/riscv/insns/kmxda.h b/riscv/insns/kmxda.h
deleted file mode 100644
index 4addd8a..0000000
--- a/riscv/insns/kmxda.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_vector_vs;
-P_REDUCTION_CROSS_LOOP(32, 16, false, true, {
-  pd_res += ps1 * ps2;
-})
diff --git a/riscv/insns/kmxda32.h b/riscv/insns/kmxda32.h
deleted file mode 100644
index 99a8204..0000000
--- a/riscv/insns/kmxda32.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_vector_vs;
-require_rv64;
-require_extension(EXT_ZPN);
-
-bool sat;
-sreg_t mres0 = (sreg_t)P_SW(RS1, 0) * P_SW(RS2, 1);
-sreg_t mres1 = (sreg_t)P_SW(RS1, 1) * P_SW(RS2, 0);
-
-WRITE_RD((sat_add<sreg_t, reg_t>(mres0, mres1, sat)));
-P_SET_OV(sat);
diff --git a/riscv/insns/ksll16.h b/riscv/insns/ksll16.h
deleted file mode 100644
index 9e03b34..0000000
--- a/riscv/insns/ksll16.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_vector_vs;
-P_X_LOOP(16, 4, {
-  auto res = (sreg_t)ps1 << sa;
-  P_SAT(res, 16);
-  pd = res;
-})
diff --git a/riscv/insns/ksll32.h b/riscv/insns/ksll32.h
deleted file mode 100644
index 3588898..0000000
--- a/riscv/insns/ksll32.h
+++ /dev/null
@@ -1,7 +0,0 @@
-require_vector_vs;
-require_rv64;
-P_X_LOOP(32, 5, {
-  auto res = (sreg_t)ps1 << sa;
-  P_SAT(res, 32);
-  pd = res;
-})
diff --git a/riscv/insns/ksll8.h b/riscv/insns/ksll8.h
deleted file mode 100644
index 930ea03..0000000
--- a/riscv/insns/ksll8.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_vector_vs;
-P_X_LOOP(8, 3, {
-  auto res = (sreg_t)ps1 << sa;
-  P_SAT(res, 8);
-  pd = res;
-})
diff --git a/riscv/insns/kslli16.h b/riscv/insns/kslli16.h
deleted file mode 100644
index edc7c67..0000000
--- a/riscv/insns/kslli16.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_vector_vs;
-P_I_LOOP(16, 4, {
-  auto res = (sreg_t)ps1 << imm4u;
-  P_SAT(res, 16);
-  pd = res;
-})
diff --git a/riscv/insns/kslli32.h b/riscv/insns/kslli32.h
deleted file mode 100644
index 4fd506b..0000000
--- a/riscv/insns/kslli32.h
+++ /dev/null
@@ -1,7 +0,0 @@
-require_vector_vs;
-require_rv64;
-P_I_LOOP(32, 5, {
-  auto res = (sreg_t)ps1 << imm5u;
-  P_SAT(res, 32);
-  pd = res;
-})
diff --git a/riscv/insns/kslli8.h b/riscv/insns/kslli8.h
deleted file mode 100644
index 18d714f..0000000
--- a/riscv/insns/kslli8.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_vector_vs;
-P_I_LOOP(8, 3, {
-  auto res = (sreg_t)ps1 << imm3u;
-  P_SAT(res, 8);
-  pd = res;
-})
diff --git a/riscv/insns/kslliw.h b/riscv/insns/kslliw.h
deleted file mode 100644
index 8902d3a..0000000
--- a/riscv/insns/kslliw.h
+++ /dev/null
@@ -1,8 +0,0 @@
-require_vector_vs;
-require_extension(EXT_ZPN);
-sreg_t rs1 = sext32(RS1);
-sreg_t sa = insn.p_imm5();
-sreg_t res = rs1 << sa;
-
-P_SAT(res, 32);
-WRITE_RD(sext32(res));
diff --git a/riscv/insns/ksllw.h b/riscv/insns/ksllw.h
deleted file mode 100644
index 7e8452f..0000000
--- a/riscv/insns/ksllw.h
+++ /dev/null
@@ -1,8 +0,0 @@
-require_vector_vs;
-require_extension(EXT_ZPN);
-sreg_t rs1 = sext32(RS1);
-sreg_t sa = get_field(RS2, make_mask64(0, 5));
-sreg_t res = rs1 << sa;
-
-P_SAT(res, 32);
-WRITE_RD(sext32(res));
diff --git a/riscv/insns/kslra16.h b/riscv/insns/kslra16.h
deleted file mode 100644
index ad1443a..0000000
--- a/riscv/insns/kslra16.h
+++ /dev/null
@@ -1,12 +0,0 @@
-require_vector_vs;
-P_X_LOOP(16, 5, {
-  if (ssa < 0) {
-    sa = -ssa;
-    sa = (sa == 16) ? 15 : sa;
-    pd = ps1 >> sa;
-  } else {
-    auto res = (sreg_t)ps1 << ssa;
-    P_SAT(res, 16);
-    pd = res;
-  }
-})
diff --git a/riscv/insns/kslra16_u.h b/riscv/insns/kslra16_u.h
deleted file mode 100644
index 27bb77c..0000000
--- a/riscv/insns/kslra16_u.h
+++ /dev/null
@@ -1,15 +0,0 @@
-require_vector_vs;
-P_X_LOOP(16, 5, {
-  if (ssa < 0) {
-    sa = -ssa;
-    sa = (sa == 16) ? 15 : sa;
-    if (sa != 0)
-      pd = ((ps1 >> (sa - 1)) + 1) >> 1;
-    else
-      pd = ps1;
-  } else {
-    auto res = (sreg_t)ps1 << ssa;
-    P_SAT(res, 16);
-    pd = res;
-  }
-})
diff --git a/riscv/insns/kslra32.h b/riscv/insns/kslra32.h
deleted file mode 100644
index 871d601..0000000
--- a/riscv/insns/kslra32.h
+++ /dev/null
@@ -1,13 +0,0 @@
-require_vector_vs;
-require_rv64;
-P_X_LOOP(32, 6, {
-  if (ssa < 0) {
-    sa = -ssa;
-    sa = (sa == 32) ? 31 : sa;
-    pd = ps1 >> sa;
-  } else {
-    auto res = (sreg_t)ps1 << ssa;
-    P_SAT(res, 32);
-    pd = res;
-  }
-})
diff --git a/riscv/insns/kslra32_u.h b/riscv/insns/kslra32_u.h
deleted file mode 100644
index b9c06cf..0000000
--- a/riscv/insns/kslra32_u.h
+++ /dev/null
@@ -1,16 +0,0 @@
-require_vector_vs;
-require_rv64;
-P_X_LOOP(32, 6, {
-  if (ssa < 0) {
-    sa = -ssa;
-    sa = (sa == 32) ? 31 : sa;
-    if (sa != 0)
-      pd = ((ps1 >> (sa - 1)) + 1) >> 1;
-    else
-      pd = ps1;
-  } else {
-    auto res = (sreg_t)ps1 << ssa;
-    P_SAT(res, 32);
-    pd = res;
-  }
-})
diff --git a/riscv/insns/kslra8.h b/riscv/insns/kslra8.h
deleted file mode 100644
index b3f3e6b..0000000
--- a/riscv/insns/kslra8.h
+++ /dev/null
@@ -1,12 +0,0 @@
-require_vector_vs;
-P_X_LOOP(8, 4, {
-  if (ssa < 0) {
-    sa = -ssa;
-    sa = (sa == 8) ? 7 : sa;
-    pd = ps1 >> sa;
-  } else {
-    auto res = (sreg_t)ps1 << ssa;
-    P_SAT(res, 8);
-    pd = res;
-  }
-})
diff --git a/riscv/insns/kslra8_u.h b/riscv/insns/kslra8_u.h
deleted file mode 100644
index 340283f..0000000
--- a/riscv/insns/kslra8_u.h
+++ /dev/null
@@ -1,15 +0,0 @@
-require_vector_vs;
-P_X_LOOP(8, 4, {
-  if (ssa < 0) {
-    sa = -ssa;
-    sa = (sa == 8) ? 7 : sa;
-    if (sa != 0)
-      pd = ((ps1 >> (sa - 1)) + 1) >> 1;
-    else
-      pd = ps1;
-  } else {
-    auto res = (sreg_t)ps1 << ssa;
-    P_SAT(res, 8);
-    pd = res;
-  }
-})
diff --git a/riscv/insns/kslraw.h b/riscv/insns/kslraw.h
deleted file mode 100644
index fa4c844..0000000
--- a/riscv/insns/kslraw.h
+++ /dev/null
@@ -1,14 +0,0 @@
-require_vector_vs;
-require_extension(EXT_ZPN);
-sreg_t rs1 = sext32(RS1);
-sreg_t sa = int64_t(RS2) << (64 - 6) >> (64 - 6);
-
-if (sa < 0) {
-  sa = -sa;
-  sa = (sa == 32) ? 31 : sa;
-  WRITE_RD(sext32(rs1 >> sa));
-} else {
-  auto res = rs1 << sa;
-  P_SAT(res, 32);
-  WRITE_RD(sext32(res));
-}
diff --git a/riscv/insns/kslraw_u.h b/riscv/insns/kslraw_u.h
deleted file mode 100644
index ebecb61..0000000
--- a/riscv/insns/kslraw_u.h
+++ /dev/null
@@ -1,14 +0,0 @@
-require_vector_vs;
-require_extension(EXT_ZPN);
-sreg_t rs1 = sext32(RS1);
-sreg_t sa = int64_t(RS2) << (64 - 6) >> (64 - 6);
-
-if (sa < 0) {
-  sa = -sa;
-  sa = (sa == 32) ? 31 : sa;
-  WRITE_RD(sext32(((rs1 >> (sa - 1)) + 1)) >> 1);
-} else {
-  auto res = rs1 << sa;
-  P_SAT(res, 32);
-  WRITE_RD(sext32(res));
-}
diff --git a/riscv/insns/kstas16.h b/riscv/insns/kstas16.h
deleted file mode 100644
index ad18013..0000000
--- a/riscv/insns/kstas16.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_vector_vs;
-P_STRAIGHT_ULOOP(16, {
-  bool sat = false;
-  pd = (sat_add<int16_t, uint16_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-}, {
-  bool sat = false;
-  pd = (sat_sub<int16_t, uint16_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kstas32.h b/riscv/insns/kstas32.h
deleted file mode 100644
index 35f23e0..0000000
--- a/riscv/insns/kstas32.h
+++ /dev/null
@@ -1,11 +0,0 @@
-require_vector_vs;
-require_rv64;
-P_STRAIGHT_ULOOP(32, {
-  bool sat = false;
-  pd = (sat_add<int32_t, uint32_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-}, {
-  bool sat = false;
-  pd = (sat_sub<int32_t, uint32_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kstsa16.h b/riscv/insns/kstsa16.h
deleted file mode 100644
index 47a8918..0000000
--- a/riscv/insns/kstsa16.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_vector_vs;
-P_STRAIGHT_ULOOP(16, {
-  bool sat = false;
-  pd = (sat_sub<int16_t, uint16_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-}, {
-  bool sat = false;
-  pd = (sat_add<int16_t, uint16_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/kstsa32.h b/riscv/insns/kstsa32.h
deleted file mode 100644
index aa9c372..0000000
--- a/riscv/insns/kstsa32.h
+++ /dev/null
@@ -1,11 +0,0 @@
-require_vector_vs;
-require_rv64;
-P_STRAIGHT_ULOOP(32, {
-  bool sat = false;
-  pd = (sat_sub<int32_t, uint32_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-}, {
-  bool sat = false;
-  pd = (sat_add<int32_t, uint32_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/ksub16.h b/riscv/insns/ksub16.h
deleted file mode 100644
index 57562b5..0000000
--- a/riscv/insns/ksub16.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_vector_vs;
-P_LOOP(16, {
-  bool sat = false;
-  pd = (sat_sub<int16_t, uint16_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/ksub32.h b/riscv/insns/ksub32.h
deleted file mode 100644
index 3ef32e8..0000000
--- a/riscv/insns/ksub32.h
+++ /dev/null
@@ -1,7 +0,0 @@
-require_vector_vs;
-require_rv64;
-P_LOOP(32, {
-  bool sat = false;
-  pd = (sat_sub<int32_t, uint32_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/ksub64.h b/riscv/insns/ksub64.h
deleted file mode 100644
index c6f0994..0000000
--- a/riscv/insns/ksub64.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_vector_vs;
-P_64_PROFILE({
-  bool sat = false;
-  rd = (sat_sub<int64_t, uint64_t>(rs1, rs2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/ksub8.h b/riscv/insns/ksub8.h
deleted file mode 100644
index 705f632..0000000
--- a/riscv/insns/ksub8.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_vector_vs;
-P_LOOP(8, {
-  bool sat = false;
-  pd = (sat_sub<int8_t, uint8_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/ksubh.h b/riscv/insns/ksubh.h
deleted file mode 100644
index 2455c16..0000000
--- a/riscv/insns/ksubh.h
+++ /dev/null
@@ -1,5 +0,0 @@
-require_vector_vs;
-require_extension(EXT_ZPN);
-sreg_t res = (sreg_t)P_SH(RS1, 0) - (sreg_t)P_SH(RS2, 0);
-P_SAT(res, 16);
-WRITE_RD(sext_xlen((int16_t)res));
diff --git a/riscv/insns/ksubw.h b/riscv/insns/ksubw.h
deleted file mode 100644
index 3a3d780..0000000
--- a/riscv/insns/ksubw.h
+++ /dev/null
@@ -1,5 +0,0 @@
-require_vector_vs;
-require_extension(EXT_ZPN);
-sreg_t res = (sreg_t)P_SW(RS1, 0) - (sreg_t)P_SW(RS2, 0);
-P_SAT(res, 32);
-WRITE_RD(sext32(res));
diff --git a/riscv/insns/kwmmul.h b/riscv/insns/kwmmul.h
deleted file mode 100644
index ca654f2..0000000
--- a/riscv/insns/kwmmul.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_vector_vs;
-P_LOOP(32, {
-  if ((INT32_MIN != ps1) | (INT32_MIN != ps2)) {
-    int64_t mres = ((int64_t) ps1 * (int64_t) ps2) << 1;
-    pd = mres >> 32;
-  } else {
-    pd = INT32_MAX;
-    P_SET_OV(1);
-  }
-})
diff --git a/riscv/insns/kwmmul_u.h b/riscv/insns/kwmmul_u.h
deleted file mode 100644
index b435561..0000000
--- a/riscv/insns/kwmmul_u.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_vector_vs;
-P_LOOP(32, {
-  if ((INT32_MIN != ps1) | (INT32_MIN != ps2)) {
-    int64_t mres = ((int64_t) ps1 * (int64_t) ps2) << 1;
-    pd = ((mres >> 31) + 1) >> 1;
-  } else {
-    pd = INT32_MAX;
-    P_SET_OV(1);
-  }
-})
diff --git a/riscv/insns/maddr32.h b/riscv/insns/maddr32.h
deleted file mode 100644
index 943aeac..0000000
--- a/riscv/insns/maddr32.h
+++ /dev/null
@@ -1,5 +0,0 @@
-require_extension(EXT_ZPN);
-reg_t mres = (reg_t)P_W(RS1, 0) * P_W(RS2, 0);
-reg_t rd = P_W(RD, 0);
-rd += mres;
-WRITE_RD(sext_xlen((int32_t)rd));
diff --git a/riscv/insns/max.h b/riscv/insns/max.h
index 073b8df..09f29f5 100644
--- a/riscv/insns/max.h
+++ b/riscv/insns/max.h
@@ -1,2 +1,2 @@
-require_either_extension(EXT_ZBPBO, EXT_ZBB);
+require_extension(EXT_ZBB);
 WRITE_RD(sext_xlen(sreg_t(RS1) > sreg_t(RS2) ? RS1 : RS2));
diff --git a/riscv/insns/min.h b/riscv/insns/min.h
index 47bc993..174e312 100644
--- a/riscv/insns/min.h
+++ b/riscv/insns/min.h
@@ -1,2 +1,2 @@
-require_either_extension(EXT_ZBPBO, EXT_ZBB);
+require_extension(EXT_ZBB);
 WRITE_RD(sext_xlen(sreg_t(RS1) < sreg_t(RS2) ? RS1 : RS2));
diff --git a/riscv/insns/msubr32.h b/riscv/insns/msubr32.h
deleted file mode 100644
index 2086bd1..0000000
--- a/riscv/insns/msubr32.h
+++ /dev/null
@@ -1,5 +0,0 @@
-require_extension(EXT_ZPN);
-reg_t mres = (reg_t)P_W(RS1, 0) * P_W(RS2, 0);
-reg_t rd = P_W(RD, 0);
-rd -= mres;
-WRITE_RD(sext_xlen((int32_t)rd));
diff --git a/riscv/insns/mulr64.h b/riscv/insns/mulr64.h
deleted file mode 100644
index 4e2aad7..0000000
--- a/riscv/insns/mulr64.h
+++ /dev/null
@@ -1,3 +0,0 @@
-require_extension(EXT_ZPSFOPERAND);
-reg_t rd = (reg_t)P_W(RS1, 0) * P_W(RS2, 0);
-P_64_PROFILE_END();
diff --git a/riscv/insns/mulsr64.h b/riscv/insns/mulsr64.h
deleted file mode 100644
index a2a5115..0000000
--- a/riscv/insns/mulsr64.h
+++ /dev/null
@@ -1,3 +0,0 @@
-require_extension(EXT_ZPSFOPERAND);
-sreg_t rd = (sreg_t)P_SW(RS1, 0) * P_SW(RS2, 0);
-P_64_PROFILE_END();
diff --git a/riscv/insns/pack.h b/riscv/insns/pack.h
index 0622b92..acc4987 100644
--- a/riscv/insns/pack.h
+++ b/riscv/insns/pack.h
@@ -1,6 +1,5 @@
 // RV32Zbb contains zext.h but not general pack
 require(((xlen == 32) && (insn.rs2() == 0) && p->extension_enabled(EXT_ZBB))
-  || p->extension_enabled(EXT_ZPN)
   || p->extension_enabled(EXT_ZBKB));
 reg_t lo = zext_xlen(RS1 << (xlen/2)) >> (xlen/2);
 reg_t hi = zext_xlen(RS2 << (xlen/2));
diff --git a/riscv/insns/packu.h b/riscv/insns/packu.h
deleted file mode 100644
index 0676429..0000000
--- a/riscv/insns/packu.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_extension(EXT_ZPN);
-reg_t lo = zext_xlen(RS1) >> (xlen/2);
-reg_t hi = zext_xlen(RS2) >> (xlen/2) << (xlen/2);
-WRITE_RD(sext_xlen(lo | hi));
diff --git a/riscv/insns/pbsad.h b/riscv/insns/pbsad.h
deleted file mode 100644
index 32789ef..0000000
--- a/riscv/insns/pbsad.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_REDUCTION_ULOOP(64, 8, false, false, {
-  pd_res += (ps1 > ps2 ? ps1 - ps2 : ps2 - ps1);
-})
diff --git a/riscv/insns/pbsada.h b/riscv/insns/pbsada.h
deleted file mode 100644
index cab988e..0000000
--- a/riscv/insns/pbsada.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_REDUCTION_ULOOP(64, 8, true, false, {
-  pd_res += (ps1 > ps2 ? ps1 - ps2 : ps2 - ps1);
-})
diff --git a/riscv/insns/pkbb16.h b/riscv/insns/pkbb16.h
deleted file mode 100644
index 20dcde6..0000000
--- a/riscv/insns/pkbb16.h
+++ /dev/null
@@ -1,2 +0,0 @@
-require_rv64;
-P_PK(16, 0, 0);
diff --git a/riscv/insns/pkbt16.h b/riscv/insns/pkbt16.h
deleted file mode 100644
index 8c51ab7..0000000
--- a/riscv/insns/pkbt16.h
+++ /dev/null
@@ -1 +0,0 @@
-P_PK(16, 0, 1);
diff --git a/riscv/insns/pkbt32.h b/riscv/insns/pkbt32.h
deleted file mode 100644
index 2783d98..0000000
--- a/riscv/insns/pkbt32.h
+++ /dev/null
@@ -1,2 +0,0 @@
-require_rv64;
-P_PK(32, 0, 1);
diff --git a/riscv/insns/pktb16.h b/riscv/insns/pktb16.h
deleted file mode 100644
index c49c1ed..0000000
--- a/riscv/insns/pktb16.h
+++ /dev/null
@@ -1 +0,0 @@
-P_PK(16, 1, 0);
diff --git a/riscv/insns/pktb32.h b/riscv/insns/pktb32.h
deleted file mode 100644
index 0a7e17f..0000000
--- a/riscv/insns/pktb32.h
+++ /dev/null
@@ -1,2 +0,0 @@
-require_rv64;
-P_PK(32, 1, 0);
diff --git a/riscv/insns/pktt16.h b/riscv/insns/pktt16.h
deleted file mode 100644
index b263ed4..0000000
--- a/riscv/insns/pktt16.h
+++ /dev/null
@@ -1,2 +0,0 @@
-require_rv64;
-P_PK(16, 1, 1);
diff --git a/riscv/insns/radd16.h b/riscv/insns/radd16.h
deleted file mode 100644
index 8f80050..0000000
--- a/riscv/insns/radd16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_LOOP(16, {
-  pd = (ps1 + ps2) >> 1;
-})
diff --git a/riscv/insns/radd32.h b/riscv/insns/radd32.h
deleted file mode 100644
index df50dd1..0000000
--- a/riscv/insns/radd32.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_rv64;
-P_LOOP(32, {
-  pd = ((int64_t)ps1 + ps2) >> 1;
-})
diff --git a/riscv/insns/radd64.h b/riscv/insns/radd64.h
deleted file mode 100644
index 110c472..0000000
--- a/riscv/insns/radd64.h
+++ /dev/null
@@ -1,8 +0,0 @@
-P_64_PROFILE({
-  rd = (rs1 + rs2) >> 1;
-  if (rs1 > 0 && rs2 > 0) {
-    rd &= ~((reg_t)1 << 63);
-  } else if (rs1 < 0 && rs2 < 0) {
-    rd |= ((reg_t)1 << 63);
-  }
-})
diff --git a/riscv/insns/radd8.h b/riscv/insns/radd8.h
deleted file mode 100644
index ad0b6ec..0000000
--- a/riscv/insns/radd8.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_LOOP(8, {
-  pd = (ps1 + ps2) >> 1;
-})
diff --git a/riscv/insns/raddw.h b/riscv/insns/raddw.h
deleted file mode 100644
index ec04bb6..0000000
--- a/riscv/insns/raddw.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_extension(EXT_ZPN);
-sreg_t res = (sreg_t)P_SW(RS1, 0) + (sreg_t)P_SW(RS2, 0);
-res >>= 1;
-WRITE_RD(sext_xlen(res));
diff --git a/riscv/insns/rcras16.h b/riscv/insns/rcras16.h
deleted file mode 100644
index 529c27f..0000000
--- a/riscv/insns/rcras16.h
+++ /dev/null
@@ -1,5 +0,0 @@
-P_CROSS_LOOP(16, {
-  pd = (ps1 + ps2) >> 1;
-}, {
-  pd = (ps1 - ps2) >> 1;
-})
diff --git a/riscv/insns/rcras32.h b/riscv/insns/rcras32.h
deleted file mode 100644
index 86a3f65..0000000
--- a/riscv/insns/rcras32.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_rv64;
-P_CROSS_LOOP(32, {
-  pd = ((int64_t)ps1 + ps2) >> 1;
-}, {
-  pd = ((int64_t)ps1 - ps2) >> 1;
-})
diff --git a/riscv/insns/rcrsa16.h b/riscv/insns/rcrsa16.h
deleted file mode 100644
index 156e32c..0000000
--- a/riscv/insns/rcrsa16.h
+++ /dev/null
@@ -1,5 +0,0 @@
-P_CROSS_LOOP(16, {
-  pd = (ps1 - ps2) >> 1;
-}, {
-  pd = (ps1 + ps2) >> 1;
-})
diff --git a/riscv/insns/rcrsa32.h b/riscv/insns/rcrsa32.h
deleted file mode 100644
index b45f31f..0000000
--- a/riscv/insns/rcrsa32.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_rv64;
-P_CROSS_LOOP(32, {
-  pd = ((uint64_t)ps1 - ps2) >> 1;
-}, {
-  pd = ((uint64_t)ps1 + ps2) >> 1;
-})
diff --git a/riscv/insns/rstas16.h b/riscv/insns/rstas16.h
deleted file mode 100644
index 298b591..0000000
--- a/riscv/insns/rstas16.h
+++ /dev/null
@@ -1,5 +0,0 @@
-P_STRAIGHT_LOOP(16, {
-  pd = (ps1 + ps2) >> 1;
-}, {
-  pd = (ps1 - ps2) >> 1;
-})
diff --git a/riscv/insns/rstas32.h b/riscv/insns/rstas32.h
deleted file mode 100644
index 9c8995a..0000000
--- a/riscv/insns/rstas32.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_rv64;
-P_STRAIGHT_LOOP(32, {
-  pd = ((int64_t)ps1 + ps2) >> 1;
-}, {
-  pd = ((int64_t)ps1 - ps2) >> 1;
-})
diff --git a/riscv/insns/rstsa16.h b/riscv/insns/rstsa16.h
deleted file mode 100644
index 443e4ce..0000000
--- a/riscv/insns/rstsa16.h
+++ /dev/null
@@ -1,5 +0,0 @@
-P_STRAIGHT_LOOP(16, {
-  pd = (ps1 - ps2) >> 1;
-}, {
-  pd = (ps1 + ps2) >> 1;
-})
diff --git a/riscv/insns/rstsa32.h b/riscv/insns/rstsa32.h
deleted file mode 100644
index a89fc6e..0000000
--- a/riscv/insns/rstsa32.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_rv64;
-P_STRAIGHT_LOOP(32, {
-  pd = ((int64_t)ps1 - ps2) >> 1;
-}, {
-  pd = ((int64_t)ps1 + ps2) >> 1;
-})
diff --git a/riscv/insns/rsub16.h b/riscv/insns/rsub16.h
deleted file mode 100644
index 768e067..0000000
--- a/riscv/insns/rsub16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_LOOP(16, {
-  pd = (ps1 - ps2) >> 1;
-})
diff --git a/riscv/insns/rsub32.h b/riscv/insns/rsub32.h
deleted file mode 100644
index 22c3119..0000000
--- a/riscv/insns/rsub32.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_rv64;
-P_LOOP(32, {
-  pd = ((int64_t)ps1 - ps2) >> 1;
-})
diff --git a/riscv/insns/rsub64.h b/riscv/insns/rsub64.h
deleted file mode 100644
index 2a58485..0000000
--- a/riscv/insns/rsub64.h
+++ /dev/null
@@ -1,8 +0,0 @@
-P_64_PROFILE({
-  rd = (rs1 - rs2) >> 1;
-  if (rs1 > 0 && rs2 < 0) {
-    rd &= ~((reg_t)1 << 63);
-  } else if (rs1 < 0 && rs2 > 0) {
-    rd |= ((reg_t)1 << 63);
-  }
-})
diff --git a/riscv/insns/rsub8.h b/riscv/insns/rsub8.h
deleted file mode 100644
index 9cf9c1a..0000000
--- a/riscv/insns/rsub8.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_LOOP(8, {
-  pd = (ps1 - ps2) >> 1;
-})
diff --git a/riscv/insns/rsubw.h b/riscv/insns/rsubw.h
deleted file mode 100644
index 01dec51..0000000
--- a/riscv/insns/rsubw.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_extension(EXT_ZPN);
-sreg_t res = (sreg_t)P_SW(RS1, 0) - (sreg_t)P_SW(RS2, 0);
-res >>= 1;
-WRITE_RD(sext_xlen(res));
diff --git a/riscv/insns/sclip16.h b/riscv/insns/sclip16.h
deleted file mode 100644
index d90ce19..0000000
--- a/riscv/insns/sclip16.h
+++ /dev/null
@@ -1,14 +0,0 @@
-require_vector_vs;
-P_I_LOOP(16, 4, {
-  int64_t int_max = INT64_MAX >> (64 - (imm4u + 1));
-  int64_t int_min = INT64_MIN >> (64 - (imm4u + 1));
-  pd = ps1;
-
-  if (ps1 > int_max) {
-    pd = int_max;
-    P_SET_OV(1);
-  } else if (ps1 < int_min) {
-    pd = int_min;
-    P_SET_OV(1);
-  }
-})
diff --git a/riscv/insns/sclip32.h b/riscv/insns/sclip32.h
deleted file mode 100644
index ff1ba28..0000000
--- a/riscv/insns/sclip32.h
+++ /dev/null
@@ -1,14 +0,0 @@
-require_vector_vs;
-P_I_LOOP(32, 5, {
-  int64_t int_max = INT64_MAX >> (64 - (imm5u + 1));
-  int64_t int_min = INT64_MIN >> (64 - (imm5u + 1));
-  pd = ps1;
-
-  if (ps1 > int_max) {
-    pd = int_max;
-    P_SET_OV(1);
-  } else if (ps1 < int_min) {
-    pd = int_min;
-    P_SET_OV(1);
-  }
-})
diff --git a/riscv/insns/sclip8.h b/riscv/insns/sclip8.h
deleted file mode 100644
index afd9c69..0000000
--- a/riscv/insns/sclip8.h
+++ /dev/null
@@ -1,14 +0,0 @@
-require_vector_vs;
-P_I_LOOP(8, 3, {
-  int64_t int_max = INT64_MAX >> (64 - (imm3u + 1));
-  int64_t int_min = INT64_MIN >> (64 - (imm3u + 1));
-  pd = ps1;
-
-  if (ps1 > int_max) {
-    pd = int_max;
-    P_SET_OV(1);
-  } else if (ps1 < int_min) {
-    pd = int_min;
-    P_SET_OV(1);
-  }
-})
diff --git a/riscv/insns/scmple16.h b/riscv/insns/scmple16.h
deleted file mode 100644
index 060c04c..0000000
--- a/riscv/insns/scmple16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_LOOP(16, {
-  pd = (ps1 <= ps2) ? -1 : 0;
-})
diff --git a/riscv/insns/scmple8.h b/riscv/insns/scmple8.h
deleted file mode 100644
index 8920c1f..0000000
--- a/riscv/insns/scmple8.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_LOOP(8, {
-  pd = (ps1 <= ps2) ? -1 : 0;
-})
diff --git a/riscv/insns/scmplt16.h b/riscv/insns/scmplt16.h
deleted file mode 100644
index db62f6f..0000000
--- a/riscv/insns/scmplt16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_LOOP(16, {
-  pd = (ps1 < ps2) ? -1 : 0;
-})
diff --git a/riscv/insns/scmplt8.h b/riscv/insns/scmplt8.h
deleted file mode 100644
index 7d07209..0000000
--- a/riscv/insns/scmplt8.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_LOOP(8, {
-  pd = (ps1 < ps2) ? -1 : 0;
-})
diff --git a/riscv/insns/sll16.h b/riscv/insns/sll16.h
deleted file mode 100644
index 9659f53..0000000
--- a/riscv/insns/sll16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_X_ULOOP(16, 4, {
-  pd = ps1 << sa;
-})
diff --git a/riscv/insns/sll32.h b/riscv/insns/sll32.h
deleted file mode 100644
index 8a05b39..0000000
--- a/riscv/insns/sll32.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_rv64;
-P_X_ULOOP(32, 5, {
-  pd = ps1 << sa;
-})
diff --git a/riscv/insns/sll8.h b/riscv/insns/sll8.h
deleted file mode 100644
index b7f069a..0000000
--- a/riscv/insns/sll8.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_X_ULOOP(8, 3, {
-  pd = ps1 << sa;
-})
diff --git a/riscv/insns/slli16.h b/riscv/insns/slli16.h
deleted file mode 100644
index 8d89a61..0000000
--- a/riscv/insns/slli16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_I_ULOOP(16, 4, {
-  pd = ps1 << imm4u;
-})
diff --git a/riscv/insns/slli32.h b/riscv/insns/slli32.h
deleted file mode 100644
index 71d880a..0000000
--- a/riscv/insns/slli32.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_rv64;
-P_I_ULOOP(32, 5, {
-  pd = ps1 << imm5u;
-})
diff --git a/riscv/insns/slli8.h b/riscv/insns/slli8.h
deleted file mode 100644
index c997496..0000000
--- a/riscv/insns/slli8.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_I_ULOOP(8, 3, {
-  pd = ps1 << imm3u;
-})
diff --git a/riscv/insns/smal.h b/riscv/insns/smal.h
deleted file mode 100644
index 09b818d..0000000
--- a/riscv/insns/smal.h
+++ /dev/null
@@ -1,11 +0,0 @@
-require_extension(EXT_ZPSFOPERAND);
-sreg_t res = 0;
-if (xlen == 32) {
-  res = RS1_PAIR;
-  res += sext_xlen(P_SH(RS2, 0) * P_SH(RS2, 1));
-  WRITE_RD_PAIR(res);
-} else {
-  res = sext_xlen(P_SH(RS2, 0) * P_SH(RS2, 1)) +
-        sext_xlen(P_SH(RS2, 2) * P_SH(RS2, 3)) + RS1;
-  WRITE_RD(res);
-}
diff --git a/riscv/insns/smalbb.h b/riscv/insns/smalbb.h
deleted file mode 100644
index 9a2e799..0000000
--- a/riscv/insns/smalbb.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_64_PROFILE_REDUCTION(32, {
-  rd += (sreg_t)P_SH(ps1, 0) * (sreg_t)P_SH(ps2, 0);
-})
diff --git a/riscv/insns/smalbt.h b/riscv/insns/smalbt.h
deleted file mode 100644
index 42cf71c..0000000
--- a/riscv/insns/smalbt.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_64_PROFILE_REDUCTION(32, {
-  rd += (sreg_t)P_SH(ps1, 0) * (sreg_t)P_SH(ps2, 1);
-})
diff --git a/riscv/insns/smalda.h b/riscv/insns/smalda.h
deleted file mode 100644
index 8c06793..0000000
--- a/riscv/insns/smalda.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_64_PROFILE_REDUCTION(16, {
-  rd += ps1 * ps2;
-})
diff --git a/riscv/insns/smaldrs.h b/riscv/insns/smaldrs.h
deleted file mode 100644
index 84e1769..0000000
--- a/riscv/insns/smaldrs.h
+++ /dev/null
@@ -1,7 +0,0 @@
-P_64_PROFILE_REDUCTION(16, {
-  if (i & 1) {
-    rd -= ps1 * ps2;
-  } else {
-    rd += ps1 * ps2;
-  }
-})
diff --git a/riscv/insns/smalds.h b/riscv/insns/smalds.h
deleted file mode 100644
index e3cfbd7..0000000
--- a/riscv/insns/smalds.h
+++ /dev/null
@@ -1,7 +0,0 @@
-P_64_PROFILE_REDUCTION(16, {
-  if (i & 1) {
-    rd += ps1 * ps2;
-  } else {
-    rd -= ps1 * ps2;
-  }
-})
diff --git a/riscv/insns/smaltt.h b/riscv/insns/smaltt.h
deleted file mode 100644
index 1e654a0..0000000
--- a/riscv/insns/smaltt.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_64_PROFILE_REDUCTION(32, {
-  rd += P_SH(ps1, 1) * P_SH(ps2, 1);
-})
diff --git a/riscv/insns/smalxda.h b/riscv/insns/smalxda.h
deleted file mode 100644
index 77675ee..0000000
--- a/riscv/insns/smalxda.h
+++ /dev/null
@@ -1,4 +0,0 @@
-P_64_PROFILE_REDUCTION(32, {
-  rd += (sreg_t)P_SH(ps1, 0) * (sreg_t)P_SH(ps2, 1);
-  rd += (sreg_t)P_SH(ps1, 1) * (sreg_t)P_SH(ps2, 0);
-})
diff --git a/riscv/insns/smalxds.h b/riscv/insns/smalxds.h
deleted file mode 100644
index 2ae7eb5..0000000
--- a/riscv/insns/smalxds.h
+++ /dev/null
@@ -1,4 +0,0 @@
-P_64_PROFILE_REDUCTION(32, {
-  rd += (sreg_t)P_SH(ps1, 1) * (sreg_t)P_SH(ps2, 0);
-  rd -= (sreg_t)P_SH(ps1, 0) * (sreg_t)P_SH(ps2, 1);
-})
diff --git a/riscv/insns/smaqa.h b/riscv/insns/smaqa.h
deleted file mode 100644
index 83dda84..0000000
--- a/riscv/insns/smaqa.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_REDUCTION_LOOP(32, 8, true, false, {
-  pd_res += ps1 * ps2;
-})
diff --git a/riscv/insns/smaqa_su.h b/riscv/insns/smaqa_su.h
deleted file mode 100644
index 4ee0eb7..0000000
--- a/riscv/insns/smaqa_su.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_REDUCTION_SULOOP(32, 8, true, false, {
-  pd_res += ps1 * ps2;
-})
diff --git a/riscv/insns/smar64.h b/riscv/insns/smar64.h
deleted file mode 100644
index 5c5da77..0000000
--- a/riscv/insns/smar64.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_64_PROFILE_REDUCTION(32, {
-  rd += ps1 * ps2;
-})
diff --git a/riscv/insns/smax16.h b/riscv/insns/smax16.h
deleted file mode 100644
index 083d63c..0000000
--- a/riscv/insns/smax16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_LOOP(16, {
-  pd = (ps1 > ps2) ? ps1 : ps2;
-})
diff --git a/riscv/insns/smax32.h b/riscv/insns/smax32.h
deleted file mode 100644
index 6563cfc..0000000
--- a/riscv/insns/smax32.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_LOOP(32, {
-  pd = (ps1 > ps2) ? ps1 : ps2;
-})
diff --git a/riscv/insns/smax8.h b/riscv/insns/smax8.h
deleted file mode 100644
index 773039e..0000000
--- a/riscv/insns/smax8.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_LOOP(8, {
-  pd = (ps1 > ps2) ? ps1 : ps2;
-})
diff --git a/riscv/insns/smbb16.h b/riscv/insns/smbb16.h
deleted file mode 100644
index 0813bfb..0000000
--- a/riscv/insns/smbb16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_LOOP(32, {
-  pd = P_SH(ps1, 0) * P_SH(ps2, 0);
-})
diff --git a/riscv/insns/smbt16.h b/riscv/insns/smbt16.h
deleted file mode 100644
index 953b3a6..0000000
--- a/riscv/insns/smbt16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_LOOP(32, {
-  pd = P_SH(ps1, 0) * P_SH(ps2, 1);
-})
diff --git a/riscv/insns/smbt32.h b/riscv/insns/smbt32.h
deleted file mode 100644
index 35059ad..0000000
--- a/riscv/insns/smbt32.h
+++ /dev/null
@@ -1,3 +0,0 @@
-require_rv64;
-require_extension(EXT_ZPN);
-WRITE_RD((sreg_t)P_SW(RS1, 0) * P_SW(RS2, 1));
diff --git a/riscv/insns/smdrs.h b/riscv/insns/smdrs.h
deleted file mode 100644
index 8f47f7d..0000000
--- a/riscv/insns/smdrs.h
+++ /dev/null
@@ -1,6 +0,0 @@
-P_REDUCTION_LOOP(32, 16, false, false, {
-  if (j & 1)
-    pd_res -= ps1 * ps2;
-  else
-    pd_res += ps1 * ps2;
-})
diff --git a/riscv/insns/smdrs32.h b/riscv/insns/smdrs32.h
deleted file mode 100644
index c397013..0000000
--- a/riscv/insns/smdrs32.h
+++ /dev/null
@@ -1,7 +0,0 @@
-require_rv64;
-require_extension(EXT_ZPN);
-
-sreg_t mres0 = (sreg_t)P_SW(RS1, 0) * P_SW(RS2, 0);
-sreg_t mres1 = (sreg_t)P_SW(RS1, 1) * P_SW(RS2, 1);
-
-WRITE_RD(mres0 - mres1);
diff --git a/riscv/insns/smds.h b/riscv/insns/smds.h
deleted file mode 100644
index 248679a..0000000
--- a/riscv/insns/smds.h
+++ /dev/null
@@ -1,6 +0,0 @@
-P_REDUCTION_LOOP(32, 16, false, false, {
-  if (j & 1)
-    pd_res += ps1 * ps2;
-  else
-    pd_res -= ps1 * ps2;
-})
diff --git a/riscv/insns/smds32.h b/riscv/insns/smds32.h
deleted file mode 100644
index e7fdeed..0000000
--- a/riscv/insns/smds32.h
+++ /dev/null
@@ -1,7 +0,0 @@
-require_rv64;
-require_extension(EXT_ZPN);
-
-sreg_t mres0 = (sreg_t)P_SW(RS1, 0) * P_SW(RS2, 0);
-sreg_t mres1 = (sreg_t)P_SW(RS1, 1) * P_SW(RS2, 1);
-
-WRITE_RD(mres1 - mres0);
diff --git a/riscv/insns/smin16.h b/riscv/insns/smin16.h
deleted file mode 100644
index afb1bb3..0000000
--- a/riscv/insns/smin16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_LOOP(16, {
-  pd = (ps1 < ps2) ? ps1 : ps2;
-})
diff --git a/riscv/insns/smin32.h b/riscv/insns/smin32.h
deleted file mode 100644
index 22847cb..0000000
--- a/riscv/insns/smin32.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_LOOP(32, {
-  pd = (ps1 < ps2) ? ps1 : ps2;
-})
diff --git a/riscv/insns/smin8.h b/riscv/insns/smin8.h
deleted file mode 100644
index 084e0e6..0000000
--- a/riscv/insns/smin8.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_LOOP(8, {
-  pd = (ps1 < ps2) ? ps1 : ps2;
-})
diff --git a/riscv/insns/smmul.h b/riscv/insns/smmul.h
deleted file mode 100644
index df0dd23..0000000
--- a/riscv/insns/smmul.h
+++ /dev/null
@@ -1,4 +0,0 @@
-P_LOOP(32, {
-  int64_t mres = (int64_t) ps1 * (int64_t) ps2;
-  pd = mres >> 32;
-})
diff --git a/riscv/insns/smmul_u.h b/riscv/insns/smmul_u.h
deleted file mode 100644
index 55fa617..0000000
--- a/riscv/insns/smmul_u.h
+++ /dev/null
@@ -1,4 +0,0 @@
-P_LOOP(32, {
-  int64_t mres = (int64_t) ps1 * (int64_t) ps2;
-  pd = ((mres >> 31) + 1) >> 1;
-})
diff --git a/riscv/insns/smmwb.h b/riscv/insns/smmwb.h
deleted file mode 100644
index f94aa9c..0000000
--- a/riscv/insns/smmwb.h
+++ /dev/null
@@ -1,4 +0,0 @@
-P_LOOP(32, {
-  int64_t mres = (int64_t) ps1 * (int16_t) P_H(ps2, 0);
-  pd = mres >> 16;
-})
diff --git a/riscv/insns/smmwb_u.h b/riscv/insns/smmwb_u.h
deleted file mode 100644
index 47c6e36..0000000
--- a/riscv/insns/smmwb_u.h
+++ /dev/null
@@ -1,4 +0,0 @@
-P_LOOP(32, {
-  int64_t mres = (int64_t) ps1 * (int16_t) P_H(ps2, 0);
-  pd = ((mres >> 15) + 1) >> 1;
-})
diff --git a/riscv/insns/smmwt.h b/riscv/insns/smmwt.h
deleted file mode 100644
index d8cf439..0000000
--- a/riscv/insns/smmwt.h
+++ /dev/null
@@ -1,4 +0,0 @@
-P_LOOP(32, {
-  int64_t mres = (int64_t) ps1 * (int16_t) P_H(ps2, 1);
-  pd = mres >> 16;
-})
diff --git a/riscv/insns/smmwt_u.h b/riscv/insns/smmwt_u.h
deleted file mode 100644
index 5c5a671..0000000
--- a/riscv/insns/smmwt_u.h
+++ /dev/null
@@ -1,4 +0,0 @@
-P_LOOP(32, {
-  int64_t mres = (int64_t) ps1 * (int16_t) P_H(ps2, 1);
-  pd = ((mres >> 15) + 1) >> 1;
-})
diff --git a/riscv/insns/smslda.h b/riscv/insns/smslda.h
deleted file mode 100644
index f838960..0000000
--- a/riscv/insns/smslda.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_64_PROFILE_REDUCTION(16, {
-  rd -= ps1 * ps2;
-})
diff --git a/riscv/insns/smslxda.h b/riscv/insns/smslxda.h
deleted file mode 100644
index 7e25f9b..0000000
--- a/riscv/insns/smslxda.h
+++ /dev/null
@@ -1,4 +0,0 @@
-P_64_PROFILE_REDUCTION(32, {
-  rd -= (sreg_t)P_SH(ps1, 1) * (sreg_t)P_SH(ps2, 0);
-  rd -= (sreg_t)P_SH(ps1, 0) * (sreg_t)P_SH(ps2, 1);
-})
diff --git a/riscv/insns/smsr64.h b/riscv/insns/smsr64.h
deleted file mode 100644
index a43559f..0000000
--- a/riscv/insns/smsr64.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_64_PROFILE_REDUCTION(32, {
-  rd -= ps1 * ps2;
-})
diff --git a/riscv/insns/smtt16.h b/riscv/insns/smtt16.h
deleted file mode 100644
index e19c50a..0000000
--- a/riscv/insns/smtt16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_LOOP(32, {
-  pd = P_SH(ps1, 1) * P_SH(ps2, 1);
-})
diff --git a/riscv/insns/smtt32.h b/riscv/insns/smtt32.h
deleted file mode 100644
index c7fd9e7..0000000
--- a/riscv/insns/smtt32.h
+++ /dev/null
@@ -1,3 +0,0 @@
-require_rv64;
-require_extension(EXT_ZPN);
-WRITE_RD((sreg_t)P_SW(RS1, 1) * P_SW(RS2, 1));
diff --git a/riscv/insns/smul16.h b/riscv/insns/smul16.h
deleted file mode 100644
index 7e0f08a..0000000
--- a/riscv/insns/smul16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_MUL_LOOP(16, {
-  pd = (int32_t)ps1 * (int32_t)ps2;
-})
diff --git a/riscv/insns/smul8.h b/riscv/insns/smul8.h
deleted file mode 100644
index a4a3ed9..0000000
--- a/riscv/insns/smul8.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_MUL_LOOP(8, {
-  pd = (int16_t)ps1 * (int16_t)ps2;
-})
diff --git a/riscv/insns/smulx16.h b/riscv/insns/smulx16.h
deleted file mode 100644
index 58e9a08..0000000
--- a/riscv/insns/smulx16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_MUL_CROSS_LOOP(16, {
-  pd = (int32_t)ps1 * (int32_t)ps2;
-})
diff --git a/riscv/insns/smulx8.h b/riscv/insns/smulx8.h
deleted file mode 100644
index 9270ce3..0000000
--- a/riscv/insns/smulx8.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_MUL_CROSS_LOOP(8, {
-  pd = (int16_t)ps1 * (int16_t)ps2;
-})
diff --git a/riscv/insns/smxds.h b/riscv/insns/smxds.h
deleted file mode 100644
index 845d01f..0000000
--- a/riscv/insns/smxds.h
+++ /dev/null
@@ -1,6 +0,0 @@
-P_REDUCTION_CROSS_LOOP(32, 16, false, false, {
-  if (j & 1)
-    pd_res += ps1 * ps2;
-  else
-    pd_res -= ps1 * ps2;
-})
diff --git a/riscv/insns/smxds32.h b/riscv/insns/smxds32.h
deleted file mode 100644
index 8eeedcf..0000000
--- a/riscv/insns/smxds32.h
+++ /dev/null
@@ -1,7 +0,0 @@
-require_rv64;
-require_extension(EXT_ZPN);
-
-sreg_t mres0 = (sreg_t)P_SW(RS1, 0) * P_SW(RS2, 1);
-sreg_t mres1 = (sreg_t)P_SW(RS1, 1) * P_SW(RS2, 0);
-
-WRITE_RD(mres1 - mres0);
diff --git a/riscv/insns/sra16.h b/riscv/insns/sra16.h
deleted file mode 100644
index 84a40fb..0000000
--- a/riscv/insns/sra16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_X_LOOP(16, 4, {
-  pd = ps1 >> sa;
-})
diff --git a/riscv/insns/sra16_u.h b/riscv/insns/sra16_u.h
deleted file mode 100644
index 6fcc398..0000000
--- a/riscv/insns/sra16_u.h
+++ /dev/null
@@ -1,6 +0,0 @@
-P_X_LOOP(16, 4, {
-  if (sa > 0)
-    pd = ((ps1 >> (sa - 1)) + 1) >> 1;
-  else
-    pd = ps1;
-})
diff --git a/riscv/insns/sra32.h b/riscv/insns/sra32.h
deleted file mode 100644
index 8b192e0..0000000
--- a/riscv/insns/sra32.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_rv64;
-P_X_LOOP(32, 5, {
-  pd = ps1 >> sa;
-})
diff --git a/riscv/insns/sra32_u.h b/riscv/insns/sra32_u.h
deleted file mode 100644
index 1a4488c..0000000
--- a/riscv/insns/sra32_u.h
+++ /dev/null
@@ -1,7 +0,0 @@
-require_rv64;
-P_X_LOOP(32, 5, {
-  if (sa > 0)
-    pd = (((uint64_t)(ps1 >> (sa - 1))) + 1) >> 1;
-  else
-    pd = ps1;
-})
diff --git a/riscv/insns/sra8.h b/riscv/insns/sra8.h
deleted file mode 100644
index de1bd64..0000000
--- a/riscv/insns/sra8.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_X_LOOP(8, 3, {
-  pd = ps1 >> sa;
-})
diff --git a/riscv/insns/sra8_u.h b/riscv/insns/sra8_u.h
deleted file mode 100644
index 1f47623..0000000
--- a/riscv/insns/sra8_u.h
+++ /dev/null
@@ -1,6 +0,0 @@
-P_X_LOOP(8, 3, {
-  if (sa > 0)
-    pd = ((ps1 >> (sa - 1)) + 1) >> 1;
-  else
-    pd = ps1;
-})
diff --git a/riscv/insns/sra_u.h b/riscv/insns/sra_u.h
deleted file mode 100644
index d7c395b..0000000
--- a/riscv/insns/sra_u.h
+++ /dev/null
@@ -1,9 +0,0 @@
-require_extension(EXT_ZPN);
-sreg_t rs1 = sext_xlen(RS1);
-reg_t sa = get_field(RS2, make_mask64(0, xlen == 32 ? 5 : 6));
-
-if (sa > 0) {
-  WRITE_RD(sext_xlen(((rs1 >> (sa - 1)) + 1) >> 1));
-} else {
-  WRITE_RD(sext_xlen(rs1));
-}
diff --git a/riscv/insns/srai16.h b/riscv/insns/srai16.h
deleted file mode 100644
index 63f9807..0000000
--- a/riscv/insns/srai16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_I_LOOP(16, 4, {
-  pd = ps1 >> imm4u;
-})
diff --git a/riscv/insns/srai16_u.h b/riscv/insns/srai16_u.h
deleted file mode 100644
index d783581..0000000
--- a/riscv/insns/srai16_u.h
+++ /dev/null
@@ -1,6 +0,0 @@
-P_I_LOOP(16, 4, {
-  if (imm4u > 0)
-    pd = ((ps1 >> (imm4u - 1)) + 1) >> 1;
-  else
-    pd = ps1;
-})
diff --git a/riscv/insns/srai32.h b/riscv/insns/srai32.h
deleted file mode 100644
index 9058ba9..0000000
--- a/riscv/insns/srai32.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_rv64;
-P_I_LOOP(32, 5, {
-  pd = ps1 >> imm5u;
-})
diff --git a/riscv/insns/srai32_u.h b/riscv/insns/srai32_u.h
deleted file mode 100644
index a5fe4d3..0000000
--- a/riscv/insns/srai32_u.h
+++ /dev/null
@@ -1,7 +0,0 @@
-require_rv64;
-P_I_LOOP(32, 5, {
-  if (imm5u > 0)
-    pd = (((uint64_t)(ps1 >> (imm5u - 1))) + 1) >> 1;
-  else
-    pd = ps1;
-})
diff --git a/riscv/insns/srai8.h b/riscv/insns/srai8.h
deleted file mode 100644
index 0141933..0000000
--- a/riscv/insns/srai8.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_I_LOOP(8, 3, {
-  pd = ps1 >> imm3u;
-})
diff --git a/riscv/insns/srai8_u.h b/riscv/insns/srai8_u.h
deleted file mode 100644
index be7bfaf..0000000
--- a/riscv/insns/srai8_u.h
+++ /dev/null
@@ -1,6 +0,0 @@
-P_I_LOOP(8, 3, {
-  if (imm3u > 0)
-    pd = ((ps1 >> (imm3u - 1)) + 1) >> 1;
-  else
-    pd = ps1;
-})
diff --git a/riscv/insns/srai_u.h b/riscv/insns/srai_u.h
deleted file mode 100644
index f170083..0000000
--- a/riscv/insns/srai_u.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_extension(EXT_ZPN);
-sreg_t rs1 = sext_xlen(RS1);
-reg_t sa = insn.p_imm6();
-require(sa < (unsigned long)xlen); // imm[5] == 1 is illegal on rv32
-
-if (sa > 0) {
-  WRITE_RD(sext_xlen(((rs1 >> (sa - 1)) + 1) >> 1));
-} else {
-  WRITE_RD(sext_xlen(rs1));
-}
diff --git a/riscv/insns/sraiw_u.h b/riscv/insns/sraiw_u.h
deleted file mode 100644
index 3559d7f..0000000
--- a/riscv/insns/sraiw_u.h
+++ /dev/null
@@ -1,9 +0,0 @@
-require_rv64;
-require_extension(EXT_ZPN);
-
-reg_t sa = insn.p_imm5();
-if (sa != 0) {
-  WRITE_RD(sext32(((P_SW(RS1, 0) >> (sa - 1)) + 1) >> 1));
-} else {
-  WRITE_RD(sext32(P_SW(RS1, 0)));
-}
diff --git a/riscv/insns/srl16.h b/riscv/insns/srl16.h
deleted file mode 100644
index 35f9cec..0000000
--- a/riscv/insns/srl16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_X_ULOOP(16, 4, {
-  pd = ps1 >> sa;
-})
diff --git a/riscv/insns/srl16_u.h b/riscv/insns/srl16_u.h
deleted file mode 100644
index 17d1bc0..0000000
--- a/riscv/insns/srl16_u.h
+++ /dev/null
@@ -1,7 +0,0 @@
-P_X_ULOOP(16, 4, {
-  if (sa > 0) {
-    pd = ((ps1 >> (sa - 1)) + 1) >> 1;
-  } else {
-    pd = ps1;
-  }
-})
diff --git a/riscv/insns/srl32.h b/riscv/insns/srl32.h
deleted file mode 100644
index 2ad116c..0000000
--- a/riscv/insns/srl32.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_rv64;
-P_X_ULOOP(32, 5, {
-  pd = ps1 >> sa;
-})
diff --git a/riscv/insns/srl32_u.h b/riscv/insns/srl32_u.h
deleted file mode 100644
index d637546..0000000
--- a/riscv/insns/srl32_u.h
+++ /dev/null
@@ -1,8 +0,0 @@
-require_rv64;
-P_X_ULOOP(32, 5, {
-  if (sa > 0) {
-    pd = (((uint64_t)(ps1 >> (sa - 1))) + 1) >> 1;
-  } else {
-    pd = ps1;
-  }
-})
diff --git a/riscv/insns/srl8.h b/riscv/insns/srl8.h
deleted file mode 100644
index f7d74a9..0000000
--- a/riscv/insns/srl8.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_X_ULOOP(8, 3, {
-  pd = ps1 >> sa;
-})
diff --git a/riscv/insns/srl8_u.h b/riscv/insns/srl8_u.h
deleted file mode 100644
index 26415a5..0000000
--- a/riscv/insns/srl8_u.h
+++ /dev/null
@@ -1,7 +0,0 @@
-P_X_ULOOP(8, 3, {
-  if (sa > 0) {
-    pd = ((ps1 >> (sa - 1)) + 1) >> 1;
-  } else {
-    pd = ps1;
-  }
-})
diff --git a/riscv/insns/srli16.h b/riscv/insns/srli16.h
deleted file mode 100644
index cbd685f..0000000
--- a/riscv/insns/srli16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_I_ULOOP(16, 4, {
-  pd = ps1 >> imm4u;
-})
diff --git a/riscv/insns/srli16_u.h b/riscv/insns/srli16_u.h
deleted file mode 100644
index 2ba533a..0000000
--- a/riscv/insns/srli16_u.h
+++ /dev/null
@@ -1,7 +0,0 @@
-P_I_ULOOP(16, 4, {
-  if (imm4u > 0) {
-    pd = ((ps1 >> (imm4u - 1)) + 1) >> 1;
-  } else {
-    pd = ps1;
-  }
-})
diff --git a/riscv/insns/srli32.h b/riscv/insns/srli32.h
deleted file mode 100644
index f3d53af..0000000
--- a/riscv/insns/srli32.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_rv64;
-P_I_ULOOP(32, 5, {
-  pd = ps1 >> imm5u;
-})
diff --git a/riscv/insns/srli32_u.h b/riscv/insns/srli32_u.h
deleted file mode 100644
index 6d2327f..0000000
--- a/riscv/insns/srli32_u.h
+++ /dev/null
@@ -1,8 +0,0 @@
-require_rv64;
-P_I_ULOOP(32, 5, {
-  if (imm5u > 0) {
-    pd = (((uint64_t)(ps1 >> (imm5u - 1))) + 1) >> 1;
-  } else {
-    pd = ps1;
-  }
-})
diff --git a/riscv/insns/srli8.h b/riscv/insns/srli8.h
deleted file mode 100644
index 103f0ed..0000000
--- a/riscv/insns/srli8.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_I_ULOOP(8, 3, {
-  pd = ps1 >> imm3u;
-})
diff --git a/riscv/insns/srli8_u.h b/riscv/insns/srli8_u.h
deleted file mode 100644
index 9fa7f8c..0000000
--- a/riscv/insns/srli8_u.h
+++ /dev/null
@@ -1,7 +0,0 @@
-P_I_ULOOP(8, 3, {
-  if (imm3u > 0) {
-    pd = ((ps1 >> (imm3u - 1)) + 1) >> 1;
-  } else {
-    pd = ps1;
-  }
-})
diff --git a/riscv/insns/stas16.h b/riscv/insns/stas16.h
deleted file mode 100644
index 949e5c8..0000000
--- a/riscv/insns/stas16.h
+++ /dev/null
@@ -1,5 +0,0 @@
-P_STRAIGHT_LOOP(16, {
-  pd = ps1 + ps2;
-}, {
-  pd = ps1 - ps2;
-})
diff --git a/riscv/insns/stas32.h b/riscv/insns/stas32.h
deleted file mode 100644
index 2009a69..0000000
--- a/riscv/insns/stas32.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_rv64;
-P_STRAIGHT_LOOP(32, {
-  pd = ps1 + ps2;
-}, {
-  pd = ps1 - ps2;
-})
diff --git a/riscv/insns/stsa16.h b/riscv/insns/stsa16.h
deleted file mode 100644
index 7e4371d..0000000
--- a/riscv/insns/stsa16.h
+++ /dev/null
@@ -1,5 +0,0 @@
-P_STRAIGHT_LOOP(16, {
-  pd = ps1 - ps2;
-}, {
-  pd = ps1 + ps2;
-})
diff --git a/riscv/insns/stsa32.h b/riscv/insns/stsa32.h
deleted file mode 100644
index e2d81b7..0000000
--- a/riscv/insns/stsa32.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_rv64;
-P_STRAIGHT_LOOP(32, {
-  pd = ps1 - ps2;
-}, {
-  pd = ps1 + ps2;
-})
diff --git a/riscv/insns/sub16.h b/riscv/insns/sub16.h
deleted file mode 100644
index 5d36aaf..0000000
--- a/riscv/insns/sub16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_LOOP(16, {
-  pd = ps1 - ps2;
-})
diff --git a/riscv/insns/sub32.h b/riscv/insns/sub32.h
deleted file mode 100644
index 70bbc53..0000000
--- a/riscv/insns/sub32.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_rv64;
-P_LOOP(32, {
-  pd = ps1 - ps2;
-})
diff --git a/riscv/insns/sub64.h b/riscv/insns/sub64.h
deleted file mode 100644
index d977526..0000000
--- a/riscv/insns/sub64.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_64_PROFILE({
-  rd = rs1 - rs2;
-})
diff --git a/riscv/insns/sub8.h b/riscv/insns/sub8.h
deleted file mode 100644
index 7f13d61..0000000
--- a/riscv/insns/sub8.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_LOOP(8, {
-  pd = ps1 - ps2;
-})
diff --git a/riscv/insns/sunpkd810.h b/riscv/insns/sunpkd810.h
deleted file mode 100644
index 2a2f7c3..0000000
--- a/riscv/insns/sunpkd810.h
+++ /dev/null
@@ -1 +0,0 @@
-P_SUNPKD8(1, 0)
diff --git a/riscv/insns/sunpkd820.h b/riscv/insns/sunpkd820.h
deleted file mode 100644
index 84d5248..0000000
--- a/riscv/insns/sunpkd820.h
+++ /dev/null
@@ -1 +0,0 @@
-P_SUNPKD8(2, 0)
diff --git a/riscv/insns/sunpkd830.h b/riscv/insns/sunpkd830.h
deleted file mode 100644
index 8817907..0000000
--- a/riscv/insns/sunpkd830.h
+++ /dev/null
@@ -1 +0,0 @@
-P_SUNPKD8(3, 0)
diff --git a/riscv/insns/sunpkd831.h b/riscv/insns/sunpkd831.h
deleted file mode 100644
index 98ed748..0000000
--- a/riscv/insns/sunpkd831.h
+++ /dev/null
@@ -1 +0,0 @@
-P_SUNPKD8(3, 1)
diff --git a/riscv/insns/sunpkd832.h b/riscv/insns/sunpkd832.h
deleted file mode 100644
index b0ac29f..0000000
--- a/riscv/insns/sunpkd832.h
+++ /dev/null
@@ -1 +0,0 @@
-P_SUNPKD8(3, 2)
diff --git a/riscv/insns/uclip16.h b/riscv/insns/uclip16.h
deleted file mode 100644
index 4cc2519..0000000
--- a/riscv/insns/uclip16.h
+++ /dev/null
@@ -1,13 +0,0 @@
-require_vector_vs;
-P_I_LOOP(16, 4, {
-  int64_t uint_max = imm4u ? UINT64_MAX >> (64 - imm4u) : 0;
-  pd = ps1;
-
-  if (ps1 > uint_max) {
-    pd = uint_max;
-    P_SET_OV(1);
-  } else if (ps1 < 0) {
-    pd = 0;
-    P_SET_OV(1);
-  }
-})
diff --git a/riscv/insns/uclip32.h b/riscv/insns/uclip32.h
deleted file mode 100644
index d347650..0000000
--- a/riscv/insns/uclip32.h
+++ /dev/null
@@ -1,13 +0,0 @@
-require_vector_vs;
-P_I_LOOP(32, 5, {
-  int64_t uint_max = imm5u ? UINT64_MAX >> (64 - imm5u) : 0;
-  pd = ps1;
-
-  if (ps1 > uint_max) {
-    pd = uint_max;
-    P_SET_OV(1);
-  } else if (ps1 < 0) {
-    pd = 0;
-    P_SET_OV(1);
-  }
-})
diff --git a/riscv/insns/uclip8.h b/riscv/insns/uclip8.h
deleted file mode 100644
index b8a95c0..0000000
--- a/riscv/insns/uclip8.h
+++ /dev/null
@@ -1,13 +0,0 @@
-require_vector_vs;
-P_I_LOOP(8, 3, {
-  int64_t uint_max = imm3u ? UINT64_MAX >> (64 - imm3u) : 0;
-  pd = ps1;
-
-  if (ps1 > uint_max) {
-    pd = uint_max;
-    P_SET_OV(1);
-  } else if (ps1 < 0) {
-    pd = 0;
-    P_SET_OV(1);
-  }
-})
diff --git a/riscv/insns/ucmple16.h b/riscv/insns/ucmple16.h
deleted file mode 100644
index fe2b93f..0000000
--- a/riscv/insns/ucmple16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_ULOOP(16, {
-  pd = (ps1 <= ps2) ? -1 : 0;
-})
diff --git a/riscv/insns/ucmple8.h b/riscv/insns/ucmple8.h
deleted file mode 100644
index bd44cb0..0000000
--- a/riscv/insns/ucmple8.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_ULOOP(8, {
-  pd = (ps1 <= ps2) ? -1 : 0;
-})
diff --git a/riscv/insns/ucmplt16.h b/riscv/insns/ucmplt16.h
deleted file mode 100644
index fa7512c..0000000
--- a/riscv/insns/ucmplt16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_ULOOP(16, {
-  pd = (ps1 < ps2) ? -1 : 0;
-})
diff --git a/riscv/insns/ucmplt8.h b/riscv/insns/ucmplt8.h
deleted file mode 100644
index 6fa85b1..0000000
--- a/riscv/insns/ucmplt8.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_ULOOP(8, {
-  pd = (ps1 < ps2) ? -1 : 0;
-})
diff --git a/riscv/insns/ukadd16.h b/riscv/insns/ukadd16.h
deleted file mode 100644
index 680b5b6..0000000
--- a/riscv/insns/ukadd16.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_vector_vs;
-P_ULOOP(16, {
-  bool sat = false;
-  pd = (sat_addu<uint16_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/ukadd32.h b/riscv/insns/ukadd32.h
deleted file mode 100644
index dd836c1..0000000
--- a/riscv/insns/ukadd32.h
+++ /dev/null
@@ -1,7 +0,0 @@
-require_vector_vs;
-require_rv64;
-P_ULOOP(32, {
-  bool sat = false;
-  pd = (sat_addu<uint32_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/ukadd64.h b/riscv/insns/ukadd64.h
deleted file mode 100644
index d7e98f3..0000000
--- a/riscv/insns/ukadd64.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_vector_vs;
-P_64_UPROFILE({
-  bool sat = false;
-  rd = (sat_addu<uint64_t>(rs1, rs2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/ukadd8.h b/riscv/insns/ukadd8.h
deleted file mode 100644
index 4bcada2..0000000
--- a/riscv/insns/ukadd8.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_vector_vs;
-P_ULOOP(8, {
-  bool sat = false;
-  pd = (sat_addu<uint8_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/ukaddh.h b/riscv/insns/ukaddh.h
deleted file mode 100644
index 30c970a..0000000
--- a/riscv/insns/ukaddh.h
+++ /dev/null
@@ -1,5 +0,0 @@
-require_vector_vs;
-require_extension(EXT_ZPN);
-sreg_t res = (sreg_t)P_H(RS1, 0) + (sreg_t)P_H(RS2, 0);
-P_SATU(res, 16);
-WRITE_RD(sext_xlen((int16_t)res));
diff --git a/riscv/insns/ukaddw.h b/riscv/insns/ukaddw.h
deleted file mode 100644
index 5d4d91e..0000000
--- a/riscv/insns/ukaddw.h
+++ /dev/null
@@ -1,5 +0,0 @@
-require_vector_vs;
-require_extension(EXT_ZPN);
-sreg_t res = (sreg_t)P_W(RS1, 0) + (sreg_t)P_W(RS2, 0);
-P_SATU(res, 32);
-WRITE_RD(sext32(res));
diff --git a/riscv/insns/ukcras16.h b/riscv/insns/ukcras16.h
deleted file mode 100644
index 54b9a10..0000000
--- a/riscv/insns/ukcras16.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_vector_vs;
-P_CROSS_ULOOP(16, {
-  bool sat = false;
-  pd = (sat_addu<uint16_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-}, {
-  bool sat = false;
-  pd = (sat_subu<uint16_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/ukcras32.h b/riscv/insns/ukcras32.h
deleted file mode 100644
index 001644c..0000000
--- a/riscv/insns/ukcras32.h
+++ /dev/null
@@ -1,11 +0,0 @@
-require_vector_vs;
-require_rv64;
-P_CROSS_ULOOP(32, {
-  bool sat = false;
-  pd = (sat_addu<uint32_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-}, {
-  bool sat = false;
-  pd = (sat_subu<uint32_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/ukcrsa16.h b/riscv/insns/ukcrsa16.h
deleted file mode 100644
index 343063c..0000000
--- a/riscv/insns/ukcrsa16.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_vector_vs;
-P_CROSS_ULOOP(16, {
-  bool sat = false;
-  pd = (sat_subu<uint16_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-}, {
-  bool sat = false;
-  pd = (sat_addu<uint16_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/ukcrsa32.h b/riscv/insns/ukcrsa32.h
deleted file mode 100644
index 260f181..0000000
--- a/riscv/insns/ukcrsa32.h
+++ /dev/null
@@ -1,11 +0,0 @@
-require_vector_vs;
-require_rv64;
-P_CROSS_ULOOP(32, {
-  bool sat = false;
-  pd = (sat_subu<uint32_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-}, {
-  bool sat = false;
-  pd = (sat_addu<uint32_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/ukmar64.h b/riscv/insns/ukmar64.h
deleted file mode 100644
index e33ad7d..0000000
--- a/riscv/insns/ukmar64.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_vector_vs;
-P_64_UPROFILE_REDUCTION(32, {
-  bool sat = false;
-  rd = (sat_addu<uint64_t>(rd, ps1 * ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/ukmsr64.h b/riscv/insns/ukmsr64.h
deleted file mode 100644
index 9a38cb0..0000000
--- a/riscv/insns/ukmsr64.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_vector_vs;
-P_64_UPROFILE_REDUCTION(32, {
-  bool sat = false;
-  rd = (sat_subu<uint64_t>(rd, ps1 * ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/ukstas16.h b/riscv/insns/ukstas16.h
deleted file mode 100644
index a8203e4..0000000
--- a/riscv/insns/ukstas16.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_vector_vs;
-P_STRAIGHT_ULOOP(16, {
-  bool sat = false;
-  pd = (sat_addu<uint16_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-}, {
-  bool sat = false;
-  pd = (sat_subu<uint16_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/ukstas32.h b/riscv/insns/ukstas32.h
deleted file mode 100644
index c734eb6..0000000
--- a/riscv/insns/ukstas32.h
+++ /dev/null
@@ -1,11 +0,0 @@
-require_vector_vs;
-require_rv64;
-P_STRAIGHT_ULOOP(32, {
-  bool sat = false;
-  pd = (sat_addu<uint32_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-}, {
-  bool sat = false;
-  pd = (sat_subu<uint32_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/ukstsa16.h b/riscv/insns/ukstsa16.h
deleted file mode 100644
index 8145111..0000000
--- a/riscv/insns/ukstsa16.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_vector_vs;
-P_STRAIGHT_ULOOP(16, {
-  bool sat = false;
-  pd = (sat_subu<uint16_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-}, {
-  bool sat = false;
-  pd = (sat_addu<uint16_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/ukstsa32.h b/riscv/insns/ukstsa32.h
deleted file mode 100644
index 9eb713e..0000000
--- a/riscv/insns/ukstsa32.h
+++ /dev/null
@@ -1,11 +0,0 @@
-require_vector_vs;
-require_rv64;
-P_STRAIGHT_ULOOP(32, {
-  bool sat = false;
-  pd = (sat_subu<uint32_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-}, {
-  bool sat = false;
-  pd = (sat_addu<uint32_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/uksub16.h b/riscv/insns/uksub16.h
deleted file mode 100644
index 7fba16e..0000000
--- a/riscv/insns/uksub16.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_vector_vs;
-P_ULOOP(16, {
-  bool sat = false;
-  pd = (sat_subu<uint16_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/uksub32.h b/riscv/insns/uksub32.h
deleted file mode 100644
index 3d4913b..0000000
--- a/riscv/insns/uksub32.h
+++ /dev/null
@@ -1,7 +0,0 @@
-require_vector_vs;
-require_rv64;
-P_ULOOP(32, {
-  bool sat = false;
-  pd = (sat_subu<uint32_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/uksub64.h b/riscv/insns/uksub64.h
deleted file mode 100644
index 0d2bb05..0000000
--- a/riscv/insns/uksub64.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_vector_vs;
-P_64_UPROFILE({
-  bool sat = false;
-  rd = (sat_subu<uint64_t>(rs1, rs2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/uksub8.h b/riscv/insns/uksub8.h
deleted file mode 100644
index f26621e..0000000
--- a/riscv/insns/uksub8.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_vector_vs;
-P_ULOOP(8, {
-  bool sat = false;
-  pd = (sat_subu<uint8_t>(ps1, ps2, sat));
-  P_SET_OV(sat);
-})
diff --git a/riscv/insns/uksubh.h b/riscv/insns/uksubh.h
deleted file mode 100644
index ac23989..0000000
--- a/riscv/insns/uksubh.h
+++ /dev/null
@@ -1,5 +0,0 @@
-require_vector_vs;
-require_extension(EXT_ZPN);
-sreg_t res = (sreg_t)P_H(RS1, 0) - (sreg_t)P_H(RS2, 0);
-P_SATU(res, 16);
-WRITE_RD(sext_xlen((int16_t)res));
diff --git a/riscv/insns/uksubw.h b/riscv/insns/uksubw.h
deleted file mode 100644
index 41a32e7..0000000
--- a/riscv/insns/uksubw.h
+++ /dev/null
@@ -1,5 +0,0 @@
-require_vector_vs;
-require_extension(EXT_ZPN);
-sreg_t res = (sreg_t)P_W(RS1, 0) - (sreg_t)P_W(RS2, 0);
-P_SATU(res, 32);
-WRITE_RD(sext32(res));
diff --git a/riscv/insns/umaqa.h b/riscv/insns/umaqa.h
deleted file mode 100644
index 474b174..0000000
--- a/riscv/insns/umaqa.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_REDUCTION_ULOOP(32, 8, true, false, {
-  pd_res += ps1 * ps2;
-})
diff --git a/riscv/insns/umar64.h b/riscv/insns/umar64.h
deleted file mode 100644
index 0a8a352..0000000
--- a/riscv/insns/umar64.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_64_UPROFILE_REDUCTION(32, {
-  rd += ps1 * ps2;
-})
diff --git a/riscv/insns/umax16.h b/riscv/insns/umax16.h
deleted file mode 100644
index e60ed4a..0000000
--- a/riscv/insns/umax16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_ULOOP(16, {
-  pd = (ps1 > ps2) ? ps1 : ps2;
-})
diff --git a/riscv/insns/umax32.h b/riscv/insns/umax32.h
deleted file mode 100644
index 6156345..0000000
--- a/riscv/insns/umax32.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_rv64;
-P_ULOOP(32, {
-  pd = (ps1 > ps2) ? ps1 : ps2;
-})
diff --git a/riscv/insns/umax8.h b/riscv/insns/umax8.h
deleted file mode 100644
index 8a575a6..0000000
--- a/riscv/insns/umax8.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_ULOOP(8, {
-  pd = (ps1 > ps2) ? ps1 : ps2;
-})
diff --git a/riscv/insns/umin16.h b/riscv/insns/umin16.h
deleted file mode 100644
index d414211..0000000
--- a/riscv/insns/umin16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_ULOOP(16, {
-  pd = (ps1 < ps2) ? ps1 : ps2;
-})
diff --git a/riscv/insns/umin32.h b/riscv/insns/umin32.h
deleted file mode 100644
index 9669945..0000000
--- a/riscv/insns/umin32.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_rv64;
-P_ULOOP(32, {
-  pd = (ps1 < ps2) ? ps1 : ps2;
-})
diff --git a/riscv/insns/umin8.h b/riscv/insns/umin8.h
deleted file mode 100644
index bea8ccd..0000000
--- a/riscv/insns/umin8.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_ULOOP(8, {
-  pd = (ps1 < ps2) ? ps1 : ps2;
-})
diff --git a/riscv/insns/umsr64.h b/riscv/insns/umsr64.h
deleted file mode 100644
index 0e186d9..0000000
--- a/riscv/insns/umsr64.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_64_UPROFILE_REDUCTION(32, {
-  rd -= ps1 * ps2;
-})
diff --git a/riscv/insns/umul16.h b/riscv/insns/umul16.h
deleted file mode 100644
index 09b839c..0000000
--- a/riscv/insns/umul16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_MUL_ULOOP(16, {
-  pd = (uint32_t)ps1 * (uint32_t)ps2;
-})
diff --git a/riscv/insns/umul8.h b/riscv/insns/umul8.h
deleted file mode 100644
index 29cae88..0000000
--- a/riscv/insns/umul8.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_MUL_ULOOP(8, {
-  pd = (uint16_t)ps1 * (uint16_t)ps2;
-})
diff --git a/riscv/insns/umulx16.h b/riscv/insns/umulx16.h
deleted file mode 100644
index 3f0cce8..0000000
--- a/riscv/insns/umulx16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_MUL_CROSS_ULOOP(16, {
-  pd = (uint32_t)ps1 * (uint32_t)ps2;
-})
diff --git a/riscv/insns/umulx8.h b/riscv/insns/umulx8.h
deleted file mode 100644
index 848b5d5..0000000
--- a/riscv/insns/umulx8.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_MUL_CROSS_ULOOP(8, {
-  pd = (uint16_t)ps1 * (uint16_t)ps2;
-})
diff --git a/riscv/insns/uradd16.h b/riscv/insns/uradd16.h
deleted file mode 100644
index 29610bf..0000000
--- a/riscv/insns/uradd16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_ULOOP(16, {
-  pd = (ps1 + ps2) >> 1;
-})
diff --git a/riscv/insns/uradd32.h b/riscv/insns/uradd32.h
deleted file mode 100644
index 4f791d9..0000000
--- a/riscv/insns/uradd32.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_rv64;
-P_ULOOP(32, {
-  pd = ((uint64_t)ps1 + ps2) >> 1;
-})
diff --git a/riscv/insns/uradd64.h b/riscv/insns/uradd64.h
deleted file mode 100644
index f6787e1..0000000
--- a/riscv/insns/uradd64.h
+++ /dev/null
@@ -1,9 +0,0 @@
-P_64_UPROFILE({
-  rd = rs1 + rs2;
-  if (rd < rs1) {
-    rd >>= 1;
-    rd |= ((reg_t)1 << 63);
-  } else {
-    rd >>= 1;
-  }
-})
diff --git a/riscv/insns/uradd8.h b/riscv/insns/uradd8.h
deleted file mode 100644
index 412e3d5..0000000
--- a/riscv/insns/uradd8.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_ULOOP(8, {
-  pd = (ps1 + ps2) >> 1;
-})
diff --git a/riscv/insns/uraddw.h b/riscv/insns/uraddw.h
deleted file mode 100644
index 6a9455f..0000000
--- a/riscv/insns/uraddw.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_extension(EXT_ZPN);
-reg_t res = (reg_t)P_W(RS1, 0) + (reg_t)P_W(RS2, 0);
-res >>= 1;
-WRITE_RD(sext_xlen((int32_t)res));
diff --git a/riscv/insns/urcras16.h b/riscv/insns/urcras16.h
deleted file mode 100644
index 2bac315..0000000
--- a/riscv/insns/urcras16.h
+++ /dev/null
@@ -1,5 +0,0 @@
-P_CROSS_ULOOP(16, {
-  pd = (ps1 + ps2) >> 1;
-}, {
-  pd = (ps1 - ps2) >> 1;
-})
diff --git a/riscv/insns/urcras32.h b/riscv/insns/urcras32.h
deleted file mode 100644
index a08e877..0000000
--- a/riscv/insns/urcras32.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_rv64;
-P_CROSS_ULOOP(32, {
-  pd = ((uint64_t)ps1 + ps2) >> 1;
-}, {
-  pd = ((uint64_t)ps1 - ps2) >> 1;
-})
diff --git a/riscv/insns/urcrsa16.h b/riscv/insns/urcrsa16.h
deleted file mode 100644
index a890990..0000000
--- a/riscv/insns/urcrsa16.h
+++ /dev/null
@@ -1,5 +0,0 @@
-P_CROSS_ULOOP(16, {
-  pd = (ps1 - ps2) >> 1;
-}, {
-  pd = (ps1 + ps2) >> 1;
-})
diff --git a/riscv/insns/urcrsa32.h b/riscv/insns/urcrsa32.h
deleted file mode 100644
index 7ddd4f9..0000000
--- a/riscv/insns/urcrsa32.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_rv64;
-P_CROSS_ULOOP(32, {
-  pd = ((uint64_t)ps1 - ps2) >> 1;
-}, {
-  pd = ((uint64_t)ps1 + ps2) >> 1;
-})
diff --git a/riscv/insns/urstas16.h b/riscv/insns/urstas16.h
deleted file mode 100644
index 3cc89d8..0000000
--- a/riscv/insns/urstas16.h
+++ /dev/null
@@ -1,5 +0,0 @@
-P_STRAIGHT_ULOOP(16, {
-  pd = (ps1 + ps2) >> 1;
-}, {
-  pd = (ps1 - ps2) >> 1;
-})
diff --git a/riscv/insns/urstas32.h b/riscv/insns/urstas32.h
deleted file mode 100644
index 668fa66..0000000
--- a/riscv/insns/urstas32.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_rv64;
-P_STRAIGHT_ULOOP(32, {
-  pd = ((uint64_t)ps1 + ps2) >> 1;
-}, {
-  pd = ((uint64_t)ps1 - ps2) >> 1;
-})
diff --git a/riscv/insns/urstsa16.h b/riscv/insns/urstsa16.h
deleted file mode 100644
index a88bcf1..0000000
--- a/riscv/insns/urstsa16.h
+++ /dev/null
@@ -1,5 +0,0 @@
-P_STRAIGHT_ULOOP(16, {
-  pd = (ps1 - ps2) >> 1;
-}, {
-  pd = (ps1 + ps2) >> 1;
-})
diff --git a/riscv/insns/urstsa32.h b/riscv/insns/urstsa32.h
deleted file mode 100644
index 097337c..0000000
--- a/riscv/insns/urstsa32.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_rv64;
-P_STRAIGHT_ULOOP(32, {
-  pd = ((uint64_t)ps1 - ps2) >> 1;
-}, {
-  pd = ((uint64_t)ps1 + ps2) >> 1;
-})
diff --git a/riscv/insns/ursub16.h b/riscv/insns/ursub16.h
deleted file mode 100644
index bcd09f0..0000000
--- a/riscv/insns/ursub16.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_ULOOP(16, {
-  pd = (ps1 - ps2) >> 1;
-})
diff --git a/riscv/insns/ursub32.h b/riscv/insns/ursub32.h
deleted file mode 100644
index 215436d..0000000
--- a/riscv/insns/ursub32.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_rv64;
-P_ULOOP(32, {
-  pd = ((uint64_t)ps1 - ps2) >> 1;
-})
diff --git a/riscv/insns/ursub64.h b/riscv/insns/ursub64.h
deleted file mode 100644
index 3d845a0..0000000
--- a/riscv/insns/ursub64.h
+++ /dev/null
@@ -1,9 +0,0 @@
-P_64_UPROFILE({
-  rd = rs1 - rs2;
-  if (rd > rs1) {
-    rd >>= 1;
-    rd |= ((reg_t)1 << 63);
-  } else {
-    rd >>= 1;
-  }
-})
diff --git a/riscv/insns/ursub8.h b/riscv/insns/ursub8.h
deleted file mode 100644
index d66a995..0000000
--- a/riscv/insns/ursub8.h
+++ /dev/null
@@ -1,3 +0,0 @@
-P_ULOOP(8, {
-  pd = (ps1 - ps2) >> 1;
-})
diff --git a/riscv/insns/ursubw.h b/riscv/insns/ursubw.h
deleted file mode 100644
index 5c90fde..0000000
--- a/riscv/insns/ursubw.h
+++ /dev/null
@@ -1,4 +0,0 @@
-require_extension(EXT_ZPN);
-reg_t res = (reg_t)P_W(RS1, 0) - (reg_t)P_W(RS2, 0);
-res >>= 1;
-WRITE_RD(sext_xlen((int32_t)res));
diff --git a/riscv/insns/zunpkd810.h b/riscv/insns/zunpkd810.h
deleted file mode 100644
index 88434de..0000000
--- a/riscv/insns/zunpkd810.h
+++ /dev/null
@@ -1 +0,0 @@
-P_ZUNPKD8(1, 0)
diff --git a/riscv/insns/zunpkd820.h b/riscv/insns/zunpkd820.h
deleted file mode 100644
index f206508..0000000
--- a/riscv/insns/zunpkd820.h
+++ /dev/null
@@ -1 +0,0 @@
-P_ZUNPKD8(2, 0)
diff --git a/riscv/insns/zunpkd830.h b/riscv/insns/zunpkd830.h
deleted file mode 100644
index 1365514..0000000
--- a/riscv/insns/zunpkd830.h
+++ /dev/null
@@ -1 +0,0 @@
-P_ZUNPKD8(3, 0)
diff --git a/riscv/insns/zunpkd831.h b/riscv/insns/zunpkd831.h
deleted file mode 100644
index 8febe77..0000000
--- a/riscv/insns/zunpkd831.h
+++ /dev/null
@@ -1 +0,0 @@
-P_ZUNPKD8(3, 1)
diff --git a/riscv/insns/zunpkd832.h b/riscv/insns/zunpkd832.h
deleted file mode 100644
index f14030b..0000000
--- a/riscv/insns/zunpkd832.h
+++ /dev/null
@@ -1 +0,0 @@
-P_ZUNPKD8(3, 2)
diff --git a/riscv/isa_parser.h b/riscv/isa_parser.h
index 72e8211..4bd9d4b 100644
--- a/riscv/isa_parser.h
+++ b/riscv/isa_parser.h
@@ -32,9 +32,6 @@ typedef enum {
   EXT_ZKSH,
   EXT_ZKR,
   EXT_ZMMUL,
-  EXT_ZBPBO,
-  EXT_ZPN,
-  EXT_ZPSFOPERAND,
   EXT_ZVFH,
   EXT_ZVFHMIN,
   EXT_SMEPMP,
@@ -66,14 +63,6 @@ typedef enum {
   EXT_ZVKNHB,
   EXT_ZVKSED,
   EXT_ZVKSH,
-  EXT_XZBP,
-  EXT_XZBS,
-  EXT_XZBE,
-  EXT_XZBF,
-  EXT_XZBC,
-  EXT_XZBM,
-  EXT_XZBR,
-  EXT_XZBT,
   EXT_SSTC,
   EXT_ZAAMO,
   EXT_ZALRSC,
diff --git a/riscv/overlap_list.h b/riscv/overlap_list.h
index 6c943bd..04ae443 100644
--- a/riscv/overlap_list.h
+++ b/riscv/overlap_list.h
@@ -17,10 +17,6 @@ DECLARE_OVERLAP_INSN(vghsh_vv, EXT_ZVKG)
 DECLARE_OVERLAP_INSN(vsha2ms_vv, EXT_ZVKNHA)
 DECLARE_OVERLAP_INSN(vsha2ms_vv, EXT_ZVKNHB)
 DECLARE_OVERLAP_INSN(vsm3me_vv, EXT_ZVKSH)
-DECLARE_OVERLAP_INSN(rstsa16, EXT_ZPN)
-DECLARE_OVERLAP_INSN(rstsa32, EXT_ZPN)
-DECLARE_OVERLAP_INSN(srli32_u, EXT_ZPN)
-DECLARE_OVERLAP_INSN(umax32, EXT_ZPN)
 DECLARE_OVERLAP_INSN(lpad, EXT_ZICFILP)
 DECLARE_OVERLAP_INSN(mop_r_28, EXT_ZIMOP)
 DECLARE_OVERLAP_INSN(mop_r_N, EXT_ZIMOP)
diff --git a/riscv/p_ext_macros.h b/riscv/p_ext_macros.h
deleted file mode 100644
index 29437ad..0000000
--- a/riscv/p_ext_macros.h
+++ /dev/null
@@ -1,506 +0,0 @@
-// See LICENSE for license details.
-
-#ifndef _RISCV_P_EXT_MACROS_H
-#define _RISCV_P_EXT_MACROS_H
-
-// The p-extension support is contributed by
-// Programming Langauge Lab, Department of Computer Science, National Tsing-Hua University, Taiwan
-
-#define P_FIELD(R, INDEX, SIZE) \
-  (type_sew_t<SIZE>::type)get_field(R, make_mask64(((INDEX) * SIZE), SIZE))
-
-#define P_UFIELD(R, INDEX, SIZE) \
-  (type_usew_t<SIZE>::type)get_field(R, make_mask64(((INDEX) * SIZE), SIZE))
-
-#define P_B(R, INDEX) P_UFIELD(R, INDEX, 8)
-#define P_H(R, INDEX) P_UFIELD(R, INDEX, 16)
-#define P_W(R, INDEX) P_UFIELD(R, INDEX, 32)
-#define P_SB(R, INDEX) P_FIELD(R, INDEX, 8)
-#define P_SH(R, INDEX) P_FIELD(R, INDEX, 16)
-#define P_SW(R, INDEX) P_FIELD(R, INDEX, 32)
-
-#define READ_REG_PAIR(reg) ({ \
-  require((reg) % 2 == 0); \
-  (reg) == 0 ? reg_t(0) : \
-  (READ_REG((reg) + 1) << 32) + zext32(READ_REG(reg)); })
-
-#define RS1_PAIR READ_REG_PAIR(insn.rs1())
-#define RS2_PAIR READ_REG_PAIR(insn.rs2())
-#define RD_PAIR READ_REG_PAIR(insn.rd())
-
-#define WRITE_PD() \
-  rd_tmp = set_field(rd_tmp, make_mask64((i * sizeof(pd) * 8), sizeof(pd) * 8), pd);
-
-#define WRITE_RD_PAIR(value) \
-  if (insn.rd() != 0) { \
-    require(insn.rd() % 2 == 0); \
-    WRITE_REG(insn.rd(), sext32(value)); \
-    WRITE_REG(insn.rd() + 1, (sreg_t(value)) >> 32); \
-  }
-
-#define P_SET_OV(ov) \
-  if (ov) P.VU.vxsat->write(1);
-
-#define P_SAT(R, BIT) \
-  if (R > INT##BIT##_MAX) { \
-    R = INT##BIT##_MAX; \
-    P_SET_OV(1); \
-  } else if (R < INT##BIT##_MIN) { \
-    R = INT##BIT##_MIN; \
-    P_SET_OV(1); \
-  }
-
-#define P_SATU(R, BIT) \
-  if (R > UINT##BIT##_MAX) { \
-    R = UINT##BIT##_MAX; \
-    P_SET_OV(1); \
-  } else if (R < 0) { \
-    P_SET_OV(1); \
-    R = 0; \
-  }
-
-#define P_LOOP_BASE(BIT) \
-  require_extension(EXT_ZPN); \
-  require(BIT == e8 || BIT == e16 || BIT == e32); \
-  reg_t rd_tmp = RD; \
-  reg_t rs1 = RS1; \
-  reg_t rs2 = RS2; \
-  sreg_t len = xlen / BIT; \
-  for (sreg_t i = len - 1; i >= 0; --i) {
-
-#define P_ONE_LOOP_BASE(BIT) \
-  require_extension(EXT_ZPN); \
-  require(BIT == e8 || BIT == e16 || BIT == e32); \
-  reg_t rd_tmp = RD; \
-  reg_t rs1 = RS1; \
-  sreg_t len = xlen / BIT; \
-  for (sreg_t i = len - 1; i >= 0; --i) {
-
-#define P_I_LOOP_BASE(BIT, IMMBIT) \
-  require_extension(EXT_ZPN); \
-  require(BIT == e8 || BIT == e16 || BIT == e32); \
-  reg_t rd_tmp = RD; \
-  reg_t rs1 = RS1; \
-  type_usew_t<BIT>::type imm##IMMBIT##u = insn.p_imm##IMMBIT(); \
-  sreg_t len = xlen / BIT; \
-  for (sreg_t i = len - 1; i >= 0; --i) {
-
-#define P_X_LOOP_BASE(BIT, LOWBIT) \
-  require_extension(EXT_ZPN); \
-  require(BIT == e8 || BIT == e16 || BIT == e32); \
-  reg_t rd_tmp = RD; \
-  reg_t rs1 = RS1; \
-  type_usew_t<BIT>::type sa = RS2 & ((uint64_t(1) << LOWBIT) - 1); \
-  type_sew_t<BIT>::type UNUSED ssa = int64_t(RS2) << (64 - LOWBIT) >> (64 - LOWBIT); \
-  sreg_t len = xlen / BIT; \
-  for (sreg_t i = len - 1; i >= 0; --i) {
-
-#define P_MUL_LOOP_BASE(BIT) \
-  require_extension(EXT_ZPN); \
-  require(BIT == e8 || BIT == e16 || BIT == e32); \
-  reg_t rd_tmp = RD; \
-  reg_t rs1 = RS1; \
-  reg_t rs2 = RS2; \
-  sreg_t len = 32 / BIT; \
-  for (sreg_t i = len - 1; i >= 0; --i) {
-
-#define P_REDUCTION_LOOP_BASE(BIT, BIT_INNER, USE_RD) \
-  require_extension(EXT_ZPN); \
-  require(BIT == e16 || BIT == e32 || BIT == e64); \
-  reg_t rd_tmp = USE_RD ? zext_xlen(RD) : 0; \
-  reg_t rs1 = zext_xlen(RS1); \
-  reg_t rs2 = zext_xlen(RS2); \
-  sreg_t len = 64 / BIT; \
-  sreg_t len_inner = BIT / BIT_INNER; \
-  for (sreg_t i = len - 1; i >= 0; --i) { \
-    sreg_t pd_res = P_FIELD(rd_tmp, i, BIT); \
-    for (sreg_t j = i * len_inner; j < (i + 1) * len_inner; ++j) {
-
-#define P_REDUCTION_ULOOP_BASE(BIT, BIT_INNER, USE_RD) \
-  require_extension(EXT_ZPN); \
-  require(BIT == e16 || BIT == e32 || BIT == e64); \
-  reg_t rd_tmp = USE_RD ? zext_xlen(RD) : 0; \
-  reg_t rs1 = zext_xlen(RS1); \
-  reg_t rs2 = zext_xlen(RS2); \
-  sreg_t len = 64 / BIT; \
-  sreg_t len_inner = BIT / BIT_INNER; \
-  for (sreg_t i = len - 1; i >=0; --i) { \
-    reg_t pd_res = P_UFIELD(rd_tmp, i, BIT); \
-    for (sreg_t j = i * len_inner; j < (i + 1) * len_inner; ++j) {
-
-#define P_PARAMS(BIT) \
-  auto pd = P_FIELD(rd_tmp, i, BIT); \
-  auto ps1 = P_FIELD(rs1, i, BIT); \
-  auto ps2 = P_FIELD(rs2, i, BIT);
-
-#define P_UPARAMS(BIT) \
-  auto pd = P_UFIELD(rd_tmp, i, BIT); \
-  auto ps1 = P_UFIELD(rs1, i, BIT); \
-  auto ps2 = P_UFIELD(rs2, i, BIT);
-
-#define P_CORSS_PARAMS(BIT) \
-  auto pd = P_FIELD(rd_tmp, i, BIT); \
-  auto UNUSED ps1 = P_FIELD(rs1, i, BIT); \
-  auto UNUSED ps2 = P_FIELD(rs2, (i ^ 1), BIT);
-
-#define P_CORSS_UPARAMS(BIT) \
-  auto pd = P_UFIELD(rd_tmp, i, BIT); \
-  auto ps1 = P_UFIELD(rs1, i, BIT); \
-  auto ps2 = P_UFIELD(rs2, (i ^ 1), BIT);
-
-#define P_ONE_PARAMS(BIT) \
-  auto pd = P_FIELD(rd_tmp, i, BIT); \
-  auto ps1 = P_FIELD(rs1, i, BIT);
-
-#define P_ONE_UPARAMS(BIT) \
-  auto pd = P_UFIELD(rd_tmp, i, BIT); \
-  auto ps1 = P_UFIELD(rs1, i, BIT);
-
-#define P_ONE_SUPARAMS(BIT) \
-  auto pd = P_UFIELD(rd_tmp, i, BIT); \
-  auto ps1 = P_FIELD(rs1, i, BIT);
-
-#define P_MUL_PARAMS(BIT) \
-  auto pd = P_FIELD(rd_tmp, i, BIT * 2); \
-  auto ps1 = P_FIELD(rs1, i, BIT); \
-  auto ps2 = P_FIELD(rs2, i, BIT);
-
-#define P_MUL_UPARAMS(BIT) \
-  auto pd = P_UFIELD(rd_tmp, i, BIT * 2); \
-  auto ps1 = P_UFIELD(rs1, i, BIT); \
-  auto ps2 = P_UFIELD(rs2, i, BIT);
-
-#define P_MUL_CROSS_PARAMS(BIT) \
-  auto pd = P_FIELD(rd_tmp, i, BIT * 2); \
-  auto ps1 = P_FIELD(rs1, i, BIT); \
-  auto ps2 = P_FIELD(rs2, (i ^ 1), BIT);
-
-#define P_MUL_CROSS_UPARAMS(BIT) \
-  auto pd = P_UFIELD(rd_tmp, i, BIT*2); \
-  auto ps1 = P_UFIELD(rs1, i, BIT); \
-  auto ps2 = P_UFIELD(rs2, (i ^ 1), BIT);
-
-#define P_REDUCTION_PARAMS(BIT_INNER) \
-  auto ps1 = P_FIELD(rs1, j, BIT_INNER); \
-  auto ps2 = P_FIELD(rs2, j, BIT_INNER);
-
-#define P_REDUCTION_UPARAMS(BIT_INNER) \
-  auto ps1 = P_UFIELD(rs1, j, BIT_INNER); \
-  auto ps2 = P_UFIELD(rs2, j, BIT_INNER);
-
-#define P_REDUCTION_SUPARAMS(BIT_INNER) \
-  auto ps1 = P_FIELD(rs1, j, BIT_INNER); \
-  auto ps2 = P_UFIELD(rs2, j, BIT_INNER);
-
-#define P_REDUCTION_CROSS_PARAMS(BIT_INNER) \
-  auto ps1 = P_FIELD(rs1, j, BIT_INNER); \
-  auto ps2 = P_FIELD(rs2, (j ^ 1), BIT_INNER);
-
-#define P_LOOP_BODY(BIT, BODY) { \
-  P_PARAMS(BIT) \
-  BODY \
-  WRITE_PD(); \
-}
-
-#define P_ULOOP_BODY(BIT, BODY) { \
-  P_UPARAMS(BIT) \
-  BODY \
-  WRITE_PD(); \
-}
-
-#define P_ONE_LOOP_BODY(BIT, BODY) { \
-  P_ONE_PARAMS(BIT) \
-  BODY \
-  WRITE_PD(); \
-}
-
-#define P_CROSS_LOOP_BODY(BIT, BODY) { \
-  P_CORSS_PARAMS(BIT) \
-  BODY \
-  WRITE_PD(); \
-}
-
-#define P_CROSS_ULOOP_BODY(BIT, BODY) { \
-  P_CORSS_UPARAMS(BIT) \
-  BODY \
-  WRITE_PD(); \
-}
-
-#define P_ONE_ULOOP_BODY(BIT, BODY) { \
-  P_ONE_UPARAMS(BIT) \
-  BODY \
-  WRITE_PD(); \
-}
-
-#define P_MUL_LOOP_BODY(BIT, BODY) { \
-  P_MUL_PARAMS(BIT) \
-  BODY \
-  WRITE_PD(); \
-}
-
-#define P_MUL_ULOOP_BODY(BIT, BODY) { \
-  P_MUL_UPARAMS(BIT) \
-  BODY \
-  WRITE_PD(); \
-}
-
-#define P_MUL_CROSS_LOOP_BODY(BIT, BODY) { \
-  P_MUL_CROSS_PARAMS(BIT) \
-  BODY \
-  WRITE_PD(); \
-}
-
-#define P_MUL_CROSS_ULOOP_BODY(BIT, BODY) { \
-  P_MUL_CROSS_UPARAMS(BIT) \
-  BODY \
-  WRITE_PD(); \
-}
-
-#define P_LOOP(BIT, BODY) \
-  P_LOOP_BASE(BIT) \
-  P_LOOP_BODY(BIT, BODY) \
-  P_LOOP_END()
-
-#define P_ONE_LOOP(BIT, BODY) \
-  P_ONE_LOOP_BASE(BIT) \
-  P_ONE_LOOP_BODY(BIT, BODY) \
-  P_LOOP_END()
-
-#define P_ULOOP(BIT, BODY) \
-  P_LOOP_BASE(BIT) \
-  P_ULOOP_BODY(BIT, BODY) \
-  P_LOOP_END()
-
-#define P_CROSS_LOOP(BIT, BODY1, BODY2) \
-  P_LOOP_BASE(BIT) \
-  P_CROSS_LOOP_BODY(BIT, BODY1) \
-  --i; \
-  if (sizeof(#BODY2) == 1) { \
-    P_CROSS_LOOP_BODY(BIT, BODY1) \
-  } \
-  else { \
-    P_CROSS_LOOP_BODY(BIT, BODY2) \
-  } \
-  P_LOOP_END()
-
-#define P_CROSS_ULOOP(BIT, BODY1, BODY2) \
-  P_LOOP_BASE(BIT) \
-  P_CROSS_ULOOP_BODY(BIT, BODY1) \
-  --i; \
-  P_CROSS_ULOOP_BODY(BIT, BODY2) \
-  P_LOOP_END()
-
-#define P_STRAIGHT_LOOP(BIT, BODY1, BODY2) \
-  P_LOOP_BASE(BIT) \
-  P_LOOP_BODY(BIT, BODY1) \
-  --i; \
-  P_LOOP_BODY(BIT, BODY2) \
-  P_LOOP_END()
-
-#define P_STRAIGHT_ULOOP(BIT, BODY1, BODY2) \
-  P_LOOP_BASE(BIT) \
-  P_ULOOP_BODY(BIT, BODY1) \
-  --i; \
-  P_ULOOP_BODY(BIT, BODY2) \
-  P_LOOP_END()
-
-#define P_X_LOOP(BIT, RS2_LOW_BIT, BODY) \
-  P_X_LOOP_BASE(BIT, RS2_LOW_BIT) \
-  P_ONE_LOOP_BODY(BIT, BODY) \
-  P_LOOP_END()
-
-#define P_X_ULOOP(BIT, RS2_LOW_BIT, BODY) \
-  P_X_LOOP_BASE(BIT, RS2_LOW_BIT) \
-  P_ONE_ULOOP_BODY(BIT, BODY) \
-  P_LOOP_END()
-
-#define P_I_LOOP(BIT, IMMBIT, BODY) \
-  P_I_LOOP_BASE(BIT, IMMBIT) \
-  P_ONE_LOOP_BODY(BIT, BODY) \
-  P_LOOP_END()
-
-#define P_I_ULOOP(BIT, IMMBIT, BODY) \
-  P_I_LOOP_BASE(BIT, IMMBIT) \
-  P_ONE_ULOOP_BODY(BIT, BODY) \
-  P_LOOP_END()
-
-#define P_MUL_LOOP(BIT, BODY) \
-  P_MUL_LOOP_BASE(BIT) \
-  P_MUL_LOOP_BODY(BIT, BODY) \
-  P_PAIR_LOOP_END()
-
-#define P_MUL_ULOOP(BIT, BODY) \
-  P_MUL_LOOP_BASE(BIT) \
-  P_MUL_ULOOP_BODY(BIT, BODY) \
-  P_PAIR_LOOP_END()
-
-#define P_MUL_CROSS_LOOP(BIT, BODY) \
-  P_MUL_LOOP_BASE(BIT) \
-  P_MUL_CROSS_LOOP_BODY(BIT, BODY) \
-  P_PAIR_LOOP_END()
-
-#define P_MUL_CROSS_ULOOP(BIT, BODY) \
-  P_MUL_LOOP_BASE(BIT) \
-  P_MUL_CROSS_ULOOP_BODY(BIT, BODY) \
-  P_PAIR_LOOP_END()
-
-#define P_REDUCTION_LOOP(BIT, BIT_INNER, USE_RD, IS_SAT, BODY) \
-  P_REDUCTION_LOOP_BASE(BIT, BIT_INNER, USE_RD) \
-  P_REDUCTION_PARAMS(BIT_INNER) \
-  BODY \
-  P_REDUCTION_LOOP_END(BIT, IS_SAT)
-
-#define P_REDUCTION_ULOOP(BIT, BIT_INNER, USE_RD, IS_SAT, BODY) \
-  P_REDUCTION_ULOOP_BASE(BIT, BIT_INNER, USE_RD) \
-  P_REDUCTION_UPARAMS(BIT_INNER) \
-  BODY \
-  P_REDUCTION_ULOOP_END(BIT, IS_SAT)
-
-#define P_REDUCTION_SULOOP(BIT, BIT_INNER, USE_RD, IS_SAT, BODY) \
-  P_REDUCTION_LOOP_BASE(BIT, BIT_INNER, USE_RD) \
-  P_REDUCTION_SUPARAMS(BIT_INNER) \
-  BODY \
-  P_REDUCTION_LOOP_END(BIT, IS_SAT)
-
-#define P_REDUCTION_CROSS_LOOP(BIT, BIT_INNER, USE_RD, IS_SAT, BODY) \
-  P_REDUCTION_LOOP_BASE(BIT, BIT_INNER, USE_RD) \
-  P_REDUCTION_CROSS_PARAMS(BIT_INNER) \
-  BODY \
-  P_REDUCTION_LOOP_END(BIT, IS_SAT)
-
-#define P_LOOP_END() \
-  } \
-  WRITE_RD(sext_xlen(rd_tmp));
-
-#define P_PAIR_LOOP_END() \
-  } \
-  if (xlen == 32) { \
-    WRITE_RD_PAIR(rd_tmp); \
-  } \
-  else { \
-    WRITE_RD(sext_xlen(rd_tmp)); \
-  }
-
-#define P_REDUCTION_LOOP_END(BIT, IS_SAT) \
-    } \
-    if (IS_SAT) { \
-      P_SAT(pd_res, BIT); \
-    } \
-    type_usew_t<BIT>::type pd = pd_res; \
-    WRITE_PD(); \
-  } \
-  WRITE_RD(sext_xlen(rd_tmp));
-
-#define P_REDUCTION_ULOOP_END(BIT, IS_SAT) \
-    } \
-    if (IS_SAT) { \
-      P_SATU(pd_res, BIT); \
-    } \
-    type_usew_t<BIT>::type pd = pd_res; \
-    WRITE_PD(); \
-  } \
-  WRITE_RD(sext_xlen(rd_tmp));
-
-#define P_SUNPKD8(X, Y) \
-  require_extension(EXT_ZPN); \
-  reg_t rd_tmp = 0; \
-  int16_t pd[4] = { \
-    P_SB(RS1, Y), \
-    P_SB(RS1, X), \
-    P_SB(RS1, Y + 4), \
-    P_SB(RS1, X + 4), \
-  }; \
-  if (xlen == 64) { \
-    memcpy(&rd_tmp, pd, 8); \
-  } else { \
-    memcpy(&rd_tmp, pd, 4); \
-  } \
-  WRITE_RD(sext_xlen(rd_tmp));
-
-#define P_ZUNPKD8(X, Y) \
-  require_extension(EXT_ZPN); \
-  reg_t rd_tmp = 0; \
-  uint16_t pd[4] = { \
-    P_B(RS1, Y), \
-    P_B(RS1, X), \
-    P_B(RS1, Y + 4), \
-    P_B(RS1, X + 4), \
-  }; \
-  if (xlen == 64) { \
-    memcpy(&rd_tmp, pd, 8); \
-  } else { \
-    memcpy(&rd_tmp, pd, 4); \
-  } \
-  WRITE_RD(sext_xlen(rd_tmp));
-
-#define P_PK(BIT, X, Y) \
-  require_extension(EXT_ZPN); \
-  require(BIT == e16 || BIT == e32); \
-  reg_t rd_tmp = 0, UNUSED rs1 = RS1, UNUSED rs2 = RS2; \
-  for (sreg_t i = 0; i < xlen / BIT / 2; i++) { \
-    rd_tmp = set_field(rd_tmp, make_mask64(i * 2 * BIT, BIT), \
-      P_UFIELD(RS2, i * 2 + Y, BIT)); \
-    rd_tmp = set_field(rd_tmp, make_mask64((i * 2 + 1) * BIT, BIT), \
-      P_UFIELD(RS1, i * 2 + X, BIT)); \
-  } \
-  WRITE_RD(sext_xlen(rd_tmp));
-
-#define P_64_PROFILE_BASE() \
-  require_extension(EXT_ZPSFOPERAND); \
-  sreg_t rd, rs1, rs2;
-
-#define P_64_UPROFILE_BASE() \
-  require_extension(EXT_ZPSFOPERAND); \
-  reg_t rd, rs1, rs2;
-
-#define P_64_PROFILE_PARAM(USE_RD, INPUT_PAIR) \
-  if (xlen == 32) { \
-    rs1 = INPUT_PAIR ? RS1_PAIR : RS1; \
-    rs2 = INPUT_PAIR ? RS2_PAIR : RS2; \
-    rd = USE_RD ? RD_PAIR : 0; \
-  } else { \
-    rs1 = RS1; \
-    rs2 = RS2; \
-    rd = USE_RD ? RD : 0; \
-  }
-
-#define P_64_PROFILE(BODY) \
-  P_64_PROFILE_BASE() \
-  P_64_PROFILE_PARAM(false, true) \
-  BODY \
-  P_64_PROFILE_END() \
-
-#define P_64_UPROFILE(BODY) \
-  P_64_UPROFILE_BASE() \
-  P_64_PROFILE_PARAM(false, true) \
-  BODY \
-  P_64_PROFILE_END() \
-
-#define P_64_PROFILE_REDUCTION(BIT, BODY) \
-  P_64_PROFILE_BASE() \
-  P_64_PROFILE_PARAM(true, false) \
-  for (sreg_t i = 0; i < xlen / BIT; i++) { \
-    sreg_t ps1 = P_FIELD(rs1, i, BIT); \
-    sreg_t ps2 = P_FIELD(rs2, i, BIT); \
-    BODY \
-  } \
-  P_64_PROFILE_END() \
-
-#define P_64_UPROFILE_REDUCTION(BIT, BODY) \
-  P_64_UPROFILE_BASE() \
-  P_64_PROFILE_PARAM(true, false) \
-  for (sreg_t i = 0; i < xlen / BIT; i++) { \
-    reg_t ps1 = P_UFIELD(rs1, i, BIT); \
-    reg_t ps2 = P_UFIELD(rs2, i, BIT); \
-    BODY \
-  } \
-  P_64_PROFILE_END() \
-
-#define P_64_PROFILE_END() \
-  if (xlen == 32) { \
-    WRITE_RD_PAIR(rd); \
-  } else { \
-    WRITE_RD(sext_xlen(rd)); \
-  }
-
-#endif
diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in
index f388426..6db6fa9 100644
--- a/riscv/riscv.mk.in
+++ b/riscv/riscv.mk.in
@@ -403,12 +403,8 @@ riscv_insn_ext_b = \
 	clmulr \
 	clz \
 	clzw \
-	cmix \
 	ctz \
 	ctzw \
-	fsr \
-	fsri \
-	fsrw \
 	gorci \
 	grevi \
 	max \
@@ -418,7 +414,6 @@ riscv_insn_ext_b = \
 	orn \
 	pack \
 	packh \
-	packu \
 	packw \
 	cpop \
 	cpopw \
@@ -883,336 +878,6 @@ riscv_insn_ext_h = \
 	hsv_w \
 	hsv_d \
 
-riscv_insn_ext_p_simd = \
-	add16 \
-	radd16 \
-	uradd16 \
-	kadd16 \
-	ukadd16 \
-	sub16 \
-	rsub16 \
-	ursub16 \
-	ksub16 \
-	uksub16 \
-	cras16 \
-	rcras16 \
-	urcras16 \
-	kcras16 \
-	ukcras16 \
-	crsa16 \
-	rcrsa16 \
-	urcrsa16 \
-	kcrsa16 \
-	ukcrsa16 \
-	stas16 \
-	rstas16 \
-	urstas16 \
-	kstas16 \
-	ukstas16 \
-	stsa16 \
-	rstsa16 \
-	urstsa16 \
-	kstsa16 \
-	ukstsa16 \
-	add8 \
-	radd8 \
-	uradd8 \
-	kadd8 \
-	ukadd8 \
-	sub8 \
-	rsub8 \
-	ursub8 \
-	ksub8 \
-	uksub8 \
-	sra16 \
-	srai16 \
-	sra16_u \
-	srai16_u \
-	srl16 \
-	srli16 \
-	srl16_u \
-	srli16_u \
-	sll16 \
-	slli16 \
-	ksll16 \
-	kslli16 \
-	kslra16 \
-	kslra16_u \
-	sra8 \
-	srai8 \
-	sra8_u \
-	srai8_u \
-	srl8 \
-	srli8 \
-	srl8_u \
-	srli8_u \
-	sll8 \
-	slli8 \
-	ksll8 \
-	kslli8 \
-	kslra8 \
-	kslra8_u \
-	cmpeq16 \
-	scmplt16 \
-	scmple16 \
-	ucmplt16 \
-	ucmple16 \
-	cmpeq8 \
-	scmplt8 \
-	scmple8 \
-	ucmplt8 \
-	ucmple8 \
-	smul16 \
-	smulx16 \
-	umul16 \
-	umulx16 \
-	khm16 \
-	khmx16 \
-	smul8 \
-	smulx8 \
-	umul8 \
-	umulx8 \
-	khm8 \
-	khmx8 \
-	smin16 \
-	umin16 \
-	smax16 \
-	umax16 \
-	sclip16 \
-	uclip16 \
-	kabs16 \
-	clrs16 \
-	clz16 \
-	smin8 \
-	umin8 \
-	smax8 \
-	umax8 \
-	sclip8 \
-	uclip8 \
-	kabs8 \
-	clrs8 \
-	clz8 \
-	sunpkd810 \
-	sunpkd820 \
-	sunpkd830 \
-	sunpkd831 \
-	sunpkd832 \
-	zunpkd810 \
-	zunpkd820 \
-	zunpkd830 \
-	zunpkd831 \
-	zunpkd832 \
-
-riscv_insn_ext_p_partial_simd = \
-	pkbb16 \
-	pkbt16 \
-	pktb16 \
-	pktt16 \
-	smmul \
-	smmul_u \
-	kmmac \
-	kmmac_u \
-	kmmsb \
-	kmmsb_u \
-	kwmmul \
-	kwmmul_u \
-	smmwb \
-	smmwb_u \
-	smmwt \
-	smmwt_u \
-	kmmawb \
-	kmmawb_u \
-	kmmawt \
-	kmmawt_u \
-	kmmwb2 \
-	kmmwb2_u \
-	kmmwt2 \
-	kmmwt2_u \
-	kmmawb2 \
-	kmmawb2_u \
-	kmmawt2 \
-	kmmawt2_u \
-	smbb16 \
-	smbt16 \
-	smtt16 \
-	kmda \
-	kmxda \
-	smds \
-	smdrs \
-	smxds \
-	kmabb \
-	kmabt \
-	kmatt \
-	kmada \
-	kmaxda \
-	kmads \
-	kmadrs \
-	kmaxds \
-	kmsda \
-	kmsxda \
-	smal \
-	sclip32 \
-	uclip32 \
-	clrs32 \
-	pbsad \
-	pbsada \
-	smaqa \
-	umaqa \
-	smaqa_su \
-
-riscv_insn_ext_p_64_bit_profile = \
-	add64 \
-	radd64 \
-	uradd64 \
-	kadd64 \
-	ukadd64 \
-	sub64 \
-	rsub64 \
-	ursub64 \
-	ksub64 \
-	uksub64 \
-	smar64 \
-	smsr64 \
-	umar64 \
-	umsr64 \
-	kmar64 \
-	kmsr64 \
-	ukmar64 \
-	ukmsr64 \
-	smalbb \
-	smalbt \
-	smaltt \
-	smalda \
-	smalxda \
-	smalds \
-	smaldrs \
-	smalxds \
-	smslda \
-	smslxda \
-
-riscv_insn_ext_p_non_simd = \
-	kaddh \
-	ksubh \
-	khmbb \
-	khmbt \
-	khmtt \
-	ukaddh \
-	uksubh \
-	kaddw \
-	ukaddw \
-	ksubw \
-	uksubw \
-	kdmbb \
-	kdmbt \
-	kdmtt \
-	kslraw \
-	kslraw_u \
-	ksllw \
-	kslliw \
-	kdmabb \
-	kdmabt \
-	kdmatt \
-	kabsw \
-	raddw \
-	uraddw \
-	rsubw \
-	ursubw \
-	mulr64 \
-	mulsr64 \
-	msubr32 \
-	ave \
-	sra_u \
-	srai_u \
-	insb \
-	maddr32 \
-
-riscv_insn_ext_p_rv64_only = \
-	add32 \
-	radd32 \
-	uradd32 \
-	kadd32 \
-	ukadd32 \
-	sub32 \
-	rsub32 \
-	ursub32 \
-	ksub32 \
-	uksub32 \
-	cras32 \
-	rcras32 \
-	urcras32 \
-	kcras32 \
-	ukcras32 \
-	crsa32 \
-	rcrsa32 \
-	urcrsa32 \
-	kcrsa32 \
-	ukcrsa32 \
-	stas32 \
-	rstas32 \
-	urstas32 \
-	kstas32 \
-	ukstas32 \
-	stsa32 \
-	rstsa32 \
-	urstsa32 \
-	kstsa32 \
-	ukstsa32 \
-	sra32 \
-	srai32 \
-	sra32_u \
-	srai32_u \
-	srl32 \
-	srli32 \
-	srl32_u \
-	srli32_u \
-	sll32 \
-	slli32 \
-	ksll32 \
-	kslli32 \
-	kslra32 \
-	kslra32_u \
-	smin32 \
-	umin32 \
-	smax32 \
-	umax32 \
-	kabs32 \
-	khmbb16 \
-	khmbt16 \
-	khmtt16 \
-	kdmbb16 \
-	kdmbt16 \
-	kdmtt16 \
-	kdmabb16 \
-	kdmabt16 \
-	kdmatt16 \
-	smbt32 \
-	smtt32 \
-	kmabb32 \
-	kmabt32 \
-	kmatt32 \
-	kmda32 \
-	kmxda32 \
-	kmaxda32 \
-	kmads32 \
-	kmadrs32 \
-	kmaxds32 \
-	kmsda32 \
-	kmsxda32 \
-	smds32 \
-	smdrs32 \
-	smxds32 \
-	sraiw_u \
-	pkbt32 \
-	pktb32 \
-	clz32 \
-
-riscv_insn_ext_p = \
-	$(riscv_insn_ext_p_simd) \
-	$(riscv_insn_ext_p_partial_simd) \
-	$(riscv_insn_ext_p_64_bit_profile) \
-	$(riscv_insn_ext_p_non_simd) \
-	$(riscv_insn_ext_p_rv64_only) \
-
 riscv_insn_priv = \
 	csrrc \
 	csrrci \
@@ -1430,7 +1095,6 @@ riscv_insn_list = \
 	$(riscv_insn_ext_i) \
 	$(riscv_insn_ext_k) \
 	$(riscv_insn_ext_m) \
-	$(riscv_insn_ext_p) \
 	$(riscv_insn_ext_q) \
 	$(riscv_insn_ext_q_zfa) \
 	$(riscv_insn_ext_zacas) \
diff --git a/riscv/v_ext_macros.h b/riscv/v_ext_macros.h
index 42d723a..8f9820d 100644
--- a/riscv/v_ext_macros.h
+++ b/riscv/v_ext_macros.h
@@ -2112,4 +2112,7 @@ reg_t index[P.VU.vlmax]; \
       break; \
   }
 
+#define P_SET_OV(ov) \
+  if (ov) P.VU.vxsat->write(1);
+
 #endif
-- 
cgit v1.1


From 7dd18a0d9c56b47594d98c8741f273a7636e22d4 Mon Sep 17 00:00:00 2001
From: Andrew Waterman <andrew@sifive.com>
Date: Wed, 1 May 2024 17:24:40 -0700
Subject: Update encoding.h

---
 riscv/encoding.h | 1153 ++----------------------------------------------------
 1 file changed, 37 insertions(+), 1116 deletions(-)

diff --git a/riscv/encoding.h b/riscv/encoding.h
index d600fa2..4b2e0b6 100644
--- a/riscv/encoding.h
+++ b/riscv/encoding.h
@@ -4,7 +4,7 @@
 
 /*
  * This file is auto-generated by running 'make' in
- * https://github.com/riscv/riscv-opcodes (4ad822d)
+ * https://github.com/riscv/riscv-opcodes (7bed351)
  */
 
 #ifndef RISCV_CSR_ENCODING_H
@@ -150,6 +150,8 @@
 #define MIP_MEIP            (1 << IRQ_M_EXT)
 #define MIP_SGEIP           (1 << IRQ_S_GEXT)
 #define MIP_LCOFIP          (1 << IRQ_LCOF)
+#define MIP_RAS_LOW_PRIO    (1ULL << IRQ_RAS_LOW_PRIO)
+#define MIP_RAS_HIGH_PRIO   (1ULL << IRQ_RAS_HIGH_PRIO)
 
 #define MIP_S_MASK          (MIP_SSIP | MIP_STIP | MIP_SEIP)
 #define MIP_VS_MASK         (MIP_VSSIP | MIP_VSTIP | MIP_VSEIP)
@@ -178,14 +180,16 @@
 #define MSTATEEN0_FCSR     0x00000002
 #define MSTATEEN0_JVT      0x00000004
 #define MSTATEEN0_PRIV114  0x0080000000000000
-#define MSTATEEN0_HENVCFGH 0x0100000000000000
 #define MSTATEEN0_HCONTEXT 0x0200000000000000
+#define MSTATEEN0_AIA      0x0800000000000000
+#define MSTATEEN0_CSRIND   0x1000000000000000
 #define MSTATEEN0_HENVCFG  0x4000000000000000
 #define MSTATEEN_HSTATEEN  0x8000000000000000
 
 #define MSTATEEN0H_PRIV114  0x00800000
-#define MSTATEEN0H_HENVCFGH 0x01000000
 #define MSTATEEN0H_HCONTEXT 0x02000000
+#define MSTATEEN0H_AIA      0x08000000
+#define MSTATEEN0H_CSRIND   0x10000000
 #define MSTATEEN0H_HENVCFG  0x40000000
 #define MSTATEENH_HSTATEEN  0x80000000
 
@@ -233,10 +237,14 @@
 #define HSTATEEN0_FCSR     0x00000002
 #define HSTATEEN0_JVT      0x00000004
 #define HSTATEEN0_SCONTEXT 0x0200000000000000
+#define HSTATEEN0_AIA      0x0800000000000000
+#define HSTATEEN0_CSRIND   0x1000000000000000
 #define HSTATEEN0_SENVCFG  0x4000000000000000
 #define HSTATEEN_SSTATEEN  0x8000000000000000
 
 #define HSTATEEN0H_SCONTEXT 0x02000000
+#define HSTATEEN0H_AIA      0x08000000
+#define HSTATEEN0H_CSRIND   0x10000000
 #define HSTATEEN0H_SENVCFG  0x40000000
 #define HSTATEENH_SSTATEEN  0x80000000
 
@@ -262,6 +270,15 @@
 #define JVT_MODE   0x3F
 #define JVT_BASE   (~0x3F)
 
+#define HVICTL_VTI    0x40000000
+#define HVICTL_IID    0x003F0000
+#define HVICTL_DPR    0x00000200
+#define HVICTL_IPRIOM 0x00000100
+#define HVICTL_IPRIO  0x000000FF
+
+#define MTOPI_IID   0x0FFF0000
+#define MTOPI_IPRIO 0x000000FF
+
 #define PRV_U 0
 #define PRV_S 1
 #define PRV_M 3
@@ -307,21 +324,23 @@
 #define PMP_NA4   0x10
 #define PMP_NAPOT 0x18
 
-#define IRQ_U_SOFT   0
-#define IRQ_S_SOFT   1
-#define IRQ_VS_SOFT  2
-#define IRQ_M_SOFT   3
-#define IRQ_U_TIMER  4
-#define IRQ_S_TIMER  5
-#define IRQ_VS_TIMER 6
-#define IRQ_M_TIMER  7
-#define IRQ_U_EXT    8
-#define IRQ_S_EXT    9
-#define IRQ_VS_EXT   10
-#define IRQ_M_EXT    11
-#define IRQ_S_GEXT   12
-#define IRQ_COP      12
-#define IRQ_LCOF     13
+#define IRQ_U_SOFT        0
+#define IRQ_S_SOFT        1
+#define IRQ_VS_SOFT       2
+#define IRQ_M_SOFT        3
+#define IRQ_U_TIMER       4
+#define IRQ_S_TIMER       5
+#define IRQ_VS_TIMER      6
+#define IRQ_M_TIMER       7
+#define IRQ_U_EXT         8
+#define IRQ_S_EXT         9
+#define IRQ_VS_EXT        10
+#define IRQ_M_EXT         11
+#define IRQ_S_GEXT        12
+#define IRQ_COP           12
+#define IRQ_LCOF          13
+#define IRQ_RAS_LOW_PRIO  35
+#define IRQ_RAS_HIGH_PRIO 43
 
 /* page table entry (PTE) fields */
 #define PTE_V     0x001 /* Valid */
@@ -406,22 +425,12 @@
 #define RISCV_ENCODING_H
 #define MATCH_ADD 0x33
 #define MASK_ADD 0xfe00707f
-#define MATCH_ADD16 0x40000077
-#define MASK_ADD16 0xfe00707f
-#define MATCH_ADD32 0x40002077
-#define MASK_ADD32 0xfe00707f
 #define MATCH_ADD64 0xc0001077
 #define MASK_ADD64 0xfe00707f
-#define MATCH_ADD8 0x48000077
-#define MASK_ADD8 0xfe00707f
 #define MATCH_ADD_UW 0x800003b
 #define MASK_ADD_UW 0xfe00707f
-#define MATCH_ADDD 0x7b
-#define MASK_ADDD 0xfe00707f
 #define MATCH_ADDI 0x13
 #define MASK_ADDI 0x707f
-#define MATCH_ADDID 0x5b
-#define MASK_ADDID 0x707f
 #define MATCH_ADDIW 0x1b
 #define MASK_ADDIW 0x707f
 #define MATCH_ADDW 0x3b
@@ -538,30 +547,16 @@
 #define MASK_ANDN 0xfe00707f
 #define MATCH_AUIPC 0x17
 #define MASK_AUIPC 0x7f
-#define MATCH_AVE 0xe0000077
-#define MASK_AVE 0xfe00707f
 #define MATCH_BCLR 0x48001033
 #define MASK_BCLR 0xfe00707f
 #define MATCH_BCLRI 0x48001013
 #define MASK_BCLRI 0xfc00707f
-#define MATCH_BCOMPRESS 0x8006033
-#define MASK_BCOMPRESS 0xfe00707f
-#define MATCH_BCOMPRESSW 0x800603b
-#define MASK_BCOMPRESSW 0xfe00707f
-#define MATCH_BDECOMPRESS 0x48006033
-#define MASK_BDECOMPRESS 0xfe00707f
-#define MATCH_BDECOMPRESSW 0x4800603b
-#define MASK_BDECOMPRESSW 0xfe00707f
 #define MATCH_BEQ 0x63
 #define MASK_BEQ 0x707f
 #define MATCH_BEXT 0x48005033
 #define MASK_BEXT 0xfe00707f
 #define MATCH_BEXTI 0x48005013
 #define MASK_BEXTI 0xfc00707f
-#define MATCH_BFP 0x48007033
-#define MASK_BFP 0xfe00707f
-#define MATCH_BFPW 0x4800703b
-#define MASK_BFPW 0xfe00707f
 #define MATCH_BGE 0x5063
 #define MASK_BGE 0x707f
 #define MATCH_BGEU 0x7063
@@ -574,12 +569,6 @@
 #define MASK_BLT 0x707f
 #define MATCH_BLTU 0x6063
 #define MASK_BLTU 0x707f
-#define MATCH_BMATFLIP 0x60301013
-#define MASK_BMATFLIP 0xfff0707f
-#define MATCH_BMATOR 0x8003033
-#define MASK_BMATOR 0xfe00707f
-#define MATCH_BMATXOR 0x48003033
-#define MASK_BMATXOR 0xfe00707f
 #define MATCH_BNE 0x1063
 #define MASK_BNE 0x707f
 #define MATCH_BSET 0x28001033
@@ -644,10 +633,6 @@
 #define MASK_C_LHU 0xfc43
 #define MATCH_C_LI 0x4001
 #define MASK_C_LI 0xe003
-#define MATCH_C_LQ 0x2000
-#define MASK_C_LQ 0xe003
-#define MATCH_C_LQSP 0x2002
-#define MASK_C_LQSP 0xe003
 #define MATCH_C_LUI 0x6001
 #define MASK_C_LUI 0xe003
 #define MATCH_C_LW 0x4000
@@ -696,10 +681,6 @@
 #define MASK_C_SH 0xfc43
 #define MATCH_C_SLLI 0x2
 #define MASK_C_SLLI 0xe003
-#define MATCH_C_SQ 0xa000
-#define MASK_C_SQ 0xe003
-#define MATCH_C_SQSP 0xa002
-#define MASK_C_SQSP 0xe003
 #define MATCH_C_SRAI 0x8401
 #define MASK_C_SRAI 0xec03
 #define MATCH_C_SRLI 0x8001
@@ -738,20 +719,8 @@
 #define MASK_CLMULH 0xfe00707f
 #define MATCH_CLMULR 0xa002033
 #define MASK_CLMULR 0xfe00707f
-#define MATCH_CLRS16 0xae800077
-#define MASK_CLRS16 0xfff0707f
-#define MATCH_CLRS32 0xaf800077
-#define MASK_CLRS32 0xfff0707f
-#define MATCH_CLRS8 0xae000077
-#define MASK_CLRS8 0xfff0707f
 #define MATCH_CLZ 0x60001013
 #define MASK_CLZ 0xfff0707f
-#define MATCH_CLZ16 0xae900077
-#define MASK_CLZ16 0xfff0707f
-#define MATCH_CLZ32 0xaf900077
-#define MASK_CLZ32 0xfff0707f
-#define MATCH_CLZ8 0xae100077
-#define MASK_CLZ8 0xfff0707f
 #define MATCH_CLZW 0x6000101b
 #define MASK_CLZW 0xfff0707f
 #define MATCH_CM_JALT 0xa002
@@ -768,42 +737,10 @@
 #define MASK_CM_POPRETZ 0xff03
 #define MATCH_CM_PUSH 0xb802
 #define MASK_CM_PUSH 0xff03
-#define MATCH_CMIX 0x6001033
-#define MASK_CMIX 0x600707f
-#define MATCH_CMOV 0x6005033
-#define MASK_CMOV 0x600707f
-#define MATCH_CMPEQ16 0x4c000077
-#define MASK_CMPEQ16 0xfe00707f
-#define MATCH_CMPEQ8 0x4e000077
-#define MASK_CMPEQ8 0xfe00707f
 #define MATCH_CPOP 0x60201013
 #define MASK_CPOP 0xfff0707f
 #define MATCH_CPOPW 0x6020101b
 #define MASK_CPOPW 0xfff0707f
-#define MATCH_CRAS16 0x44000077
-#define MASK_CRAS16 0xfe00707f
-#define MATCH_CRAS32 0x44002077
-#define MASK_CRAS32 0xfe00707f
-#define MATCH_CRC32_B 0x61001013
-#define MASK_CRC32_B 0xfff0707f
-#define MATCH_CRC32_D 0x61301013
-#define MASK_CRC32_D 0xfff0707f
-#define MATCH_CRC32_H 0x61101013
-#define MASK_CRC32_H 0xfff0707f
-#define MATCH_CRC32_W 0x61201013
-#define MASK_CRC32_W 0xfff0707f
-#define MATCH_CRC32C_B 0x61801013
-#define MASK_CRC32C_B 0xfff0707f
-#define MATCH_CRC32C_D 0x61b01013
-#define MASK_CRC32C_D 0xfff0707f
-#define MATCH_CRC32C_H 0x61901013
-#define MASK_CRC32C_H 0xfff0707f
-#define MATCH_CRC32C_W 0x61a01013
-#define MASK_CRC32C_W 0xfff0707f
-#define MATCH_CRSA16 0x46000077
-#define MASK_CRSA16 0xfe00707f
-#define MATCH_CRSA32 0x46002077
-#define MASK_CRSA32 0xfe00707f
 #define MATCH_CSRRC 0x3073
 #define MASK_CSRRC 0x707f
 #define MATCH_CSRRCI 0x7073
@@ -1152,10 +1089,6 @@
 #define MASK_FSGNJX_S 0xfe00707f
 #define MATCH_FSH 0x1027
 #define MASK_FSH 0x707f
-#define MATCH_FSL 0x4001033
-#define MASK_FSL 0x600707f
-#define MATCH_FSLW 0x400103b
-#define MASK_FSLW 0x600707f
 #define MATCH_FSQ 0x4027
 #define MASK_FSQ 0x707f
 #define MATCH_FSQRT_D 0x5a000053
@@ -1166,14 +1099,6 @@
 #define MASK_FSQRT_Q 0xfff0007f
 #define MATCH_FSQRT_S 0x58000053
 #define MASK_FSQRT_S 0xfff0007f
-#define MATCH_FSR 0x4005033
-#define MASK_FSR 0x600707f
-#define MATCH_FSRI 0x4005013
-#define MASK_FSRI 0x400707f
-#define MATCH_FSRIW 0x400501b
-#define MASK_FSRIW 0x600707f
-#define MATCH_FSRW 0x400503b
-#define MASK_FSRW 0x600707f
 #define MATCH_FSUB_D 0xa000053
 #define MASK_FSUB_D 0xfe00007f
 #define MATCH_FSUB_H 0xc000053
@@ -1184,22 +1109,10 @@
 #define MASK_FSUB_S 0xfe00007f
 #define MATCH_FSW 0x2027
 #define MASK_FSW 0x707f
-#define MATCH_GORC 0x28005033
-#define MASK_GORC 0xfe00707f
 #define MATCH_GORCI 0x28005013
 #define MASK_GORCI 0xfc00707f
-#define MATCH_GORCIW 0x2800501b
-#define MASK_GORCIW 0xfe00707f
-#define MATCH_GORCW 0x2800503b
-#define MASK_GORCW 0xfe00707f
-#define MATCH_GREV 0x68005033
-#define MASK_GREV 0xfe00707f
 #define MATCH_GREVI 0x68005013
 #define MASK_GREVI 0xfc00707f
-#define MATCH_GREVIW 0x6800501b
-#define MASK_GREVIW 0xfe00707f
-#define MATCH_GREVW 0x6800503b
-#define MASK_GREVW 0xfe00707f
 #define MATCH_HFENCE_GVMA 0x62000073
 #define MASK_HFENCE_GVMA 0xfe007fff
 #define MATCH_HFENCE_VVMA 0x22000073
@@ -1234,222 +1147,18 @@
 #define MASK_HSV_H 0xfe007fff
 #define MATCH_HSV_W 0x6a004073
 #define MASK_HSV_W 0xfe007fff
-#define MATCH_INSB 0xac000077
-#define MASK_INSB 0xff80707f
 #define MATCH_JAL 0x6f
 #define MASK_JAL 0x7f
 #define MATCH_JALR 0x67
 #define MASK_JALR 0x707f
-#define MATCH_KABS16 0xad100077
-#define MASK_KABS16 0xfff0707f
-#define MATCH_KABS32 0xad200077
-#define MASK_KABS32 0xfff0707f
-#define MATCH_KABS8 0xad000077
-#define MASK_KABS8 0xfff0707f
-#define MATCH_KABSW 0xad400077
-#define MASK_KABSW 0xfff0707f
-#define MATCH_KADD16 0x10000077
-#define MASK_KADD16 0xfe00707f
-#define MATCH_KADD32 0x10002077
-#define MASK_KADD32 0xfe00707f
 #define MATCH_KADD64 0x90001077
 #define MASK_KADD64 0xfe00707f
-#define MATCH_KADD8 0x18000077
-#define MASK_KADD8 0xfe00707f
-#define MATCH_KADDH 0x4001077
-#define MASK_KADDH 0xfe00707f
-#define MATCH_KADDW 0x1077
-#define MASK_KADDW 0xfe00707f
-#define MATCH_KCRAS16 0x14000077
-#define MASK_KCRAS16 0xfe00707f
-#define MATCH_KCRAS32 0x14002077
-#define MASK_KCRAS32 0xfe00707f
-#define MATCH_KCRSA16 0x16000077
-#define MASK_KCRSA16 0xfe00707f
-#define MATCH_KCRSA32 0x16002077
-#define MASK_KCRSA32 0xfe00707f
-#define MATCH_KDMABB 0xd2001077
-#define MASK_KDMABB 0xfe00707f
-#define MATCH_KDMABB16 0xd8001077
-#define MASK_KDMABB16 0xfe00707f
-#define MATCH_KDMABT 0xe2001077
-#define MASK_KDMABT 0xfe00707f
-#define MATCH_KDMABT16 0xe8001077
-#define MASK_KDMABT16 0xfe00707f
-#define MATCH_KDMATT 0xf2001077
-#define MASK_KDMATT 0xfe00707f
-#define MATCH_KDMATT16 0xf8001077
-#define MASK_KDMATT16 0xfe00707f
-#define MATCH_KDMBB 0xa001077
-#define MASK_KDMBB 0xfe00707f
-#define MATCH_KDMBB16 0xda001077
-#define MASK_KDMBB16 0xfe00707f
-#define MATCH_KDMBT 0x1a001077
-#define MASK_KDMBT 0xfe00707f
-#define MATCH_KDMBT16 0xea001077
-#define MASK_KDMBT16 0xfe00707f
-#define MATCH_KDMTT 0x2a001077
-#define MASK_KDMTT 0xfe00707f
-#define MATCH_KDMTT16 0xfa001077
-#define MASK_KDMTT16 0xfe00707f
-#define MATCH_KHM16 0x86000077
-#define MASK_KHM16 0xfe00707f
-#define MATCH_KHM8 0x8e000077
-#define MASK_KHM8 0xfe00707f
-#define MATCH_KHMBB 0xc001077
-#define MASK_KHMBB 0xfe00707f
-#define MATCH_KHMBB16 0xdc001077
-#define MASK_KHMBB16 0xfe00707f
-#define MATCH_KHMBT 0x1c001077
-#define MASK_KHMBT 0xfe00707f
-#define MATCH_KHMBT16 0xec001077
-#define MASK_KHMBT16 0xfe00707f
-#define MATCH_KHMTT 0x2c001077
-#define MASK_KHMTT 0xfe00707f
-#define MATCH_KHMTT16 0xfc001077
-#define MASK_KHMTT16 0xfe00707f
-#define MATCH_KHMX16 0x96000077
-#define MASK_KHMX16 0xfe00707f
-#define MATCH_KHMX8 0x9e000077
-#define MASK_KHMX8 0xfe00707f
-#define MATCH_KMABB 0x5a001077
-#define MASK_KMABB 0xfe00707f
-#define MATCH_KMABB32 0x5a002077
-#define MASK_KMABB32 0xfe00707f
-#define MATCH_KMABT 0x6a001077
-#define MASK_KMABT 0xfe00707f
-#define MATCH_KMABT32 0x6a002077
-#define MASK_KMABT32 0xfe00707f
-#define MATCH_KMADA 0x48001077
-#define MASK_KMADA 0xfe00707f
-#define MATCH_KMADRS 0x6c001077
-#define MASK_KMADRS 0xfe00707f
-#define MATCH_KMADRS32 0x6c002077
-#define MASK_KMADRS32 0xfe00707f
-#define MATCH_KMADS 0x5c001077
-#define MASK_KMADS 0xfe00707f
-#define MATCH_KMADS32 0x5c002077
-#define MASK_KMADS32 0xfe00707f
 #define MATCH_KMAR64 0x94001077
 #define MASK_KMAR64 0xfe00707f
-#define MATCH_KMATT 0x7a001077
-#define MASK_KMATT 0xfe00707f
-#define MATCH_KMATT32 0x7a002077
-#define MASK_KMATT32 0xfe00707f
-#define MATCH_KMAXDA 0x4a001077
-#define MASK_KMAXDA 0xfe00707f
-#define MATCH_KMAXDA32 0x4a002077
-#define MASK_KMAXDA32 0xfe00707f
-#define MATCH_KMAXDS 0x7c001077
-#define MASK_KMAXDS 0xfe00707f
-#define MATCH_KMAXDS32 0x7c002077
-#define MASK_KMAXDS32 0xfe00707f
-#define MATCH_KMDA 0x38001077
-#define MASK_KMDA 0xfe00707f
-#define MATCH_KMDA32 0x38002077
-#define MASK_KMDA32 0xfe00707f
-#define MATCH_KMMAC 0x60001077
-#define MASK_KMMAC 0xfe00707f
-#define MATCH_KMMAC_U 0x70001077
-#define MASK_KMMAC_U 0xfe00707f
-#define MATCH_KMMAWB 0x46001077
-#define MASK_KMMAWB 0xfe00707f
-#define MATCH_KMMAWB2 0xce001077
-#define MASK_KMMAWB2 0xfe00707f
-#define MATCH_KMMAWB2_U 0xde001077
-#define MASK_KMMAWB2_U 0xfe00707f
-#define MATCH_KMMAWB_U 0x56001077
-#define MASK_KMMAWB_U 0xfe00707f
-#define MATCH_KMMAWT 0x66001077
-#define MASK_KMMAWT 0xfe00707f
-#define MATCH_KMMAWT2 0xee001077
-#define MASK_KMMAWT2 0xfe00707f
-#define MATCH_KMMAWT2_U 0xfe001077
-#define MASK_KMMAWT2_U 0xfe00707f
-#define MATCH_KMMAWT_U 0x76001077
-#define MASK_KMMAWT_U 0xfe00707f
-#define MATCH_KMMSB 0x42001077
-#define MASK_KMMSB 0xfe00707f
-#define MATCH_KMMSB_U 0x52001077
-#define MASK_KMMSB_U 0xfe00707f
-#define MATCH_KMMWB2 0x8e001077
-#define MASK_KMMWB2 0xfe00707f
-#define MATCH_KMMWB2_U 0x9e001077
-#define MASK_KMMWB2_U 0xfe00707f
-#define MATCH_KMMWT2 0xae001077
-#define MASK_KMMWT2 0xfe00707f
-#define MATCH_KMMWT2_U 0xbe001077
-#define MASK_KMMWT2_U 0xfe00707f
-#define MATCH_KMSDA 0x4c001077
-#define MASK_KMSDA 0xfe00707f
-#define MATCH_KMSDA32 0x4c002077
-#define MASK_KMSDA32 0xfe00707f
 #define MATCH_KMSR64 0x96001077
 #define MASK_KMSR64 0xfe00707f
-#define MATCH_KMSXDA 0x4e001077
-#define MASK_KMSXDA 0xfe00707f
-#define MATCH_KMSXDA32 0x4e002077
-#define MASK_KMSXDA32 0xfe00707f
-#define MATCH_KMXDA 0x3a001077
-#define MASK_KMXDA 0xfe00707f
-#define MATCH_KMXDA32 0x3a002077
-#define MASK_KMXDA32 0xfe00707f
-#define MATCH_KSLL16 0x64000077
-#define MASK_KSLL16 0xfe00707f
-#define MATCH_KSLL32 0x64002077
-#define MASK_KSLL32 0xfe00707f
-#define MATCH_KSLL8 0x6c000077
-#define MASK_KSLL8 0xfe00707f
-#define MATCH_KSLLI16 0x75000077
-#define MASK_KSLLI16 0xff00707f
-#define MATCH_KSLLI32 0x84002077
-#define MASK_KSLLI32 0xfe00707f
-#define MATCH_KSLLI8 0x7c800077
-#define MASK_KSLLI8 0xff80707f
-#define MATCH_KSLLIW 0x36001077
-#define MASK_KSLLIW 0xfe00707f
-#define MATCH_KSLLW 0x26001077
-#define MASK_KSLLW 0xfe00707f
-#define MATCH_KSLRA16 0x56000077
-#define MASK_KSLRA16 0xfe00707f
-#define MATCH_KSLRA16_U 0x66000077
-#define MASK_KSLRA16_U 0xfe00707f
-#define MATCH_KSLRA32 0x56002077
-#define MASK_KSLRA32 0xfe00707f
-#define MATCH_KSLRA32_U 0x66002077
-#define MASK_KSLRA32_U 0xfe00707f
-#define MATCH_KSLRA8 0x5e000077
-#define MASK_KSLRA8 0xfe00707f
-#define MATCH_KSLRA8_U 0x6e000077
-#define MASK_KSLRA8_U 0xfe00707f
-#define MATCH_KSLRAW 0x6e001077
-#define MASK_KSLRAW 0xfe00707f
-#define MATCH_KSLRAW_U 0x7e001077
-#define MASK_KSLRAW_U 0xfe00707f
-#define MATCH_KSTAS16 0xc4002077
-#define MASK_KSTAS16 0xfe00707f
-#define MATCH_KSTAS32 0xc0002077
-#define MASK_KSTAS32 0xfe00707f
-#define MATCH_KSTSA16 0xc6002077
-#define MASK_KSTSA16 0xfe00707f
-#define MATCH_KSTSA32 0xc2002077
-#define MASK_KSTSA32 0xfe00707f
-#define MATCH_KSUB16 0x12000077
-#define MASK_KSUB16 0xfe00707f
-#define MATCH_KSUB32 0x12002077
-#define MASK_KSUB32 0xfe00707f
 #define MATCH_KSUB64 0x92001077
 #define MASK_KSUB64 0xfe00707f
-#define MATCH_KSUB8 0x1a000077
-#define MASK_KSUB8 0xfe00707f
-#define MATCH_KSUBH 0x6001077
-#define MASK_KSUBH 0xfe00707f
-#define MATCH_KSUBW 0x2001077
-#define MASK_KSUBW 0xfe00707f
-#define MATCH_KWMMUL 0x62001077
-#define MASK_KWMMUL 0xfe00707f
-#define MATCH_KWMMUL_U 0x72001077
-#define MASK_KWMMUL_U 0xfe00707f
 #define MATCH_LB 0x3
 #define MASK_LB 0x707f
 #define MATCH_LB_AQ 0x3400002f
@@ -1460,8 +1169,6 @@
 #define MASK_LD 0x707f
 #define MATCH_LD_AQ 0x3400302f
 #define MASK_LD_AQ 0xfdf0707f
-#define MATCH_LDU 0x7003
-#define MASK_LDU 0x707f
 #define MATCH_LH 0x1003
 #define MASK_LH 0x707f
 #define MATCH_LH_AQ 0x3400102f
@@ -1470,8 +1177,6 @@
 #define MASK_LHU 0x707f
 #define MATCH_LPAD 0x17
 #define MASK_LPAD 0xfff
-#define MATCH_LQ 0x300f
-#define MASK_LQ 0x707f
 #define MATCH_LR_D 0x1000302f
 #define MASK_LR_D 0xf9f0707f
 #define MATCH_LR_W 0x1000202f
@@ -1484,8 +1189,6 @@
 #define MASK_LW_AQ 0xfdf0707f
 #define MATCH_LWU 0x6003
 #define MASK_LWU 0x707f
-#define MATCH_MADDR32 0xc4001077
-#define MASK_MADDR32 0xfe00707f
 #define MATCH_MAX 0xa006033
 #define MASK_MAX 0xfe00707f
 #define MATCH_MAXU 0xa007033
@@ -1582,8 +1285,6 @@
 #define MASK_MOP_RR_N 0xb200707f
 #define MATCH_MRET 0x30200073
 #define MASK_MRET 0xffffffff
-#define MATCH_MSUBR32 0xc6001077
-#define MASK_MSUBR32 0xfe00707f
 #define MATCH_MUL 0x2000033
 #define MASK_MUL 0xfe00707f
 #define MATCH_MULH 0x2001033
@@ -1608,54 +1309,18 @@
 #define MASK_PACK 0xfe00707f
 #define MATCH_PACKH 0x8007033
 #define MASK_PACKH 0xfe00707f
-#define MATCH_PACKU 0x48004033
-#define MASK_PACKU 0xfe00707f
-#define MATCH_PACKUW 0x4800403b
-#define MASK_PACKUW 0xfe00707f
 #define MATCH_PACKW 0x800403b
 #define MASK_PACKW 0xfe00707f
 #define MATCH_PAUSE 0x100000f
 #define MASK_PAUSE 0xffffffff
-#define MATCH_PBSAD 0xfc000077
-#define MASK_PBSAD 0xfe00707f
-#define MATCH_PBSADA 0xfe000077
-#define MASK_PBSADA 0xfe00707f
-#define MATCH_PKBB16 0xe001077
-#define MASK_PKBB16 0xfe00707f
-#define MATCH_PKBT16 0x1e001077
-#define MASK_PKBT16 0xfe00707f
-#define MATCH_PKBT32 0x1e002077
-#define MASK_PKBT32 0xfe00707f
-#define MATCH_PKTB16 0x3e001077
-#define MASK_PKTB16 0xfe00707f
-#define MATCH_PKTB32 0x3e002077
-#define MASK_PKTB32 0xfe00707f
-#define MATCH_PKTT16 0x2e001077
-#define MASK_PKTT16 0xfe00707f
 #define MATCH_PREFETCH_I 0x6013
 #define MASK_PREFETCH_I 0x1f07fff
 #define MATCH_PREFETCH_R 0x106013
 #define MASK_PREFETCH_R 0x1f07fff
 #define MATCH_PREFETCH_W 0x306013
 #define MASK_PREFETCH_W 0x1f07fff
-#define MATCH_RADD16 0x77
-#define MASK_RADD16 0xfe00707f
-#define MATCH_RADD32 0x2077
-#define MASK_RADD32 0xfe00707f
 #define MATCH_RADD64 0x80001077
 #define MASK_RADD64 0xfe00707f
-#define MATCH_RADD8 0x8000077
-#define MASK_RADD8 0xfe00707f
-#define MATCH_RADDW 0x20001077
-#define MASK_RADDW 0xfe00707f
-#define MATCH_RCRAS16 0x4000077
-#define MASK_RCRAS16 0xfe00707f
-#define MATCH_RCRAS32 0x4002077
-#define MASK_RCRAS32 0xfe00707f
-#define MATCH_RCRSA16 0x6000077
-#define MASK_RCRSA16 0xfe00707f
-#define MATCH_RCRSA32 0x6002077
-#define MASK_RCRSA32 0xfe00707f
 #define MATCH_REM 0x2006033
 #define MASK_REM 0xfe00707f
 #define MATCH_REMU 0x2007033
@@ -1676,24 +1341,8 @@
 #define MASK_RORIW 0xfe00707f
 #define MATCH_RORW 0x6000503b
 #define MASK_RORW 0xfe00707f
-#define MATCH_RSTAS16 0xb4002077
-#define MASK_RSTAS16 0xfe00707f
-#define MATCH_RSTAS32 0xb0002077
-#define MASK_RSTAS32 0xfe00707f
-#define MATCH_RSTSA16 0xb6002077
-#define MASK_RSTSA16 0xfe00707f
-#define MATCH_RSTSA32 0xb2002077
-#define MASK_RSTSA32 0xfe00707f
-#define MATCH_RSUB16 0x2000077
-#define MASK_RSUB16 0xfe00707f
-#define MATCH_RSUB32 0x2002077
-#define MASK_RSUB32 0xfe00707f
 #define MATCH_RSUB64 0x82001077
 #define MASK_RSUB64 0xfe00707f
-#define MATCH_RSUB8 0xa000077
-#define MASK_RSUB8 0xfe00707f
-#define MATCH_RSUBW 0x22001077
-#define MASK_RSUBW 0xfe00707f
 #define MATCH_SB 0x23
 #define MASK_SB 0x707f
 #define MATCH_SB_RL 0x3a00002f
@@ -1702,20 +1351,6 @@
 #define MASK_SC_D 0xf800707f
 #define MATCH_SC_W 0x1800202f
 #define MASK_SC_W 0xf800707f
-#define MATCH_SCLIP16 0x84000077
-#define MASK_SCLIP16 0xff00707f
-#define MATCH_SCLIP32 0xe4000077
-#define MASK_SCLIP32 0xfe00707f
-#define MATCH_SCLIP8 0x8c000077
-#define MASK_SCLIP8 0xff80707f
-#define MATCH_SCMPLE16 0x1c000077
-#define MASK_SCMPLE16 0xfe00707f
-#define MATCH_SCMPLE8 0x1e000077
-#define MASK_SCMPLE8 0xfe00707f
-#define MATCH_SCMPLT16 0xc000077
-#define MASK_SCMPLT16 0xfe00707f
-#define MATCH_SCMPLT8 0xe000077
-#define MASK_SCMPLT8 0xfe00707f
 #define MATCH_SD 0x3023
 #define MASK_SD 0x707f
 #define MATCH_SD_RL 0x3a00302f
@@ -1774,40 +1409,18 @@
 #define MASK_SHA512SUM1 0xfff0707f
 #define MATCH_SHA512SUM1R 0x52000033
 #define MASK_SHA512SUM1R 0xfe00707f
-#define MATCH_SHFL 0x8001033
-#define MASK_SHFL 0xfe00707f
 #define MATCH_SHFLI 0x8001013
 #define MASK_SHFLI 0xfe00707f
-#define MATCH_SHFLW 0x800103b
-#define MASK_SHFLW 0xfe00707f
 #define MATCH_SINVAL_VMA 0x16000073
 #define MASK_SINVAL_VMA 0xfe007fff
 #define MATCH_SLL 0x1033
 #define MASK_SLL 0xfe00707f
-#define MATCH_SLL16 0x54000077
-#define MASK_SLL16 0xfe00707f
-#define MATCH_SLL32 0x54002077
-#define MASK_SLL32 0xfe00707f
-#define MATCH_SLL8 0x5c000077
-#define MASK_SLL8 0xfe00707f
-#define MATCH_SLLD 0x107b
-#define MASK_SLLD 0xfe00707f
 #define MATCH_SLLI 0x1013
 #define MASK_SLLI 0xfc00707f
-#define MATCH_SLLI16 0x74000077
-#define MASK_SLLI16 0xff00707f
-#define MATCH_SLLI32 0x74002077
-#define MASK_SLLI32 0xfe00707f
-#define MATCH_SLLI8 0x7c000077
-#define MASK_SLLI8 0xff80707f
-#define MATCH_SLLI_RV128 0x1013
-#define MASK_SLLI_RV128 0xf800707f
 #define MATCH_SLLI_RV32 0x1013
 #define MASK_SLLI_RV32 0xfe00707f
 #define MATCH_SLLI_UW 0x800101b
 #define MASK_SLLI_UW 0xfc00707f
-#define MATCH_SLLID 0x105b
-#define MASK_SLLID 0xfc00707f
 #define MATCH_SLLIW 0x101b
 #define MASK_SLLIW 0xfe00707f
 #define MATCH_SLLW 0x103b
@@ -1854,60 +1467,14 @@
 #define MASK_SMALXDA 0xfe00707f
 #define MATCH_SMALXDS 0xaa001077
 #define MASK_SMALXDS 0xfe00707f
-#define MATCH_SMAQA 0xc8000077
-#define MASK_SMAQA 0xfe00707f
-#define MATCH_SMAQA_SU 0xca000077
-#define MASK_SMAQA_SU 0xfe00707f
 #define MATCH_SMAR64 0x84001077
 #define MASK_SMAR64 0xfe00707f
-#define MATCH_SMAX16 0x82000077
-#define MASK_SMAX16 0xfe00707f
-#define MATCH_SMAX32 0x92002077
-#define MASK_SMAX32 0xfe00707f
-#define MATCH_SMAX8 0x8a000077
-#define MASK_SMAX8 0xfe00707f
-#define MATCH_SMBB16 0x8001077
-#define MASK_SMBB16 0xfe00707f
-#define MATCH_SMBT16 0x18001077
-#define MASK_SMBT16 0xfe00707f
-#define MATCH_SMBT32 0x18002077
-#define MASK_SMBT32 0xfe00707f
-#define MATCH_SMDRS 0x68001077
-#define MASK_SMDRS 0xfe00707f
-#define MATCH_SMDRS32 0x68002077
-#define MASK_SMDRS32 0xfe00707f
-#define MATCH_SMDS 0x58001077
-#define MASK_SMDS 0xfe00707f
-#define MATCH_SMDS32 0x58002077
-#define MASK_SMDS32 0xfe00707f
-#define MATCH_SMIN16 0x80000077
-#define MASK_SMIN16 0xfe00707f
-#define MATCH_SMIN32 0x90002077
-#define MASK_SMIN32 0xfe00707f
-#define MATCH_SMIN8 0x88000077
-#define MASK_SMIN8 0xfe00707f
-#define MATCH_SMMUL 0x40001077
-#define MASK_SMMUL 0xfe00707f
-#define MATCH_SMMUL_U 0x50001077
-#define MASK_SMMUL_U 0xfe00707f
-#define MATCH_SMMWB 0x44001077
-#define MASK_SMMWB 0xfe00707f
-#define MATCH_SMMWB_U 0x54001077
-#define MASK_SMMWB_U 0xfe00707f
-#define MATCH_SMMWT 0x64001077
-#define MASK_SMMWT 0xfe00707f
-#define MATCH_SMMWT_U 0x74001077
-#define MASK_SMMWT_U 0xfe00707f
 #define MATCH_SMSLDA 0xac001077
 #define MASK_SMSLDA 0xfe00707f
 #define MATCH_SMSLXDA 0xbc001077
 #define MASK_SMSLXDA 0xfe00707f
 #define MATCH_SMSR64 0x86001077
 #define MASK_SMSR64 0xfe00707f
-#define MATCH_SMTT16 0x28001077
-#define MASK_SMTT16 0xfe00707f
-#define MATCH_SMTT32 0x28002077
-#define MASK_SMTT32 0xfe00707f
 #define MATCH_SMUL16 0xa0000077
 #define MASK_SMUL16 0xfe00707f
 #define MATCH_SMUL8 0xa8000077
@@ -1916,96 +1483,24 @@
 #define MASK_SMULX16 0xfe00707f
 #define MATCH_SMULX8 0xaa000077
 #define MASK_SMULX8 0xfe00707f
-#define MATCH_SMXDS 0x78001077
-#define MASK_SMXDS 0xfe00707f
-#define MATCH_SMXDS32 0x78002077
-#define MASK_SMXDS32 0xfe00707f
-#define MATCH_SQ 0x4023
-#define MASK_SQ 0x707f
 #define MATCH_SRA 0x40005033
 #define MASK_SRA 0xfe00707f
-#define MATCH_SRA16 0x50000077
-#define MASK_SRA16 0xfe00707f
-#define MATCH_SRA16_U 0x60000077
-#define MASK_SRA16_U 0xfe00707f
-#define MATCH_SRA32 0x50002077
-#define MASK_SRA32 0xfe00707f
-#define MATCH_SRA32_U 0x60002077
-#define MASK_SRA32_U 0xfe00707f
-#define MATCH_SRA8 0x58000077
-#define MASK_SRA8 0xfe00707f
-#define MATCH_SRA8_U 0x68000077
-#define MASK_SRA8_U 0xfe00707f
-#define MATCH_SRA_U 0x24001077
-#define MASK_SRA_U 0xfe00707f
-#define MATCH_SRAD 0x4000507b
-#define MASK_SRAD 0xfe00707f
 #define MATCH_SRAI 0x40005013
 #define MASK_SRAI 0xfc00707f
-#define MATCH_SRAI16 0x70000077
-#define MASK_SRAI16 0xff00707f
-#define MATCH_SRAI16_U 0x71000077
-#define MASK_SRAI16_U 0xff00707f
-#define MATCH_SRAI32 0x70002077
-#define MASK_SRAI32 0xfe00707f
-#define MATCH_SRAI32_U 0x80002077
-#define MASK_SRAI32_U 0xfe00707f
-#define MATCH_SRAI8 0x78000077
-#define MASK_SRAI8 0xff80707f
-#define MATCH_SRAI8_U 0x78800077
-#define MASK_SRAI8_U 0xff80707f
-#define MATCH_SRAI_RV128 0x40005013
-#define MASK_SRAI_RV128 0xf800707f
 #define MATCH_SRAI_RV32 0x40005013
 #define MASK_SRAI_RV32 0xfe00707f
-#define MATCH_SRAI_U 0xd4001077
-#define MASK_SRAI_U 0xfc00707f
-#define MATCH_SRAID 0x4000505b
-#define MASK_SRAID 0xfc00707f
 #define MATCH_SRAIW 0x4000501b
 #define MASK_SRAIW 0xfe00707f
-#define MATCH_SRAIW_U 0x34001077
-#define MASK_SRAIW_U 0xfe00707f
 #define MATCH_SRAW 0x4000503b
 #define MASK_SRAW 0xfe00707f
 #define MATCH_SRET 0x10200073
 #define MASK_SRET 0xffffffff
 #define MATCH_SRL 0x5033
 #define MASK_SRL 0xfe00707f
-#define MATCH_SRL16 0x52000077
-#define MASK_SRL16 0xfe00707f
-#define MATCH_SRL16_U 0x62000077
-#define MASK_SRL16_U 0xfe00707f
-#define MATCH_SRL32 0x52002077
-#define MASK_SRL32 0xfe00707f
-#define MATCH_SRL32_U 0x62002077
-#define MASK_SRL32_U 0xfe00707f
-#define MATCH_SRL8 0x5a000077
-#define MASK_SRL8 0xfe00707f
-#define MATCH_SRL8_U 0x6a000077
-#define MASK_SRL8_U 0xfe00707f
-#define MATCH_SRLD 0x507b
-#define MASK_SRLD 0xfe00707f
 #define MATCH_SRLI 0x5013
 #define MASK_SRLI 0xfc00707f
-#define MATCH_SRLI16 0x72000077
-#define MASK_SRLI16 0xff00707f
-#define MATCH_SRLI16_U 0x73000077
-#define MASK_SRLI16_U 0xff00707f
-#define MATCH_SRLI32 0x72002077
-#define MASK_SRLI32 0xfe00707f
-#define MATCH_SRLI32_U 0x82002077
-#define MASK_SRLI32_U 0xfe00707f
-#define MATCH_SRLI8 0x7a000077
-#define MASK_SRLI8 0xff80707f
-#define MATCH_SRLI8_U 0x7a800077
-#define MASK_SRLI8_U 0xff80707f
-#define MATCH_SRLI_RV128 0x5013
-#define MASK_SRLI_RV128 0xf800707f
 #define MATCH_SRLI_RV32 0x5013
 #define MASK_SRLI_RV32 0xfe00707f
-#define MATCH_SRLID 0x505b
-#define MASK_SRLID 0xfc00707f
 #define MATCH_SRLIW 0x501b
 #define MASK_SRLIW 0xfe00707f
 #define MATCH_SRLW 0x503b
@@ -2032,116 +1527,26 @@
 #define MASK_SSPUSH_X5 0xffffffff
 #define MATCH_SSRDP 0xcdc04073
 #define MASK_SSRDP 0xfffff07f
-#define MATCH_STAS16 0xf4002077
-#define MASK_STAS16 0xfe00707f
-#define MATCH_STAS32 0xf0002077
-#define MASK_STAS32 0xfe00707f
-#define MATCH_STSA16 0xf6002077
-#define MASK_STSA16 0xfe00707f
-#define MATCH_STSA32 0xf2002077
-#define MASK_STSA32 0xfe00707f
 #define MATCH_SUB 0x40000033
 #define MASK_SUB 0xfe00707f
-#define MATCH_SUB16 0x42000077
-#define MASK_SUB16 0xfe00707f
-#define MATCH_SUB32 0x42002077
-#define MASK_SUB32 0xfe00707f
 #define MATCH_SUB64 0xc2001077
 #define MASK_SUB64 0xfe00707f
-#define MATCH_SUB8 0x4a000077
-#define MASK_SUB8 0xfe00707f
-#define MATCH_SUBD 0x4000007b
-#define MASK_SUBD 0xfe00707f
 #define MATCH_SUBW 0x4000003b
 #define MASK_SUBW 0xfe00707f
-#define MATCH_SUNPKD810 0xac800077
-#define MASK_SUNPKD810 0xfff0707f
-#define MATCH_SUNPKD820 0xac900077
-#define MASK_SUNPKD820 0xfff0707f
-#define MATCH_SUNPKD830 0xaca00077
-#define MASK_SUNPKD830 0xfff0707f
-#define MATCH_SUNPKD831 0xacb00077
-#define MASK_SUNPKD831 0xfff0707f
-#define MATCH_SUNPKD832 0xad300077
-#define MASK_SUNPKD832 0xfff0707f
 #define MATCH_SW 0x2023
 #define MASK_SW 0x707f
 #define MATCH_SW_RL 0x3a00202f
 #define MASK_SW_RL 0xfa007fff
-#define MATCH_UCLIP16 0x85000077
-#define MASK_UCLIP16 0xff00707f
-#define MATCH_UCLIP32 0xf4000077
-#define MASK_UCLIP32 0xfe00707f
-#define MATCH_UCLIP8 0x8d000077
-#define MASK_UCLIP8 0xff80707f
-#define MATCH_UCMPLE16 0x3c000077
-#define MASK_UCMPLE16 0xfe00707f
-#define MATCH_UCMPLE8 0x3e000077
-#define MASK_UCMPLE8 0xfe00707f
-#define MATCH_UCMPLT16 0x2c000077
-#define MASK_UCMPLT16 0xfe00707f
-#define MATCH_UCMPLT8 0x2e000077
-#define MASK_UCMPLT8 0xfe00707f
-#define MATCH_UKADD16 0x30000077
-#define MASK_UKADD16 0xfe00707f
-#define MATCH_UKADD32 0x30002077
-#define MASK_UKADD32 0xfe00707f
 #define MATCH_UKADD64 0xb0001077
 #define MASK_UKADD64 0xfe00707f
-#define MATCH_UKADD8 0x38000077
-#define MASK_UKADD8 0xfe00707f
-#define MATCH_UKADDH 0x14001077
-#define MASK_UKADDH 0xfe00707f
-#define MATCH_UKADDW 0x10001077
-#define MASK_UKADDW 0xfe00707f
-#define MATCH_UKCRAS16 0x34000077
-#define MASK_UKCRAS16 0xfe00707f
-#define MATCH_UKCRAS32 0x34002077
-#define MASK_UKCRAS32 0xfe00707f
-#define MATCH_UKCRSA16 0x36000077
-#define MASK_UKCRSA16 0xfe00707f
-#define MATCH_UKCRSA32 0x36002077
-#define MASK_UKCRSA32 0xfe00707f
 #define MATCH_UKMAR64 0xb4001077
 #define MASK_UKMAR64 0xfe00707f
 #define MATCH_UKMSR64 0xb6001077
 #define MASK_UKMSR64 0xfe00707f
-#define MATCH_UKSTAS16 0xe4002077
-#define MASK_UKSTAS16 0xfe00707f
-#define MATCH_UKSTAS32 0xe0002077
-#define MASK_UKSTAS32 0xfe00707f
-#define MATCH_UKSTSA16 0xe6002077
-#define MASK_UKSTSA16 0xfe00707f
-#define MATCH_UKSTSA32 0xe2002077
-#define MASK_UKSTSA32 0xfe00707f
-#define MATCH_UKSUB16 0x32000077
-#define MASK_UKSUB16 0xfe00707f
-#define MATCH_UKSUB32 0x32002077
-#define MASK_UKSUB32 0xfe00707f
 #define MATCH_UKSUB64 0xb2001077
 #define MASK_UKSUB64 0xfe00707f
-#define MATCH_UKSUB8 0x3a000077
-#define MASK_UKSUB8 0xfe00707f
-#define MATCH_UKSUBH 0x16001077
-#define MASK_UKSUBH 0xfe00707f
-#define MATCH_UKSUBW 0x12001077
-#define MASK_UKSUBW 0xfe00707f
-#define MATCH_UMAQA 0xcc000077
-#define MASK_UMAQA 0xfe00707f
 #define MATCH_UMAR64 0xa4001077
 #define MASK_UMAR64 0xfe00707f
-#define MATCH_UMAX16 0x92000077
-#define MASK_UMAX16 0xfe00707f
-#define MATCH_UMAX32 0xa2002077
-#define MASK_UMAX32 0xfe00707f
-#define MATCH_UMAX8 0x9a000077
-#define MASK_UMAX8 0xfe00707f
-#define MATCH_UMIN16 0x90000077
-#define MASK_UMIN16 0xfe00707f
-#define MATCH_UMIN32 0xa0002077
-#define MASK_UMIN32 0xfe00707f
-#define MATCH_UMIN8 0x98000077
-#define MASK_UMIN8 0xfe00707f
 #define MATCH_UMSR64 0xa6001077
 #define MASK_UMSR64 0xfe00707f
 #define MATCH_UMUL16 0xb0000077
@@ -2152,48 +1557,12 @@
 #define MASK_UMULX16 0xfe00707f
 #define MATCH_UMULX8 0xba000077
 #define MASK_UMULX8 0xfe00707f
-#define MATCH_UNSHFL 0x8005033
-#define MASK_UNSHFL 0xfe00707f
 #define MATCH_UNSHFLI 0x8005013
 #define MASK_UNSHFLI 0xfe00707f
-#define MATCH_UNSHFLW 0x800503b
-#define MASK_UNSHFLW 0xfe00707f
-#define MATCH_URADD16 0x20000077
-#define MASK_URADD16 0xfe00707f
-#define MATCH_URADD32 0x20002077
-#define MASK_URADD32 0xfe00707f
 #define MATCH_URADD64 0xa0001077
 #define MASK_URADD64 0xfe00707f
-#define MATCH_URADD8 0x28000077
-#define MASK_URADD8 0xfe00707f
-#define MATCH_URADDW 0x30001077
-#define MASK_URADDW 0xfe00707f
-#define MATCH_URCRAS16 0x24000077
-#define MASK_URCRAS16 0xfe00707f
-#define MATCH_URCRAS32 0x24002077
-#define MASK_URCRAS32 0xfe00707f
-#define MATCH_URCRSA16 0x26000077
-#define MASK_URCRSA16 0xfe00707f
-#define MATCH_URCRSA32 0x26002077
-#define MASK_URCRSA32 0xfe00707f
-#define MATCH_URSTAS16 0xd4002077
-#define MASK_URSTAS16 0xfe00707f
-#define MATCH_URSTAS32 0xd0002077
-#define MASK_URSTAS32 0xfe00707f
-#define MATCH_URSTSA16 0xd6002077
-#define MASK_URSTSA16 0xfe00707f
-#define MATCH_URSTSA32 0xd2002077
-#define MASK_URSTSA32 0xfe00707f
-#define MATCH_URSUB16 0x22000077
-#define MASK_URSUB16 0xfe00707f
-#define MATCH_URSUB32 0x22002077
-#define MASK_URSUB32 0xfe00707f
 #define MATCH_URSUB64 0xa2001077
 #define MASK_URSUB64 0xfe00707f
-#define MATCH_URSUB8 0x2a000077
-#define MASK_URSUB8 0xfe00707f
-#define MATCH_URSUBW 0x32001077
-#define MASK_URSUBW 0xfe00707f
 #define MATCH_VAADD_VV 0x24002057
 #define MASK_VAADD_VV 0xfc00707f
 #define MATCH_VAADD_VX 0x24006057
@@ -2516,30 +1885,14 @@
 #define MASK_VL8RE64_V 0xfff0707f
 #define MATCH_VL8RE8_V 0xe2800007
 #define MASK_VL8RE8_V 0xfff0707f
-#define MATCH_VLE1024_V 0x10007007
-#define MASK_VLE1024_V 0x1df0707f
-#define MATCH_VLE1024FF_V 0x11007007
-#define MASK_VLE1024FF_V 0x1df0707f
-#define MATCH_VLE128_V 0x10000007
-#define MASK_VLE128_V 0x1df0707f
-#define MATCH_VLE128FF_V 0x11000007
-#define MASK_VLE128FF_V 0x1df0707f
 #define MATCH_VLE16_V 0x5007
 #define MASK_VLE16_V 0x1df0707f
 #define MATCH_VLE16FF_V 0x1005007
 #define MASK_VLE16FF_V 0x1df0707f
-#define MATCH_VLE256_V 0x10005007
-#define MASK_VLE256_V 0x1df0707f
-#define MATCH_VLE256FF_V 0x11005007
-#define MASK_VLE256FF_V 0x1df0707f
 #define MATCH_VLE32_V 0x6007
 #define MASK_VLE32_V 0x1df0707f
 #define MATCH_VLE32FF_V 0x1006007
 #define MASK_VLE32FF_V 0x1df0707f
-#define MATCH_VLE512_V 0x10006007
-#define MASK_VLE512_V 0x1df0707f
-#define MATCH_VLE512FF_V 0x11006007
-#define MASK_VLE512FF_V 0x1df0707f
 #define MATCH_VLE64_V 0x7007
 #define MASK_VLE64_V 0x1df0707f
 #define MATCH_VLE64FF_V 0x1007007
@@ -2550,50 +1903,26 @@
 #define MASK_VLE8FF_V 0x1df0707f
 #define MATCH_VLM_V 0x2b00007
 #define MASK_VLM_V 0xfff0707f
-#define MATCH_VLOXEI1024_V 0x1c007007
-#define MASK_VLOXEI1024_V 0x1c00707f
-#define MATCH_VLOXEI128_V 0x1c000007
-#define MASK_VLOXEI128_V 0x1c00707f
 #define MATCH_VLOXEI16_V 0xc005007
 #define MASK_VLOXEI16_V 0x1c00707f
-#define MATCH_VLOXEI256_V 0x1c005007
-#define MASK_VLOXEI256_V 0x1c00707f
 #define MATCH_VLOXEI32_V 0xc006007
 #define MASK_VLOXEI32_V 0x1c00707f
-#define MATCH_VLOXEI512_V 0x1c006007
-#define MASK_VLOXEI512_V 0x1c00707f
 #define MATCH_VLOXEI64_V 0xc007007
 #define MASK_VLOXEI64_V 0x1c00707f
 #define MATCH_VLOXEI8_V 0xc000007
 #define MASK_VLOXEI8_V 0x1c00707f
-#define MATCH_VLSE1024_V 0x18007007
-#define MASK_VLSE1024_V 0x1c00707f
-#define MATCH_VLSE128_V 0x18000007
-#define MASK_VLSE128_V 0x1c00707f
 #define MATCH_VLSE16_V 0x8005007
 #define MASK_VLSE16_V 0x1c00707f
-#define MATCH_VLSE256_V 0x18005007
-#define MASK_VLSE256_V 0x1c00707f
 #define MATCH_VLSE32_V 0x8006007
 #define MASK_VLSE32_V 0x1c00707f
-#define MATCH_VLSE512_V 0x18006007
-#define MASK_VLSE512_V 0x1c00707f
 #define MATCH_VLSE64_V 0x8007007
 #define MASK_VLSE64_V 0x1c00707f
 #define MATCH_VLSE8_V 0x8000007
 #define MASK_VLSE8_V 0x1c00707f
-#define MATCH_VLUXEI1024_V 0x14007007
-#define MASK_VLUXEI1024_V 0x1c00707f
-#define MATCH_VLUXEI128_V 0x14000007
-#define MASK_VLUXEI128_V 0x1c00707f
 #define MATCH_VLUXEI16_V 0x4005007
 #define MASK_VLUXEI16_V 0x1c00707f
-#define MATCH_VLUXEI256_V 0x14005007
-#define MASK_VLUXEI256_V 0x1c00707f
 #define MATCH_VLUXEI32_V 0x4006007
 #define MASK_VLUXEI32_V 0x1c00707f
-#define MATCH_VLUXEI512_V 0x14006007
-#define MASK_VLUXEI512_V 0x1c00707f
 #define MATCH_VLUXEI64_V 0x4007007
 #define MASK_VLUXEI64_V 0x1c00707f
 #define MATCH_VLUXEI8_V 0x4000007
@@ -2874,18 +2203,10 @@
 #define MASK_VSBC_VVM 0xfe00707f
 #define MATCH_VSBC_VXM 0x48004057
 #define MASK_VSBC_VXM 0xfe00707f
-#define MATCH_VSE1024_V 0x10007027
-#define MASK_VSE1024_V 0x1df0707f
-#define MATCH_VSE128_V 0x10000027
-#define MASK_VSE128_V 0x1df0707f
 #define MATCH_VSE16_V 0x5027
 #define MASK_VSE16_V 0x1df0707f
-#define MATCH_VSE256_V 0x10005027
-#define MASK_VSE256_V 0x1df0707f
 #define MATCH_VSE32_V 0x6027
 #define MASK_VSE32_V 0x1df0707f
-#define MATCH_VSE512_V 0x10006027
-#define MASK_VSE512_V 0x1df0707f
 #define MATCH_VSE64_V 0x7027
 #define MASK_VSE64_V 0x1df0707f
 #define MATCH_VSE8_V 0x27
@@ -2942,18 +2263,10 @@
 #define MASK_VSMUL_VV 0xfc00707f
 #define MATCH_VSMUL_VX 0x9c004057
 #define MASK_VSMUL_VX 0xfc00707f
-#define MATCH_VSOXEI1024_V 0x1c007027
-#define MASK_VSOXEI1024_V 0x1c00707f
-#define MATCH_VSOXEI128_V 0x1c000027
-#define MASK_VSOXEI128_V 0x1c00707f
 #define MATCH_VSOXEI16_V 0xc005027
 #define MASK_VSOXEI16_V 0x1c00707f
-#define MATCH_VSOXEI256_V 0x1c005027
-#define MASK_VSOXEI256_V 0x1c00707f
 #define MATCH_VSOXEI32_V 0xc006027
 #define MASK_VSOXEI32_V 0x1c00707f
-#define MATCH_VSOXEI512_V 0x1c006027
-#define MASK_VSOXEI512_V 0x1c00707f
 #define MATCH_VSOXEI64_V 0xc007027
 #define MASK_VSOXEI64_V 0x1c00707f
 #define MATCH_VSOXEI8_V 0xc000027
@@ -2970,18 +2283,10 @@
 #define MASK_VSRL_VV 0xfc00707f
 #define MATCH_VSRL_VX 0xa0004057
 #define MASK_VSRL_VX 0xfc00707f
-#define MATCH_VSSE1024_V 0x18007027
-#define MASK_VSSE1024_V 0x1c00707f
-#define MATCH_VSSE128_V 0x18000027
-#define MASK_VSSE128_V 0x1c00707f
 #define MATCH_VSSE16_V 0x8005027
 #define MASK_VSSE16_V 0x1c00707f
-#define MATCH_VSSE256_V 0x18005027
-#define MASK_VSSE256_V 0x1c00707f
 #define MATCH_VSSE32_V 0x8006027
 #define MASK_VSSE32_V 0x1c00707f
-#define MATCH_VSSE512_V 0x18006027
-#define MASK_VSSE512_V 0x1c00707f
 #define MATCH_VSSE64_V 0x8007027
 #define MASK_VSSE64_V 0x1c00707f
 #define MATCH_VSSE8_V 0x8000027
@@ -3010,18 +2315,10 @@
 #define MASK_VSUB_VV 0xfc00707f
 #define MATCH_VSUB_VX 0x8004057
 #define MASK_VSUB_VX 0xfc00707f
-#define MATCH_VSUXEI1024_V 0x14007027
-#define MASK_VSUXEI1024_V 0x1c00707f
-#define MATCH_VSUXEI128_V 0x14000027
-#define MASK_VSUXEI128_V 0x1c00707f
 #define MATCH_VSUXEI16_V 0x4005027
 #define MASK_VSUXEI16_V 0x1c00707f
-#define MATCH_VSUXEI256_V 0x14005027
-#define MASK_VSUXEI256_V 0x1c00707f
 #define MATCH_VSUXEI32_V 0x4006027
 #define MASK_VSUXEI32_V 0x1c00707f
-#define MATCH_VSUXEI512_V 0x14006027
-#define MASK_VSUXEI512_V 0x1c00707f
 #define MATCH_VSUXEI64_V 0x4007027
 #define MASK_VSUXEI64_V 0x1c00707f
 #define MATCH_VSUXEI8_V 0x4000027
@@ -3126,16 +2423,6 @@
 #define MASK_XPERM4 0xfe00707f
 #define MATCH_XPERM8 0x28004033
 #define MASK_XPERM8 0xfe00707f
-#define MATCH_ZUNPKD810 0xacc00077
-#define MASK_ZUNPKD810 0xfff0707f
-#define MATCH_ZUNPKD820 0xacd00077
-#define MASK_ZUNPKD820 0xfff0707f
-#define MATCH_ZUNPKD830 0xace00077
-#define MASK_ZUNPKD830 0xfff0707f
-#define MATCH_ZUNPKD831 0xacf00077
-#define MASK_ZUNPKD831 0xfff0707f
-#define MATCH_ZUNPKD832 0xad700077
-#define MASK_ZUNPKD832 0xfff0707f
 
 #define CSR_FFLAGS 0x1
 #define CSR_FRM 0x2
@@ -3720,14 +3007,9 @@
 #endif
 #ifdef DECLARE_INSN
 DECLARE_INSN(add, MATCH_ADD, MASK_ADD)
-DECLARE_INSN(add16, MATCH_ADD16, MASK_ADD16)
-DECLARE_INSN(add32, MATCH_ADD32, MASK_ADD32)
 DECLARE_INSN(add64, MATCH_ADD64, MASK_ADD64)
-DECLARE_INSN(add8, MATCH_ADD8, MASK_ADD8)
 DECLARE_INSN(add_uw, MATCH_ADD_UW, MASK_ADD_UW)
-DECLARE_INSN(addd, MATCH_ADDD, MASK_ADDD)
 DECLARE_INSN(addi, MATCH_ADDI, MASK_ADDI)
-DECLARE_INSN(addid, MATCH_ADDID, MASK_ADDID)
 DECLARE_INSN(addiw, MATCH_ADDIW, MASK_ADDIW)
 DECLARE_INSN(addw, MATCH_ADDW, MASK_ADDW)
 DECLARE_INSN(aes32dsi, MATCH_AES32DSI, MASK_AES32DSI)
@@ -3786,27 +3068,17 @@ DECLARE_INSN(and, MATCH_AND, MASK_AND)
 DECLARE_INSN(andi, MATCH_ANDI, MASK_ANDI)
 DECLARE_INSN(andn, MATCH_ANDN, MASK_ANDN)
 DECLARE_INSN(auipc, MATCH_AUIPC, MASK_AUIPC)
-DECLARE_INSN(ave, MATCH_AVE, MASK_AVE)
 DECLARE_INSN(bclr, MATCH_BCLR, MASK_BCLR)
 DECLARE_INSN(bclri, MATCH_BCLRI, MASK_BCLRI)
-DECLARE_INSN(bcompress, MATCH_BCOMPRESS, MASK_BCOMPRESS)
-DECLARE_INSN(bcompressw, MATCH_BCOMPRESSW, MASK_BCOMPRESSW)
-DECLARE_INSN(bdecompress, MATCH_BDECOMPRESS, MASK_BDECOMPRESS)
-DECLARE_INSN(bdecompressw, MATCH_BDECOMPRESSW, MASK_BDECOMPRESSW)
 DECLARE_INSN(beq, MATCH_BEQ, MASK_BEQ)
 DECLARE_INSN(bext, MATCH_BEXT, MASK_BEXT)
 DECLARE_INSN(bexti, MATCH_BEXTI, MASK_BEXTI)
-DECLARE_INSN(bfp, MATCH_BFP, MASK_BFP)
-DECLARE_INSN(bfpw, MATCH_BFPW, MASK_BFPW)
 DECLARE_INSN(bge, MATCH_BGE, MASK_BGE)
 DECLARE_INSN(bgeu, MATCH_BGEU, MASK_BGEU)
 DECLARE_INSN(binv, MATCH_BINV, MASK_BINV)
 DECLARE_INSN(binvi, MATCH_BINVI, MASK_BINVI)
 DECLARE_INSN(blt, MATCH_BLT, MASK_BLT)
 DECLARE_INSN(bltu, MATCH_BLTU, MASK_BLTU)
-DECLARE_INSN(bmatflip, MATCH_BMATFLIP, MASK_BMATFLIP)
-DECLARE_INSN(bmator, MATCH_BMATOR, MASK_BMATOR)
-DECLARE_INSN(bmatxor, MATCH_BMATXOR, MASK_BMATXOR)
 DECLARE_INSN(bne, MATCH_BNE, MASK_BNE)
 DECLARE_INSN(bset, MATCH_BSET, MASK_BSET)
 DECLARE_INSN(bseti, MATCH_BSETI, MASK_BSETI)
@@ -3839,8 +3111,6 @@ DECLARE_INSN(c_ldsp, MATCH_C_LDSP, MASK_C_LDSP)
 DECLARE_INSN(c_lh, MATCH_C_LH, MASK_C_LH)
 DECLARE_INSN(c_lhu, MATCH_C_LHU, MASK_C_LHU)
 DECLARE_INSN(c_li, MATCH_C_LI, MASK_C_LI)
-DECLARE_INSN(c_lq, MATCH_C_LQ, MASK_C_LQ)
-DECLARE_INSN(c_lqsp, MATCH_C_LQSP, MASK_C_LQSP)
 DECLARE_INSN(c_lui, MATCH_C_LUI, MASK_C_LUI)
 DECLARE_INSN(c_lw, MATCH_C_LW, MASK_C_LW)
 DECLARE_INSN(c_lwsp, MATCH_C_LWSP, MASK_C_LWSP)
@@ -3865,8 +3135,6 @@ DECLARE_INSN(c_sext_b, MATCH_C_SEXT_B, MASK_C_SEXT_B)
 DECLARE_INSN(c_sext_h, MATCH_C_SEXT_H, MASK_C_SEXT_H)
 DECLARE_INSN(c_sh, MATCH_C_SH, MASK_C_SH)
 DECLARE_INSN(c_slli, MATCH_C_SLLI, MASK_C_SLLI)
-DECLARE_INSN(c_sq, MATCH_C_SQ, MASK_C_SQ)
-DECLARE_INSN(c_sqsp, MATCH_C_SQSP, MASK_C_SQSP)
 DECLARE_INSN(c_srai, MATCH_C_SRAI, MASK_C_SRAI)
 DECLARE_INSN(c_srli, MATCH_C_SRLI, MASK_C_SRLI)
 DECLARE_INSN(c_sspopchk_x5, MATCH_C_SSPOPCHK_X5, MASK_C_SSPOPCHK_X5)
@@ -3886,13 +3154,7 @@ DECLARE_INSN(cbo_zero, MATCH_CBO_ZERO, MASK_CBO_ZERO)
 DECLARE_INSN(clmul, MATCH_CLMUL, MASK_CLMUL)
 DECLARE_INSN(clmulh, MATCH_CLMULH, MASK_CLMULH)
 DECLARE_INSN(clmulr, MATCH_CLMULR, MASK_CLMULR)
-DECLARE_INSN(clrs16, MATCH_CLRS16, MASK_CLRS16)
-DECLARE_INSN(clrs32, MATCH_CLRS32, MASK_CLRS32)
-DECLARE_INSN(clrs8, MATCH_CLRS8, MASK_CLRS8)
 DECLARE_INSN(clz, MATCH_CLZ, MASK_CLZ)
-DECLARE_INSN(clz16, MATCH_CLZ16, MASK_CLZ16)
-DECLARE_INSN(clz32, MATCH_CLZ32, MASK_CLZ32)
-DECLARE_INSN(clz8, MATCH_CLZ8, MASK_CLZ8)
 DECLARE_INSN(clzw, MATCH_CLZW, MASK_CLZW)
 DECLARE_INSN(cm_jalt, MATCH_CM_JALT, MASK_CM_JALT)
 DECLARE_INSN(cm_mva01s, MATCH_CM_MVA01S, MASK_CM_MVA01S)
@@ -3901,24 +3163,8 @@ DECLARE_INSN(cm_pop, MATCH_CM_POP, MASK_CM_POP)
 DECLARE_INSN(cm_popret, MATCH_CM_POPRET, MASK_CM_POPRET)
 DECLARE_INSN(cm_popretz, MATCH_CM_POPRETZ, MASK_CM_POPRETZ)
 DECLARE_INSN(cm_push, MATCH_CM_PUSH, MASK_CM_PUSH)
-DECLARE_INSN(cmix, MATCH_CMIX, MASK_CMIX)
-DECLARE_INSN(cmov, MATCH_CMOV, MASK_CMOV)
-DECLARE_INSN(cmpeq16, MATCH_CMPEQ16, MASK_CMPEQ16)
-DECLARE_INSN(cmpeq8, MATCH_CMPEQ8, MASK_CMPEQ8)
 DECLARE_INSN(cpop, MATCH_CPOP, MASK_CPOP)
 DECLARE_INSN(cpopw, MATCH_CPOPW, MASK_CPOPW)
-DECLARE_INSN(cras16, MATCH_CRAS16, MASK_CRAS16)
-DECLARE_INSN(cras32, MATCH_CRAS32, MASK_CRAS32)
-DECLARE_INSN(crc32_b, MATCH_CRC32_B, MASK_CRC32_B)
-DECLARE_INSN(crc32_d, MATCH_CRC32_D, MASK_CRC32_D)
-DECLARE_INSN(crc32_h, MATCH_CRC32_H, MASK_CRC32_H)
-DECLARE_INSN(crc32_w, MATCH_CRC32_W, MASK_CRC32_W)
-DECLARE_INSN(crc32c_b, MATCH_CRC32C_B, MASK_CRC32C_B)
-DECLARE_INSN(crc32c_d, MATCH_CRC32C_D, MASK_CRC32C_D)
-DECLARE_INSN(crc32c_h, MATCH_CRC32C_H, MASK_CRC32C_H)
-DECLARE_INSN(crc32c_w, MATCH_CRC32C_W, MASK_CRC32C_W)
-DECLARE_INSN(crsa16, MATCH_CRSA16, MASK_CRSA16)
-DECLARE_INSN(crsa32, MATCH_CRSA32, MASK_CRSA32)
 DECLARE_INSN(csrrc, MATCH_CSRRC, MASK_CSRRC)
 DECLARE_INSN(csrrci, MATCH_CSRRCI, MASK_CSRRCI)
 DECLARE_INSN(csrrs, MATCH_CSRRS, MASK_CSRRS)
@@ -4093,30 +3339,18 @@ DECLARE_INSN(fsgnjx_h, MATCH_FSGNJX_H, MASK_FSGNJX_H)
 DECLARE_INSN(fsgnjx_q, MATCH_FSGNJX_Q, MASK_FSGNJX_Q)
 DECLARE_INSN(fsgnjx_s, MATCH_FSGNJX_S, MASK_FSGNJX_S)
 DECLARE_INSN(fsh, MATCH_FSH, MASK_FSH)
-DECLARE_INSN(fsl, MATCH_FSL, MASK_FSL)
-DECLARE_INSN(fslw, MATCH_FSLW, MASK_FSLW)
 DECLARE_INSN(fsq, MATCH_FSQ, MASK_FSQ)
 DECLARE_INSN(fsqrt_d, MATCH_FSQRT_D, MASK_FSQRT_D)
 DECLARE_INSN(fsqrt_h, MATCH_FSQRT_H, MASK_FSQRT_H)
 DECLARE_INSN(fsqrt_q, MATCH_FSQRT_Q, MASK_FSQRT_Q)
 DECLARE_INSN(fsqrt_s, MATCH_FSQRT_S, MASK_FSQRT_S)
-DECLARE_INSN(fsr, MATCH_FSR, MASK_FSR)
-DECLARE_INSN(fsri, MATCH_FSRI, MASK_FSRI)
-DECLARE_INSN(fsriw, MATCH_FSRIW, MASK_FSRIW)
-DECLARE_INSN(fsrw, MATCH_FSRW, MASK_FSRW)
 DECLARE_INSN(fsub_d, MATCH_FSUB_D, MASK_FSUB_D)
 DECLARE_INSN(fsub_h, MATCH_FSUB_H, MASK_FSUB_H)
 DECLARE_INSN(fsub_q, MATCH_FSUB_Q, MASK_FSUB_Q)
 DECLARE_INSN(fsub_s, MATCH_FSUB_S, MASK_FSUB_S)
 DECLARE_INSN(fsw, MATCH_FSW, MASK_FSW)
-DECLARE_INSN(gorc, MATCH_GORC, MASK_GORC)
 DECLARE_INSN(gorci, MATCH_GORCI, MASK_GORCI)
-DECLARE_INSN(gorciw, MATCH_GORCIW, MASK_GORCIW)
-DECLARE_INSN(gorcw, MATCH_GORCW, MASK_GORCW)
-DECLARE_INSN(grev, MATCH_GREV, MASK_GREV)
 DECLARE_INSN(grevi, MATCH_GREVI, MASK_GREVI)
-DECLARE_INSN(greviw, MATCH_GREVIW, MASK_GREVIW)
-DECLARE_INSN(grevw, MATCH_GREVW, MASK_GREVW)
 DECLARE_INSN(hfence_gvma, MATCH_HFENCE_GVMA, MASK_HFENCE_GVMA)
 DECLARE_INSN(hfence_vvma, MATCH_HFENCE_VVMA, MASK_HFENCE_VVMA)
 DECLARE_INSN(hinval_gvma, MATCH_HINVAL_GVMA, MASK_HINVAL_GVMA)
@@ -4134,132 +3368,27 @@ DECLARE_INSN(hsv_b, MATCH_HSV_B, MASK_HSV_B)
 DECLARE_INSN(hsv_d, MATCH_HSV_D, MASK_HSV_D)
 DECLARE_INSN(hsv_h, MATCH_HSV_H, MASK_HSV_H)
 DECLARE_INSN(hsv_w, MATCH_HSV_W, MASK_HSV_W)
-DECLARE_INSN(insb, MATCH_INSB, MASK_INSB)
 DECLARE_INSN(jal, MATCH_JAL, MASK_JAL)
 DECLARE_INSN(jalr, MATCH_JALR, MASK_JALR)
-DECLARE_INSN(kabs16, MATCH_KABS16, MASK_KABS16)
-DECLARE_INSN(kabs32, MATCH_KABS32, MASK_KABS32)
-DECLARE_INSN(kabs8, MATCH_KABS8, MASK_KABS8)
-DECLARE_INSN(kabsw, MATCH_KABSW, MASK_KABSW)
-DECLARE_INSN(kadd16, MATCH_KADD16, MASK_KADD16)
-DECLARE_INSN(kadd32, MATCH_KADD32, MASK_KADD32)
 DECLARE_INSN(kadd64, MATCH_KADD64, MASK_KADD64)
-DECLARE_INSN(kadd8, MATCH_KADD8, MASK_KADD8)
-DECLARE_INSN(kaddh, MATCH_KADDH, MASK_KADDH)
-DECLARE_INSN(kaddw, MATCH_KADDW, MASK_KADDW)
-DECLARE_INSN(kcras16, MATCH_KCRAS16, MASK_KCRAS16)
-DECLARE_INSN(kcras32, MATCH_KCRAS32, MASK_KCRAS32)
-DECLARE_INSN(kcrsa16, MATCH_KCRSA16, MASK_KCRSA16)
-DECLARE_INSN(kcrsa32, MATCH_KCRSA32, MASK_KCRSA32)
-DECLARE_INSN(kdmabb, MATCH_KDMABB, MASK_KDMABB)
-DECLARE_INSN(kdmabb16, MATCH_KDMABB16, MASK_KDMABB16)
-DECLARE_INSN(kdmabt, MATCH_KDMABT, MASK_KDMABT)
-DECLARE_INSN(kdmabt16, MATCH_KDMABT16, MASK_KDMABT16)
-DECLARE_INSN(kdmatt, MATCH_KDMATT, MASK_KDMATT)
-DECLARE_INSN(kdmatt16, MATCH_KDMATT16, MASK_KDMATT16)
-DECLARE_INSN(kdmbb, MATCH_KDMBB, MASK_KDMBB)
-DECLARE_INSN(kdmbb16, MATCH_KDMBB16, MASK_KDMBB16)
-DECLARE_INSN(kdmbt, MATCH_KDMBT, MASK_KDMBT)
-DECLARE_INSN(kdmbt16, MATCH_KDMBT16, MASK_KDMBT16)
-DECLARE_INSN(kdmtt, MATCH_KDMTT, MASK_KDMTT)
-DECLARE_INSN(kdmtt16, MATCH_KDMTT16, MASK_KDMTT16)
-DECLARE_INSN(khm16, MATCH_KHM16, MASK_KHM16)
-DECLARE_INSN(khm8, MATCH_KHM8, MASK_KHM8)
-DECLARE_INSN(khmbb, MATCH_KHMBB, MASK_KHMBB)
-DECLARE_INSN(khmbb16, MATCH_KHMBB16, MASK_KHMBB16)
-DECLARE_INSN(khmbt, MATCH_KHMBT, MASK_KHMBT)
-DECLARE_INSN(khmbt16, MATCH_KHMBT16, MASK_KHMBT16)
-DECLARE_INSN(khmtt, MATCH_KHMTT, MASK_KHMTT)
-DECLARE_INSN(khmtt16, MATCH_KHMTT16, MASK_KHMTT16)
-DECLARE_INSN(khmx16, MATCH_KHMX16, MASK_KHMX16)
-DECLARE_INSN(khmx8, MATCH_KHMX8, MASK_KHMX8)
-DECLARE_INSN(kmabb, MATCH_KMABB, MASK_KMABB)
-DECLARE_INSN(kmabb32, MATCH_KMABB32, MASK_KMABB32)
-DECLARE_INSN(kmabt, MATCH_KMABT, MASK_KMABT)
-DECLARE_INSN(kmabt32, MATCH_KMABT32, MASK_KMABT32)
-DECLARE_INSN(kmada, MATCH_KMADA, MASK_KMADA)
-DECLARE_INSN(kmadrs, MATCH_KMADRS, MASK_KMADRS)
-DECLARE_INSN(kmadrs32, MATCH_KMADRS32, MASK_KMADRS32)
-DECLARE_INSN(kmads, MATCH_KMADS, MASK_KMADS)
-DECLARE_INSN(kmads32, MATCH_KMADS32, MASK_KMADS32)
 DECLARE_INSN(kmar64, MATCH_KMAR64, MASK_KMAR64)
-DECLARE_INSN(kmatt, MATCH_KMATT, MASK_KMATT)
-DECLARE_INSN(kmatt32, MATCH_KMATT32, MASK_KMATT32)
-DECLARE_INSN(kmaxda, MATCH_KMAXDA, MASK_KMAXDA)
-DECLARE_INSN(kmaxda32, MATCH_KMAXDA32, MASK_KMAXDA32)
-DECLARE_INSN(kmaxds, MATCH_KMAXDS, MASK_KMAXDS)
-DECLARE_INSN(kmaxds32, MATCH_KMAXDS32, MASK_KMAXDS32)
-DECLARE_INSN(kmda, MATCH_KMDA, MASK_KMDA)
-DECLARE_INSN(kmda32, MATCH_KMDA32, MASK_KMDA32)
-DECLARE_INSN(kmmac, MATCH_KMMAC, MASK_KMMAC)
-DECLARE_INSN(kmmac_u, MATCH_KMMAC_U, MASK_KMMAC_U)
-DECLARE_INSN(kmmawb, MATCH_KMMAWB, MASK_KMMAWB)
-DECLARE_INSN(kmmawb2, MATCH_KMMAWB2, MASK_KMMAWB2)
-DECLARE_INSN(kmmawb2_u, MATCH_KMMAWB2_U, MASK_KMMAWB2_U)
-DECLARE_INSN(kmmawb_u, MATCH_KMMAWB_U, MASK_KMMAWB_U)
-DECLARE_INSN(kmmawt, MATCH_KMMAWT, MASK_KMMAWT)
-DECLARE_INSN(kmmawt2, MATCH_KMMAWT2, MASK_KMMAWT2)
-DECLARE_INSN(kmmawt2_u, MATCH_KMMAWT2_U, MASK_KMMAWT2_U)
-DECLARE_INSN(kmmawt_u, MATCH_KMMAWT_U, MASK_KMMAWT_U)
-DECLARE_INSN(kmmsb, MATCH_KMMSB, MASK_KMMSB)
-DECLARE_INSN(kmmsb_u, MATCH_KMMSB_U, MASK_KMMSB_U)
-DECLARE_INSN(kmmwb2, MATCH_KMMWB2, MASK_KMMWB2)
-DECLARE_INSN(kmmwb2_u, MATCH_KMMWB2_U, MASK_KMMWB2_U)
-DECLARE_INSN(kmmwt2, MATCH_KMMWT2, MASK_KMMWT2)
-DECLARE_INSN(kmmwt2_u, MATCH_KMMWT2_U, MASK_KMMWT2_U)
-DECLARE_INSN(kmsda, MATCH_KMSDA, MASK_KMSDA)
-DECLARE_INSN(kmsda32, MATCH_KMSDA32, MASK_KMSDA32)
 DECLARE_INSN(kmsr64, MATCH_KMSR64, MASK_KMSR64)
-DECLARE_INSN(kmsxda, MATCH_KMSXDA, MASK_KMSXDA)
-DECLARE_INSN(kmsxda32, MATCH_KMSXDA32, MASK_KMSXDA32)
-DECLARE_INSN(kmxda, MATCH_KMXDA, MASK_KMXDA)
-DECLARE_INSN(kmxda32, MATCH_KMXDA32, MASK_KMXDA32)
-DECLARE_INSN(ksll16, MATCH_KSLL16, MASK_KSLL16)
-DECLARE_INSN(ksll32, MATCH_KSLL32, MASK_KSLL32)
-DECLARE_INSN(ksll8, MATCH_KSLL8, MASK_KSLL8)
-DECLARE_INSN(kslli16, MATCH_KSLLI16, MASK_KSLLI16)
-DECLARE_INSN(kslli32, MATCH_KSLLI32, MASK_KSLLI32)
-DECLARE_INSN(kslli8, MATCH_KSLLI8, MASK_KSLLI8)
-DECLARE_INSN(kslliw, MATCH_KSLLIW, MASK_KSLLIW)
-DECLARE_INSN(ksllw, MATCH_KSLLW, MASK_KSLLW)
-DECLARE_INSN(kslra16, MATCH_KSLRA16, MASK_KSLRA16)
-DECLARE_INSN(kslra16_u, MATCH_KSLRA16_U, MASK_KSLRA16_U)
-DECLARE_INSN(kslra32, MATCH_KSLRA32, MASK_KSLRA32)
-DECLARE_INSN(kslra32_u, MATCH_KSLRA32_U, MASK_KSLRA32_U)
-DECLARE_INSN(kslra8, MATCH_KSLRA8, MASK_KSLRA8)
-DECLARE_INSN(kslra8_u, MATCH_KSLRA8_U, MASK_KSLRA8_U)
-DECLARE_INSN(kslraw, MATCH_KSLRAW, MASK_KSLRAW)
-DECLARE_INSN(kslraw_u, MATCH_KSLRAW_U, MASK_KSLRAW_U)
-DECLARE_INSN(kstas16, MATCH_KSTAS16, MASK_KSTAS16)
-DECLARE_INSN(kstas32, MATCH_KSTAS32, MASK_KSTAS32)
-DECLARE_INSN(kstsa16, MATCH_KSTSA16, MASK_KSTSA16)
-DECLARE_INSN(kstsa32, MATCH_KSTSA32, MASK_KSTSA32)
-DECLARE_INSN(ksub16, MATCH_KSUB16, MASK_KSUB16)
-DECLARE_INSN(ksub32, MATCH_KSUB32, MASK_KSUB32)
 DECLARE_INSN(ksub64, MATCH_KSUB64, MASK_KSUB64)
-DECLARE_INSN(ksub8, MATCH_KSUB8, MASK_KSUB8)
-DECLARE_INSN(ksubh, MATCH_KSUBH, MASK_KSUBH)
-DECLARE_INSN(ksubw, MATCH_KSUBW, MASK_KSUBW)
-DECLARE_INSN(kwmmul, MATCH_KWMMUL, MASK_KWMMUL)
-DECLARE_INSN(kwmmul_u, MATCH_KWMMUL_U, MASK_KWMMUL_U)
 DECLARE_INSN(lb, MATCH_LB, MASK_LB)
 DECLARE_INSN(lb_aq, MATCH_LB_AQ, MASK_LB_AQ)
 DECLARE_INSN(lbu, MATCH_LBU, MASK_LBU)
 DECLARE_INSN(ld, MATCH_LD, MASK_LD)
 DECLARE_INSN(ld_aq, MATCH_LD_AQ, MASK_LD_AQ)
-DECLARE_INSN(ldu, MATCH_LDU, MASK_LDU)
 DECLARE_INSN(lh, MATCH_LH, MASK_LH)
 DECLARE_INSN(lh_aq, MATCH_LH_AQ, MASK_LH_AQ)
 DECLARE_INSN(lhu, MATCH_LHU, MASK_LHU)
 DECLARE_INSN(lpad, MATCH_LPAD, MASK_LPAD)
-DECLARE_INSN(lq, MATCH_LQ, MASK_LQ)
 DECLARE_INSN(lr_d, MATCH_LR_D, MASK_LR_D)
 DECLARE_INSN(lr_w, MATCH_LR_W, MASK_LR_W)
 DECLARE_INSN(lui, MATCH_LUI, MASK_LUI)
 DECLARE_INSN(lw, MATCH_LW, MASK_LW)
 DECLARE_INSN(lw_aq, MATCH_LW_AQ, MASK_LW_AQ)
 DECLARE_INSN(lwu, MATCH_LWU, MASK_LWU)
-DECLARE_INSN(maddr32, MATCH_MADDR32, MASK_MADDR32)
 DECLARE_INSN(max, MATCH_MAX, MASK_MAX)
 DECLARE_INSN(maxu, MATCH_MAXU, MASK_MAXU)
 DECLARE_INSN(min, MATCH_MIN, MASK_MIN)
@@ -4308,7 +3437,6 @@ DECLARE_INSN(mop_rr_6, MATCH_MOP_RR_6, MASK_MOP_RR_6)
 DECLARE_INSN(mop_rr_7, MATCH_MOP_RR_7, MASK_MOP_RR_7)
 DECLARE_INSN(mop_rr_N, MATCH_MOP_RR_N, MASK_MOP_RR_N)
 DECLARE_INSN(mret, MATCH_MRET, MASK_MRET)
-DECLARE_INSN(msubr32, MATCH_MSUBR32, MASK_MSUBR32)
 DECLARE_INSN(mul, MATCH_MUL, MASK_MUL)
 DECLARE_INSN(mulh, MATCH_MULH, MASK_MULH)
 DECLARE_INSN(mulhsu, MATCH_MULHSU, MASK_MULHSU)
@@ -4321,30 +3449,12 @@ DECLARE_INSN(ori, MATCH_ORI, MASK_ORI)
 DECLARE_INSN(orn, MATCH_ORN, MASK_ORN)
 DECLARE_INSN(pack, MATCH_PACK, MASK_PACK)
 DECLARE_INSN(packh, MATCH_PACKH, MASK_PACKH)
-DECLARE_INSN(packu, MATCH_PACKU, MASK_PACKU)
-DECLARE_INSN(packuw, MATCH_PACKUW, MASK_PACKUW)
 DECLARE_INSN(packw, MATCH_PACKW, MASK_PACKW)
 DECLARE_INSN(pause, MATCH_PAUSE, MASK_PAUSE)
-DECLARE_INSN(pbsad, MATCH_PBSAD, MASK_PBSAD)
-DECLARE_INSN(pbsada, MATCH_PBSADA, MASK_PBSADA)
-DECLARE_INSN(pkbb16, MATCH_PKBB16, MASK_PKBB16)
-DECLARE_INSN(pkbt16, MATCH_PKBT16, MASK_PKBT16)
-DECLARE_INSN(pkbt32, MATCH_PKBT32, MASK_PKBT32)
-DECLARE_INSN(pktb16, MATCH_PKTB16, MASK_PKTB16)
-DECLARE_INSN(pktb32, MATCH_PKTB32, MASK_PKTB32)
-DECLARE_INSN(pktt16, MATCH_PKTT16, MASK_PKTT16)
 DECLARE_INSN(prefetch_i, MATCH_PREFETCH_I, MASK_PREFETCH_I)
 DECLARE_INSN(prefetch_r, MATCH_PREFETCH_R, MASK_PREFETCH_R)
 DECLARE_INSN(prefetch_w, MATCH_PREFETCH_W, MASK_PREFETCH_W)
-DECLARE_INSN(radd16, MATCH_RADD16, MASK_RADD16)
-DECLARE_INSN(radd32, MATCH_RADD32, MASK_RADD32)
 DECLARE_INSN(radd64, MATCH_RADD64, MASK_RADD64)
-DECLARE_INSN(radd8, MATCH_RADD8, MASK_RADD8)
-DECLARE_INSN(raddw, MATCH_RADDW, MASK_RADDW)
-DECLARE_INSN(rcras16, MATCH_RCRAS16, MASK_RCRAS16)
-DECLARE_INSN(rcras32, MATCH_RCRAS32, MASK_RCRAS32)
-DECLARE_INSN(rcrsa16, MATCH_RCRSA16, MASK_RCRSA16)
-DECLARE_INSN(rcrsa32, MATCH_RCRSA32, MASK_RCRSA32)
 DECLARE_INSN(rem, MATCH_REM, MASK_REM)
 DECLARE_INSN(remu, MATCH_REMU, MASK_REMU)
 DECLARE_INSN(remuw, MATCH_REMUW, MASK_REMUW)
@@ -4355,26 +3465,11 @@ DECLARE_INSN(ror, MATCH_ROR, MASK_ROR)
 DECLARE_INSN(rori, MATCH_RORI, MASK_RORI)
 DECLARE_INSN(roriw, MATCH_RORIW, MASK_RORIW)
 DECLARE_INSN(rorw, MATCH_RORW, MASK_RORW)
-DECLARE_INSN(rstas16, MATCH_RSTAS16, MASK_RSTAS16)
-DECLARE_INSN(rstas32, MATCH_RSTAS32, MASK_RSTAS32)
-DECLARE_INSN(rstsa16, MATCH_RSTSA16, MASK_RSTSA16)
-DECLARE_INSN(rstsa32, MATCH_RSTSA32, MASK_RSTSA32)
-DECLARE_INSN(rsub16, MATCH_RSUB16, MASK_RSUB16)
-DECLARE_INSN(rsub32, MATCH_RSUB32, MASK_RSUB32)
 DECLARE_INSN(rsub64, MATCH_RSUB64, MASK_RSUB64)
-DECLARE_INSN(rsub8, MATCH_RSUB8, MASK_RSUB8)
-DECLARE_INSN(rsubw, MATCH_RSUBW, MASK_RSUBW)
 DECLARE_INSN(sb, MATCH_SB, MASK_SB)
 DECLARE_INSN(sb_rl, MATCH_SB_RL, MASK_SB_RL)
 DECLARE_INSN(sc_d, MATCH_SC_D, MASK_SC_D)
 DECLARE_INSN(sc_w, MATCH_SC_W, MASK_SC_W)
-DECLARE_INSN(sclip16, MATCH_SCLIP16, MASK_SCLIP16)
-DECLARE_INSN(sclip32, MATCH_SCLIP32, MASK_SCLIP32)
-DECLARE_INSN(sclip8, MATCH_SCLIP8, MASK_SCLIP8)
-DECLARE_INSN(scmple16, MATCH_SCMPLE16, MASK_SCMPLE16)
-DECLARE_INSN(scmple8, MATCH_SCMPLE8, MASK_SCMPLE8)
-DECLARE_INSN(scmplt16, MATCH_SCMPLT16, MASK_SCMPLT16)
-DECLARE_INSN(scmplt8, MATCH_SCMPLT8, MASK_SCMPLT8)
 DECLARE_INSN(sd, MATCH_SD, MASK_SD)
 DECLARE_INSN(sd_rl, MATCH_SD_RL, MASK_SD_RL)
 DECLARE_INSN(sext_b, MATCH_SEXT_B, MASK_SEXT_B)
@@ -4404,23 +3499,12 @@ DECLARE_INSN(sha512sum0, MATCH_SHA512SUM0, MASK_SHA512SUM0)
 DECLARE_INSN(sha512sum0r, MATCH_SHA512SUM0R, MASK_SHA512SUM0R)
 DECLARE_INSN(sha512sum1, MATCH_SHA512SUM1, MASK_SHA512SUM1)
 DECLARE_INSN(sha512sum1r, MATCH_SHA512SUM1R, MASK_SHA512SUM1R)
-DECLARE_INSN(shfl, MATCH_SHFL, MASK_SHFL)
 DECLARE_INSN(shfli, MATCH_SHFLI, MASK_SHFLI)
-DECLARE_INSN(shflw, MATCH_SHFLW, MASK_SHFLW)
 DECLARE_INSN(sinval_vma, MATCH_SINVAL_VMA, MASK_SINVAL_VMA)
 DECLARE_INSN(sll, MATCH_SLL, MASK_SLL)
-DECLARE_INSN(sll16, MATCH_SLL16, MASK_SLL16)
-DECLARE_INSN(sll32, MATCH_SLL32, MASK_SLL32)
-DECLARE_INSN(sll8, MATCH_SLL8, MASK_SLL8)
-DECLARE_INSN(slld, MATCH_SLLD, MASK_SLLD)
 DECLARE_INSN(slli, MATCH_SLLI, MASK_SLLI)
-DECLARE_INSN(slli16, MATCH_SLLI16, MASK_SLLI16)
-DECLARE_INSN(slli32, MATCH_SLLI32, MASK_SLLI32)
-DECLARE_INSN(slli8, MATCH_SLLI8, MASK_SLLI8)
-DECLARE_INSN(slli_rv128, MATCH_SLLI_RV128, MASK_SLLI_RV128)
 DECLARE_INSN(slli_rv32, MATCH_SLLI_RV32, MASK_SLLI_RV32)
 DECLARE_INSN(slli_uw, MATCH_SLLI_UW, MASK_SLLI_UW)
-DECLARE_INSN(sllid, MATCH_SLLID, MASK_SLLID)
 DECLARE_INSN(slliw, MATCH_SLLIW, MASK_SLLIW)
 DECLARE_INSN(sllw, MATCH_SLLW, MASK_SLLW)
 DECLARE_INSN(slo, MATCH_SLO, MASK_SLO)
@@ -4444,82 +3528,23 @@ DECLARE_INSN(smalds, MATCH_SMALDS, MASK_SMALDS)
 DECLARE_INSN(smaltt, MATCH_SMALTT, MASK_SMALTT)
 DECLARE_INSN(smalxda, MATCH_SMALXDA, MASK_SMALXDA)
 DECLARE_INSN(smalxds, MATCH_SMALXDS, MASK_SMALXDS)
-DECLARE_INSN(smaqa, MATCH_SMAQA, MASK_SMAQA)
-DECLARE_INSN(smaqa_su, MATCH_SMAQA_SU, MASK_SMAQA_SU)
 DECLARE_INSN(smar64, MATCH_SMAR64, MASK_SMAR64)
-DECLARE_INSN(smax16, MATCH_SMAX16, MASK_SMAX16)
-DECLARE_INSN(smax32, MATCH_SMAX32, MASK_SMAX32)
-DECLARE_INSN(smax8, MATCH_SMAX8, MASK_SMAX8)
-DECLARE_INSN(smbb16, MATCH_SMBB16, MASK_SMBB16)
-DECLARE_INSN(smbt16, MATCH_SMBT16, MASK_SMBT16)
-DECLARE_INSN(smbt32, MATCH_SMBT32, MASK_SMBT32)
-DECLARE_INSN(smdrs, MATCH_SMDRS, MASK_SMDRS)
-DECLARE_INSN(smdrs32, MATCH_SMDRS32, MASK_SMDRS32)
-DECLARE_INSN(smds, MATCH_SMDS, MASK_SMDS)
-DECLARE_INSN(smds32, MATCH_SMDS32, MASK_SMDS32)
-DECLARE_INSN(smin16, MATCH_SMIN16, MASK_SMIN16)
-DECLARE_INSN(smin32, MATCH_SMIN32, MASK_SMIN32)
-DECLARE_INSN(smin8, MATCH_SMIN8, MASK_SMIN8)
-DECLARE_INSN(smmul, MATCH_SMMUL, MASK_SMMUL)
-DECLARE_INSN(smmul_u, MATCH_SMMUL_U, MASK_SMMUL_U)
-DECLARE_INSN(smmwb, MATCH_SMMWB, MASK_SMMWB)
-DECLARE_INSN(smmwb_u, MATCH_SMMWB_U, MASK_SMMWB_U)
-DECLARE_INSN(smmwt, MATCH_SMMWT, MASK_SMMWT)
-DECLARE_INSN(smmwt_u, MATCH_SMMWT_U, MASK_SMMWT_U)
 DECLARE_INSN(smslda, MATCH_SMSLDA, MASK_SMSLDA)
 DECLARE_INSN(smslxda, MATCH_SMSLXDA, MASK_SMSLXDA)
 DECLARE_INSN(smsr64, MATCH_SMSR64, MASK_SMSR64)
-DECLARE_INSN(smtt16, MATCH_SMTT16, MASK_SMTT16)
-DECLARE_INSN(smtt32, MATCH_SMTT32, MASK_SMTT32)
 DECLARE_INSN(smul16, MATCH_SMUL16, MASK_SMUL16)
 DECLARE_INSN(smul8, MATCH_SMUL8, MASK_SMUL8)
 DECLARE_INSN(smulx16, MATCH_SMULX16, MASK_SMULX16)
 DECLARE_INSN(smulx8, MATCH_SMULX8, MASK_SMULX8)
-DECLARE_INSN(smxds, MATCH_SMXDS, MASK_SMXDS)
-DECLARE_INSN(smxds32, MATCH_SMXDS32, MASK_SMXDS32)
-DECLARE_INSN(sq, MATCH_SQ, MASK_SQ)
 DECLARE_INSN(sra, MATCH_SRA, MASK_SRA)
-DECLARE_INSN(sra16, MATCH_SRA16, MASK_SRA16)
-DECLARE_INSN(sra16_u, MATCH_SRA16_U, MASK_SRA16_U)
-DECLARE_INSN(sra32, MATCH_SRA32, MASK_SRA32)
-DECLARE_INSN(sra32_u, MATCH_SRA32_U, MASK_SRA32_U)
-DECLARE_INSN(sra8, MATCH_SRA8, MASK_SRA8)
-DECLARE_INSN(sra8_u, MATCH_SRA8_U, MASK_SRA8_U)
-DECLARE_INSN(sra_u, MATCH_SRA_U, MASK_SRA_U)
-DECLARE_INSN(srad, MATCH_SRAD, MASK_SRAD)
 DECLARE_INSN(srai, MATCH_SRAI, MASK_SRAI)
-DECLARE_INSN(srai16, MATCH_SRAI16, MASK_SRAI16)
-DECLARE_INSN(srai16_u, MATCH_SRAI16_U, MASK_SRAI16_U)
-DECLARE_INSN(srai32, MATCH_SRAI32, MASK_SRAI32)
-DECLARE_INSN(srai32_u, MATCH_SRAI32_U, MASK_SRAI32_U)
-DECLARE_INSN(srai8, MATCH_SRAI8, MASK_SRAI8)
-DECLARE_INSN(srai8_u, MATCH_SRAI8_U, MASK_SRAI8_U)
-DECLARE_INSN(srai_rv128, MATCH_SRAI_RV128, MASK_SRAI_RV128)
 DECLARE_INSN(srai_rv32, MATCH_SRAI_RV32, MASK_SRAI_RV32)
-DECLARE_INSN(srai_u, MATCH_SRAI_U, MASK_SRAI_U)
-DECLARE_INSN(sraid, MATCH_SRAID, MASK_SRAID)
 DECLARE_INSN(sraiw, MATCH_SRAIW, MASK_SRAIW)
-DECLARE_INSN(sraiw_u, MATCH_SRAIW_U, MASK_SRAIW_U)
 DECLARE_INSN(sraw, MATCH_SRAW, MASK_SRAW)
 DECLARE_INSN(sret, MATCH_SRET, MASK_SRET)
 DECLARE_INSN(srl, MATCH_SRL, MASK_SRL)
-DECLARE_INSN(srl16, MATCH_SRL16, MASK_SRL16)
-DECLARE_INSN(srl16_u, MATCH_SRL16_U, MASK_SRL16_U)
-DECLARE_INSN(srl32, MATCH_SRL32, MASK_SRL32)
-DECLARE_INSN(srl32_u, MATCH_SRL32_U, MASK_SRL32_U)
-DECLARE_INSN(srl8, MATCH_SRL8, MASK_SRL8)
-DECLARE_INSN(srl8_u, MATCH_SRL8_U, MASK_SRL8_U)
-DECLARE_INSN(srld, MATCH_SRLD, MASK_SRLD)
 DECLARE_INSN(srli, MATCH_SRLI, MASK_SRLI)
-DECLARE_INSN(srli16, MATCH_SRLI16, MASK_SRLI16)
-DECLARE_INSN(srli16_u, MATCH_SRLI16_U, MASK_SRLI16_U)
-DECLARE_INSN(srli32, MATCH_SRLI32, MASK_SRLI32)
-DECLARE_INSN(srli32_u, MATCH_SRLI32_U, MASK_SRLI32_U)
-DECLARE_INSN(srli8, MATCH_SRLI8, MASK_SRLI8)
-DECLARE_INSN(srli8_u, MATCH_SRLI8_U, MASK_SRLI8_U)
-DECLARE_INSN(srli_rv128, MATCH_SRLI_RV128, MASK_SRLI_RV128)
 DECLARE_INSN(srli_rv32, MATCH_SRLI_RV32, MASK_SRLI_RV32)
-DECLARE_INSN(srlid, MATCH_SRLID, MASK_SRLID)
 DECLARE_INSN(srliw, MATCH_SRLIW, MASK_SRLIW)
 DECLARE_INSN(srlw, MATCH_SRLW, MASK_SRLW)
 DECLARE_INSN(sro, MATCH_SRO, MASK_SRO)
@@ -4533,87 +3558,24 @@ DECLARE_INSN(sspopchk_x5, MATCH_SSPOPCHK_X5, MASK_SSPOPCHK_X5)
 DECLARE_INSN(sspush_x1, MATCH_SSPUSH_X1, MASK_SSPUSH_X1)
 DECLARE_INSN(sspush_x5, MATCH_SSPUSH_X5, MASK_SSPUSH_X5)
 DECLARE_INSN(ssrdp, MATCH_SSRDP, MASK_SSRDP)
-DECLARE_INSN(stas16, MATCH_STAS16, MASK_STAS16)
-DECLARE_INSN(stas32, MATCH_STAS32, MASK_STAS32)
-DECLARE_INSN(stsa16, MATCH_STSA16, MASK_STSA16)
-DECLARE_INSN(stsa32, MATCH_STSA32, MASK_STSA32)
 DECLARE_INSN(sub, MATCH_SUB, MASK_SUB)
-DECLARE_INSN(sub16, MATCH_SUB16, MASK_SUB16)
-DECLARE_INSN(sub32, MATCH_SUB32, MASK_SUB32)
 DECLARE_INSN(sub64, MATCH_SUB64, MASK_SUB64)
-DECLARE_INSN(sub8, MATCH_SUB8, MASK_SUB8)
-DECLARE_INSN(subd, MATCH_SUBD, MASK_SUBD)
 DECLARE_INSN(subw, MATCH_SUBW, MASK_SUBW)
-DECLARE_INSN(sunpkd810, MATCH_SUNPKD810, MASK_SUNPKD810)
-DECLARE_INSN(sunpkd820, MATCH_SUNPKD820, MASK_SUNPKD820)
-DECLARE_INSN(sunpkd830, MATCH_SUNPKD830, MASK_SUNPKD830)
-DECLARE_INSN(sunpkd831, MATCH_SUNPKD831, MASK_SUNPKD831)
-DECLARE_INSN(sunpkd832, MATCH_SUNPKD832, MASK_SUNPKD832)
 DECLARE_INSN(sw, MATCH_SW, MASK_SW)
 DECLARE_INSN(sw_rl, MATCH_SW_RL, MASK_SW_RL)
-DECLARE_INSN(uclip16, MATCH_UCLIP16, MASK_UCLIP16)
-DECLARE_INSN(uclip32, MATCH_UCLIP32, MASK_UCLIP32)
-DECLARE_INSN(uclip8, MATCH_UCLIP8, MASK_UCLIP8)
-DECLARE_INSN(ucmple16, MATCH_UCMPLE16, MASK_UCMPLE16)
-DECLARE_INSN(ucmple8, MATCH_UCMPLE8, MASK_UCMPLE8)
-DECLARE_INSN(ucmplt16, MATCH_UCMPLT16, MASK_UCMPLT16)
-DECLARE_INSN(ucmplt8, MATCH_UCMPLT8, MASK_UCMPLT8)
-DECLARE_INSN(ukadd16, MATCH_UKADD16, MASK_UKADD16)
-DECLARE_INSN(ukadd32, MATCH_UKADD32, MASK_UKADD32)
 DECLARE_INSN(ukadd64, MATCH_UKADD64, MASK_UKADD64)
-DECLARE_INSN(ukadd8, MATCH_UKADD8, MASK_UKADD8)
-DECLARE_INSN(ukaddh, MATCH_UKADDH, MASK_UKADDH)
-DECLARE_INSN(ukaddw, MATCH_UKADDW, MASK_UKADDW)
-DECLARE_INSN(ukcras16, MATCH_UKCRAS16, MASK_UKCRAS16)
-DECLARE_INSN(ukcras32, MATCH_UKCRAS32, MASK_UKCRAS32)
-DECLARE_INSN(ukcrsa16, MATCH_UKCRSA16, MASK_UKCRSA16)
-DECLARE_INSN(ukcrsa32, MATCH_UKCRSA32, MASK_UKCRSA32)
 DECLARE_INSN(ukmar64, MATCH_UKMAR64, MASK_UKMAR64)
 DECLARE_INSN(ukmsr64, MATCH_UKMSR64, MASK_UKMSR64)
-DECLARE_INSN(ukstas16, MATCH_UKSTAS16, MASK_UKSTAS16)
-DECLARE_INSN(ukstas32, MATCH_UKSTAS32, MASK_UKSTAS32)
-DECLARE_INSN(ukstsa16, MATCH_UKSTSA16, MASK_UKSTSA16)
-DECLARE_INSN(ukstsa32, MATCH_UKSTSA32, MASK_UKSTSA32)
-DECLARE_INSN(uksub16, MATCH_UKSUB16, MASK_UKSUB16)
-DECLARE_INSN(uksub32, MATCH_UKSUB32, MASK_UKSUB32)
 DECLARE_INSN(uksub64, MATCH_UKSUB64, MASK_UKSUB64)
-DECLARE_INSN(uksub8, MATCH_UKSUB8, MASK_UKSUB8)
-DECLARE_INSN(uksubh, MATCH_UKSUBH, MASK_UKSUBH)
-DECLARE_INSN(uksubw, MATCH_UKSUBW, MASK_UKSUBW)
-DECLARE_INSN(umaqa, MATCH_UMAQA, MASK_UMAQA)
 DECLARE_INSN(umar64, MATCH_UMAR64, MASK_UMAR64)
-DECLARE_INSN(umax16, MATCH_UMAX16, MASK_UMAX16)
-DECLARE_INSN(umax32, MATCH_UMAX32, MASK_UMAX32)
-DECLARE_INSN(umax8, MATCH_UMAX8, MASK_UMAX8)
-DECLARE_INSN(umin16, MATCH_UMIN16, MASK_UMIN16)
-DECLARE_INSN(umin32, MATCH_UMIN32, MASK_UMIN32)
-DECLARE_INSN(umin8, MATCH_UMIN8, MASK_UMIN8)
 DECLARE_INSN(umsr64, MATCH_UMSR64, MASK_UMSR64)
 DECLARE_INSN(umul16, MATCH_UMUL16, MASK_UMUL16)
 DECLARE_INSN(umul8, MATCH_UMUL8, MASK_UMUL8)
 DECLARE_INSN(umulx16, MATCH_UMULX16, MASK_UMULX16)
 DECLARE_INSN(umulx8, MATCH_UMULX8, MASK_UMULX8)
-DECLARE_INSN(unshfl, MATCH_UNSHFL, MASK_UNSHFL)
 DECLARE_INSN(unshfli, MATCH_UNSHFLI, MASK_UNSHFLI)
-DECLARE_INSN(unshflw, MATCH_UNSHFLW, MASK_UNSHFLW)
-DECLARE_INSN(uradd16, MATCH_URADD16, MASK_URADD16)
-DECLARE_INSN(uradd32, MATCH_URADD32, MASK_URADD32)
 DECLARE_INSN(uradd64, MATCH_URADD64, MASK_URADD64)
-DECLARE_INSN(uradd8, MATCH_URADD8, MASK_URADD8)
-DECLARE_INSN(uraddw, MATCH_URADDW, MASK_URADDW)
-DECLARE_INSN(urcras16, MATCH_URCRAS16, MASK_URCRAS16)
-DECLARE_INSN(urcras32, MATCH_URCRAS32, MASK_URCRAS32)
-DECLARE_INSN(urcrsa16, MATCH_URCRSA16, MASK_URCRSA16)
-DECLARE_INSN(urcrsa32, MATCH_URCRSA32, MASK_URCRSA32)
-DECLARE_INSN(urstas16, MATCH_URSTAS16, MASK_URSTAS16)
-DECLARE_INSN(urstas32, MATCH_URSTAS32, MASK_URSTAS32)
-DECLARE_INSN(urstsa16, MATCH_URSTSA16, MASK_URSTSA16)
-DECLARE_INSN(urstsa32, MATCH_URSTSA32, MASK_URSTSA32)
-DECLARE_INSN(ursub16, MATCH_URSUB16, MASK_URSUB16)
-DECLARE_INSN(ursub32, MATCH_URSUB32, MASK_URSUB32)
 DECLARE_INSN(ursub64, MATCH_URSUB64, MASK_URSUB64)
-DECLARE_INSN(ursub8, MATCH_URSUB8, MASK_URSUB8)
-DECLARE_INSN(ursubw, MATCH_URSUBW, MASK_URSUBW)
 DECLARE_INSN(vaadd_vv, MATCH_VAADD_VV, MASK_VAADD_VV)
 DECLARE_INSN(vaadd_vx, MATCH_VAADD_VX, MASK_VAADD_VX)
 DECLARE_INSN(vaaddu_vv, MATCH_VAADDU_VV, MASK_VAADDU_VV)
@@ -4775,45 +3737,25 @@ DECLARE_INSN(vl8re16_v, MATCH_VL8RE16_V, MASK_VL8RE16_V)
 DECLARE_INSN(vl8re32_v, MATCH_VL8RE32_V, MASK_VL8RE32_V)
 DECLARE_INSN(vl8re64_v, MATCH_VL8RE64_V, MASK_VL8RE64_V)
 DECLARE_INSN(vl8re8_v, MATCH_VL8RE8_V, MASK_VL8RE8_V)
-DECLARE_INSN(vle1024_v, MATCH_VLE1024_V, MASK_VLE1024_V)
-DECLARE_INSN(vle1024ff_v, MATCH_VLE1024FF_V, MASK_VLE1024FF_V)
-DECLARE_INSN(vle128_v, MATCH_VLE128_V, MASK_VLE128_V)
-DECLARE_INSN(vle128ff_v, MATCH_VLE128FF_V, MASK_VLE128FF_V)
 DECLARE_INSN(vle16_v, MATCH_VLE16_V, MASK_VLE16_V)
 DECLARE_INSN(vle16ff_v, MATCH_VLE16FF_V, MASK_VLE16FF_V)
-DECLARE_INSN(vle256_v, MATCH_VLE256_V, MASK_VLE256_V)
-DECLARE_INSN(vle256ff_v, MATCH_VLE256FF_V, MASK_VLE256FF_V)
 DECLARE_INSN(vle32_v, MATCH_VLE32_V, MASK_VLE32_V)
 DECLARE_INSN(vle32ff_v, MATCH_VLE32FF_V, MASK_VLE32FF_V)
-DECLARE_INSN(vle512_v, MATCH_VLE512_V, MASK_VLE512_V)
-DECLARE_INSN(vle512ff_v, MATCH_VLE512FF_V, MASK_VLE512FF_V)
 DECLARE_INSN(vle64_v, MATCH_VLE64_V, MASK_VLE64_V)
 DECLARE_INSN(vle64ff_v, MATCH_VLE64FF_V, MASK_VLE64FF_V)
 DECLARE_INSN(vle8_v, MATCH_VLE8_V, MASK_VLE8_V)
 DECLARE_INSN(vle8ff_v, MATCH_VLE8FF_V, MASK_VLE8FF_V)
 DECLARE_INSN(vlm_v, MATCH_VLM_V, MASK_VLM_V)
-DECLARE_INSN(vloxei1024_v, MATCH_VLOXEI1024_V, MASK_VLOXEI1024_V)
-DECLARE_INSN(vloxei128_v, MATCH_VLOXEI128_V, MASK_VLOXEI128_V)
 DECLARE_INSN(vloxei16_v, MATCH_VLOXEI16_V, MASK_VLOXEI16_V)
-DECLARE_INSN(vloxei256_v, MATCH_VLOXEI256_V, MASK_VLOXEI256_V)
 DECLARE_INSN(vloxei32_v, MATCH_VLOXEI32_V, MASK_VLOXEI32_V)
-DECLARE_INSN(vloxei512_v, MATCH_VLOXEI512_V, MASK_VLOXEI512_V)
 DECLARE_INSN(vloxei64_v, MATCH_VLOXEI64_V, MASK_VLOXEI64_V)
 DECLARE_INSN(vloxei8_v, MATCH_VLOXEI8_V, MASK_VLOXEI8_V)
-DECLARE_INSN(vlse1024_v, MATCH_VLSE1024_V, MASK_VLSE1024_V)
-DECLARE_INSN(vlse128_v, MATCH_VLSE128_V, MASK_VLSE128_V)
 DECLARE_INSN(vlse16_v, MATCH_VLSE16_V, MASK_VLSE16_V)
-DECLARE_INSN(vlse256_v, MATCH_VLSE256_V, MASK_VLSE256_V)
 DECLARE_INSN(vlse32_v, MATCH_VLSE32_V, MASK_VLSE32_V)
-DECLARE_INSN(vlse512_v, MATCH_VLSE512_V, MASK_VLSE512_V)
 DECLARE_INSN(vlse64_v, MATCH_VLSE64_V, MASK_VLSE64_V)
 DECLARE_INSN(vlse8_v, MATCH_VLSE8_V, MASK_VLSE8_V)
-DECLARE_INSN(vluxei1024_v, MATCH_VLUXEI1024_V, MASK_VLUXEI1024_V)
-DECLARE_INSN(vluxei128_v, MATCH_VLUXEI128_V, MASK_VLUXEI128_V)
 DECLARE_INSN(vluxei16_v, MATCH_VLUXEI16_V, MASK_VLUXEI16_V)
-DECLARE_INSN(vluxei256_v, MATCH_VLUXEI256_V, MASK_VLUXEI256_V)
 DECLARE_INSN(vluxei32_v, MATCH_VLUXEI32_V, MASK_VLUXEI32_V)
-DECLARE_INSN(vluxei512_v, MATCH_VLUXEI512_V, MASK_VLUXEI512_V)
 DECLARE_INSN(vluxei64_v, MATCH_VLUXEI64_V, MASK_VLUXEI64_V)
 DECLARE_INSN(vluxei8_v, MATCH_VLUXEI8_V, MASK_VLUXEI8_V)
 DECLARE_INSN(vmacc_vv, MATCH_VMACC_VV, MASK_VMACC_VV)
@@ -4954,12 +3896,8 @@ DECLARE_INSN(vsaddu_vv, MATCH_VSADDU_VV, MASK_VSADDU_VV)
 DECLARE_INSN(vsaddu_vx, MATCH_VSADDU_VX, MASK_VSADDU_VX)
 DECLARE_INSN(vsbc_vvm, MATCH_VSBC_VVM, MASK_VSBC_VVM)
 DECLARE_INSN(vsbc_vxm, MATCH_VSBC_VXM, MASK_VSBC_VXM)
-DECLARE_INSN(vse1024_v, MATCH_VSE1024_V, MASK_VSE1024_V)
-DECLARE_INSN(vse128_v, MATCH_VSE128_V, MASK_VSE128_V)
 DECLARE_INSN(vse16_v, MATCH_VSE16_V, MASK_VSE16_V)
-DECLARE_INSN(vse256_v, MATCH_VSE256_V, MASK_VSE256_V)
 DECLARE_INSN(vse32_v, MATCH_VSE32_V, MASK_VSE32_V)
-DECLARE_INSN(vse512_v, MATCH_VSE512_V, MASK_VSE512_V)
 DECLARE_INSN(vse64_v, MATCH_VSE64_V, MASK_VSE64_V)
 DECLARE_INSN(vse8_v, MATCH_VSE8_V, MASK_VSE8_V)
 DECLARE_INSN(vsetivli, MATCH_VSETIVLI, MASK_VSETIVLI)
@@ -4988,12 +3926,8 @@ DECLARE_INSN(vsm4r_vv, MATCH_VSM4R_VV, MASK_VSM4R_VV)
 DECLARE_INSN(vsm_v, MATCH_VSM_V, MASK_VSM_V)
 DECLARE_INSN(vsmul_vv, MATCH_VSMUL_VV, MASK_VSMUL_VV)
 DECLARE_INSN(vsmul_vx, MATCH_VSMUL_VX, MASK_VSMUL_VX)
-DECLARE_INSN(vsoxei1024_v, MATCH_VSOXEI1024_V, MASK_VSOXEI1024_V)
-DECLARE_INSN(vsoxei128_v, MATCH_VSOXEI128_V, MASK_VSOXEI128_V)
 DECLARE_INSN(vsoxei16_v, MATCH_VSOXEI16_V, MASK_VSOXEI16_V)
-DECLARE_INSN(vsoxei256_v, MATCH_VSOXEI256_V, MASK_VSOXEI256_V)
 DECLARE_INSN(vsoxei32_v, MATCH_VSOXEI32_V, MASK_VSOXEI32_V)
-DECLARE_INSN(vsoxei512_v, MATCH_VSOXEI512_V, MASK_VSOXEI512_V)
 DECLARE_INSN(vsoxei64_v, MATCH_VSOXEI64_V, MASK_VSOXEI64_V)
 DECLARE_INSN(vsoxei8_v, MATCH_VSOXEI8_V, MASK_VSOXEI8_V)
 DECLARE_INSN(vsra_vi, MATCH_VSRA_VI, MASK_VSRA_VI)
@@ -5002,12 +3936,8 @@ DECLARE_INSN(vsra_vx, MATCH_VSRA_VX, MASK_VSRA_VX)
 DECLARE_INSN(vsrl_vi, MATCH_VSRL_VI, MASK_VSRL_VI)
 DECLARE_INSN(vsrl_vv, MATCH_VSRL_VV, MASK_VSRL_VV)
 DECLARE_INSN(vsrl_vx, MATCH_VSRL_VX, MASK_VSRL_VX)
-DECLARE_INSN(vsse1024_v, MATCH_VSSE1024_V, MASK_VSSE1024_V)
-DECLARE_INSN(vsse128_v, MATCH_VSSE128_V, MASK_VSSE128_V)
 DECLARE_INSN(vsse16_v, MATCH_VSSE16_V, MASK_VSSE16_V)
-DECLARE_INSN(vsse256_v, MATCH_VSSE256_V, MASK_VSSE256_V)
 DECLARE_INSN(vsse32_v, MATCH_VSSE32_V, MASK_VSSE32_V)
-DECLARE_INSN(vsse512_v, MATCH_VSSE512_V, MASK_VSSE512_V)
 DECLARE_INSN(vsse64_v, MATCH_VSSE64_V, MASK_VSSE64_V)
 DECLARE_INSN(vsse8_v, MATCH_VSSE8_V, MASK_VSSE8_V)
 DECLARE_INSN(vssra_vi, MATCH_VSSRA_VI, MASK_VSSRA_VI)
@@ -5022,12 +3952,8 @@ DECLARE_INSN(vssubu_vv, MATCH_VSSUBU_VV, MASK_VSSUBU_VV)
 DECLARE_INSN(vssubu_vx, MATCH_VSSUBU_VX, MASK_VSSUBU_VX)
 DECLARE_INSN(vsub_vv, MATCH_VSUB_VV, MASK_VSUB_VV)
 DECLARE_INSN(vsub_vx, MATCH_VSUB_VX, MASK_VSUB_VX)
-DECLARE_INSN(vsuxei1024_v, MATCH_VSUXEI1024_V, MASK_VSUXEI1024_V)
-DECLARE_INSN(vsuxei128_v, MATCH_VSUXEI128_V, MASK_VSUXEI128_V)
 DECLARE_INSN(vsuxei16_v, MATCH_VSUXEI16_V, MASK_VSUXEI16_V)
-DECLARE_INSN(vsuxei256_v, MATCH_VSUXEI256_V, MASK_VSUXEI256_V)
 DECLARE_INSN(vsuxei32_v, MATCH_VSUXEI32_V, MASK_VSUXEI32_V)
-DECLARE_INSN(vsuxei512_v, MATCH_VSUXEI512_V, MASK_VSUXEI512_V)
 DECLARE_INSN(vsuxei64_v, MATCH_VSUXEI64_V, MASK_VSUXEI64_V)
 DECLARE_INSN(vsuxei8_v, MATCH_VSUXEI8_V, MASK_VSUXEI8_V)
 DECLARE_INSN(vwadd_vv, MATCH_VWADD_VV, MASK_VWADD_VV)
@@ -5080,11 +4006,6 @@ DECLARE_INSN(xperm16, MATCH_XPERM16, MASK_XPERM16)
 DECLARE_INSN(xperm32, MATCH_XPERM32, MASK_XPERM32)
 DECLARE_INSN(xperm4, MATCH_XPERM4, MASK_XPERM4)
 DECLARE_INSN(xperm8, MATCH_XPERM8, MASK_XPERM8)
-DECLARE_INSN(zunpkd810, MATCH_ZUNPKD810, MASK_ZUNPKD810)
-DECLARE_INSN(zunpkd820, MATCH_ZUNPKD820, MASK_ZUNPKD820)
-DECLARE_INSN(zunpkd830, MATCH_ZUNPKD830, MASK_ZUNPKD830)
-DECLARE_INSN(zunpkd831, MATCH_ZUNPKD831, MASK_ZUNPKD831)
-DECLARE_INSN(zunpkd832, MATCH_ZUNPKD832, MASK_ZUNPKD832)
 #endif
 #ifdef DECLARE_CSR
 DECLARE_CSR(fflags, CSR_FFLAGS)
-- 
cgit v1.1