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* Adds --log-commits commandline option.
Similar to histogram support, the commit logging feature must be
enabled with a configure option: --enable-commitlog. However, unlike
that feature, there was no way to turn off the logging with a
commandline option once the functionality was built in. This (git)
commit provides that abilty.
* Changes addressing review feedback.
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Implement MMIO device plugins.
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https://github.com/riscv/riscv-v-spec/commit/83fc27897b7b1fbc68e2e9e94f2ee05766315bac
https://github.com/riscv/riscv-v-spec/commit/fb40ef10f068827f3f0a926a83dd38ebcd470085
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the tool can parse the instruction name from spike debug log to help
dsp kernel designer check what instructions have been used
Signed-off-by: Jerry Shih <bignose1007@gmail.com>
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the default vector parameters are defined in configuration time but can
be changed throught command-line option
Signed-off-by: Dave Wen <dave.wen@sifive.com>
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1. configure option "--with-varch"
the option defines the default u-arch implementatiton-decided parameter
VLEN: vector register length in bit
SLEN: striping distance in bit
ELEN: max element size in bit
ex: --with-vector=v128:e32:s128
2. add __int128_t type checking
3. add --varch command option and help message
ex: --varch=v512:e64:s512
Signed-off-by: Dave Wen <dave.wen@sifive.com>
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support most of vector instruction except for AMO extension
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
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* Clean up debug module options.
1. Instead of passing each one a few levels deep, create
debug_module_config_t which contains them all.
2. Rename all those command line options so they start with --dm for
debug module.
3. Add --dm-no-halt-groups to disable halt group support.
* Update changelog.
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This is used to make sure that OpenOCD can work on targets that don't
support abstract access to CSR registers. It replaces a simpler hack,
which caused #266.
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* Implement hasel/hawindow support.
This should allow simultaneous resume and halt to work.
* Fix anyrunning/anyhalted bits.
* Add --without-hasel argument for testing.
* Make halt/resume times more equal.
Switching threads after every instruction executed in debug mode leads
to a lot of extra instructions being executed on the "other" thread when
both are really supposed to halt/resume near-simultaneously. Fixed that
by adding wfi to debug_rom.S, and implementing it to switch to the other
hart as well as check for JTAG input.
When resuming, write the hart ID to the debug ROM so that the DM knows
which hart actually resumed. (Before simultaneous resume it just assumed
the current one.)
Also got rid of resume symbol in debug_rom.S since it had no purpose.
* Preserve Debug ROM entry points.
* Make sure minstret is correct when wfi happens.
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Optionally make spike behave more like real hardware, to automatically
test OpenOCD's handling of such hardware.
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Resolves #243
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* Add "--log-cache-miss" option to generate a log of cache miss.
- This option must be used with "--ic" and/or "--dc" options
to enable cache simulation.
- This option is useful with "-l" option to understand
which instruction has caused the cache miss.
* Modify log format of cache miss to reduce log size.
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h/t Shane Lardinois
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Off by default, enabled with --debug-auth.
The protocol is very simple (definitely not secure) to allow debuggers
to test their authentication feature. To authenticate a debugger must:
1. Read authdata
2. Write to authdata the value that it just read, plus 1
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This lets the user control whether the system bus access implements bus
mastering.
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* mem_t: Throw an error if zero-sized memory is requested
If for some reason the user requests a memory size of 0 megabytes, print
a useful error message.
* Check for overflow in memory size
If the user passes in a large enough memory size (-m) that the size in
bytes doesn't fit into size_t, catch this error in the make_mems function.
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Also add an implicit ebreak after the program buffer. This is not part
of the spec, but hopefully it will be.
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Support for non-contiguous hartids
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Resolves #152
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I currently get this disassembly
00004881 jr a7
but if I understand that's incorrect and I want
00004881 li a7, 0
If I'm reading the ISA manual correctly, the disassembler was just wrong
here.
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The interpretation of RVC opcodes depends on XLEN, and the disassembler
always assumed RV32.
h/t Michael Clark
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* spike_main/disasm.cc: Print unknown CSR numbers in hex
* interactive mode: Print "Unknown command" when appropriate
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