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:
rocket-tools/riscv-gnu-toolchain/spike.git
confprec
cs250
cycleh
debug_rom
debug_rom_fence
device_flags
dtm_reset_error
dts_parsing
dynamic
eos18-bringup
factor-out-macros
fix-bf16
force-rtti
fp-encoding
heterogeneous_mc
hwachav4
increase-stack-size
itrigger-etrigger-cleanup
load_reservation_set_size
log-commits-faster
master
mmio-hack
mvp
no_progbuf
no_progbuf2
nolibfdt
p-ext-0.5.2
plctlab-plct-zce-fix2
plic-clint-endian
plic_uart_v1
priv-1.10
private-l1-caches
pte-info-and-delegation
remove-tests
rivosinc-etrigger_fix_exception_match
rva-profile-support
simplify-misaligned
sodor
sparse-mem
speedup-hacks
static-link
test
tmp
trigger_priority
tweak_debug_rom
whole-archive
sifive/rvv0.9-phase2
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Author
Files
Lines
2019-11-11
rvv: fix vmv.x.s signed-ext issue
Chih-Min Chao
2
-23
/
+26
2019-10-29
rvv: fix floating-point exception for comparison
Chih-Min Chao
6
-5
/
+6
2019-10-29
rvv: remove vmford
Chih-Min Chao
4
-18
/
+0
2019-10-28
Implement support for big-endian hosts
Marcus Comstedt
6
-36
/
+84
2019-10-24
Initialize histogram_enabled and log_commits_enabled in constructor (#354)
Scott Johnson
1
-0
/
+1
2019-10-22
Catch polymorphic exceptions by reference (#352)
Luís Marques
1
-2
/
+2
2019-10-22
Stop loading "past the end" of the vector. (#351)
Nick Knight
1
-5
/
+5
2019-10-16
Enforce 2^56-bit physical address limit
Andrew Waterman
2
-2
/
+10
2019-10-07
Speed up compilation of disasm.cc, especially in clang
Andrew Waterman
2
-2
/
+4
2019-09-27
Fixed match trigger MATCH_NAPOT case. (#335)
fborisovskii
1
-1
/
+1
2019-09-18
Extends the commit log feature with memory writes. (#324)
dave-estes-syzexion
3
-6
/
+37
2019-09-18
Adds --log-commits commandline option. (#323)
dave-estes-syzexion
5
-2
/
+31
2019-08-28
Merge pull request #315 from vexingcodes/mmio-plugin
Andrew Waterman
6
-4
/
+158
2019-08-23
Remove statement with no effect
Andrew Waterman
1
-1
/
+0
2019-07-22
Implement MMIO device plugins.
Aaron Jones
6
-4
/
+158
2019-07-19
Set vtype.vill correctly; also reset it to true
Andrew Waterman
1
-3
/
+8
2019-07-19
Check presence of V extension when accessing vector CSRs
Andrew Waterman
1
-0
/
+15
2019-07-19
Check vtype.vill for all vector instructions except vsetvl[i]
Andrew Waterman
24
-20
/
+37
2019-07-19
VL and VTYPE aren't writable CSRs
Andrew Waterman
1
-12
/
+0
2019-07-19
Check for F extension in vfmv instructions
Andrew Waterman
2
-0
/
+2
2019-07-19
Avoid relying on sizeof long
Andrew Waterman
3
-5
/
+5
2019-07-19
vext.x.v -> vmv.x.s; unary operation encoding changes
Andrew Waterman
4
-44
/
+39
2019-07-16
Writing non-existent CSRs, access FPRs with mstatus.FS=0 (#311)
Tim Newsome
5
-7
/
+47
2019-07-12
Merge pull request #309 from riscv/dret
Andrew Waterman
5
-12
/
+15
2019-07-12
Remove old header from makefile
Andrew Waterman
1
-1
/
+0
2019-07-12
DRET should not be legal in M-mode
Andrew Waterman
1
-1
/
+1
2019-07-12
Add debug_mode state bit, rather than overloading dcsr.cause
Andrew Waterman
5
-11
/
+14
2019-07-11
Fix support for 32-bit hosts (but no V extension in that case!)
Andrew Waterman
3
-2
/
+9
2019-07-11
Fix some 32-bit safety issues
Andrew Waterman
2
-3
/
+3
2019-07-11
Support S-mode vectored interrupts
Andrew Waterman
1
-2
/
+3
2019-07-05
vmfirst/vmpopc have been renamed to vfirst/vpopc
Andrew Waterman
4
-34
/
+45
2019-07-05
Avoid static initializers for variable-length arrays
Andrew Waterman
1
-2
/
+2
2019-07-05
Fix clang uninitialized variable warning
Andrew Waterman
1
-1
/
+1
2019-06-18
rvv: add simple instruction parsing tool
Chih-Min Chao
1
-1
/
+9
2019-06-18
rvv: add floating-point instructions
Chih-Min Chao
83
-1
/
+869
2019-06-18
rvv: add load/store instructions
Chih-Min Chao
46
-0
/
+569
2019-06-18
rvv: add integer/fixed-point/mask/reduction/permutation instructions
Chih-Min Chao
217
-0
/
+3473
2019-06-18
rvv: add control instructions and system register access
Chih-Min Chao
5
-0
/
+42
2019-06-18
rvv: add saturation helper function
Chih-Min Chao
3
-44
/
+112
2019-06-18
rvv: extend interactive debug
Chih-Min Chao
3
-1
/
+51
2019-06-14
rvv: add varch option parser and initialize vector unit
Chih-Min Chao
4
-11
/
+76
2019-06-14
rvv: add vector unit structure
Chih-Min Chao
2
-0
/
+144
2019-06-14
rvv: add configuration and command-line option
Chih-Min Chao
1
-0
/
+7
2019-06-14
rvv: disasm: add v-spec 0.7.1 support
Chih-Min Chao
3
-3
/
+39
2019-06-14
disams: make instruction name dynamic
Chih-Min Chao
1
-1
/
+2
2019-06-14
rvv: add the v-spec-0.7.1 encoding
Chih-Min Chao
1
-11
/
+1218
2019-06-09
rvv: re-arrange instruction list by different extension
Chih-Min Chao
1
-129
/
+155
2019-05-14
Clean up debug module options. (#299)
Tim Newsome
4
-60
/
+49
2019-04-04
Add --debug-no-abstract-csr (#267)
Tim Newsome
4
-11
/
+12
2019-04-02
Implement debug hasel support (#287)
Tim Newsome
6
-72
/
+138
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