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2020-04-22rvv: fix segment load/store nf checkingChih-Min Chao2-9/+11
2020-04-21rvv: fix vfmv for fp16Chih-Min Chao3-13/+36
2020-04-21rvv: fix vfmerge.vfm for fp16Chih-Min Chao1-2/+15
2020-04-21rvv: fix vfslide for fp16Chih-Min Chao2-0/+16
2020-04-21rvv: fix floating comparison for fp16Chih-Min Chao10-11/+49
2020-04-21rvv: allow fp16Chih-Min Chao1-1/+2
2020-04-20rvv: refine vfncvt case for f32_to_[u]i16 casesChih-Min Chao3-6/+3
2020-04-20rvv: fix f16_to_[u]i16 conversionChih-Min Chao4-8/+4
2020-04-20rvv: remove debug messageChih-Min Chao1-1/+0
2020-04-19rvv: fix vfwredsum checking ruleChih-Min Chao1-1/+3
2020-04-16rvv: fix rtz cvtChih-Min Chao13-51/+47
2020-04-15rvv: add widen conversion instructionsChih-Min Chao7-51/+53
2020-04-15rvv: add narrow conversion instrucitonsChih-Min Chao7-42/+71
2020-04-15rvv: add normal and widen reduction instructionsChih-Min Chao7-27/+78
2020-04-15rvv: add vmfxx f16 compare instructionsChih-Min Chao11-2/+39
2020-04-15rvv: add .vf fp16 instructionsChih-Min Chao25-3/+85
2020-04-15rvv: add .vv fp16 instructionsChih-Min Chao22-2/+72
2020-04-15rvv: WIDE_END loop macroChih-Min Chao1-9/+4
2020-04-15fp16: add helper macroChih-Min Chao1-0/+8
2020-04-14parser: extend --isa to support extended extensionChih-Min Chao2-18/+55
2020-04-14rvv: leave only SEW-bit segment storeChih-Min Chao17-153/+53
2020-04-14rvv: leave only sew-wise segment loadChih-Min Chao29-73/+76
2020-04-14rvv: add vfslide1[down|up].vf and refine checking ruleChih-Min Chao11-27/+79
2020-04-14rvv: add float conversion for rtz variantsChih-Min Chao8-0/+88
2020-04-14rvv: add new vcsr vector csrChih-Min Chao3-19/+31
2020-04-10rvv: remove unecessary initializationChih-Min Chao1-1/+0
2020-04-10rvv: vslide[1]up now allows mask overlap when LMUL=1Chih-Min Chao3-3/+3
2020-04-10rvv: fix index segment load overlapping checkChih-Min Chao1-5/+7
2020-04-10op: update CSRChih-Min Chao3-12/+38
2020-04-10rvv: missing vector enabling check for mask operationChih-Min Chao1-0/+1
2020-04-05Fix debug segfault by partially reverting #409Andrew Waterman1-2/+3
2020-04-05option: flag x extension without loading shared lib (#439)Chih-Min Chao1-1/+5
2020-04-05Deny hart access to debug CSRs when not in D-modeAndrew Waterman1-0/+8
2020-04-05Assert that debug_module is initialized correctly. (#437)Tim Newsome1-0/+1
2020-04-05Write execution logs to a named log file (#409)Rupert Swarbrick6-78/+144
2020-04-05Allow PATH lookup for executing dtc (#432)綺麗な賢狼ホロ1-1/+1
2020-04-05Don't acquire load reservation in the event of a faultAndrew Waterman2-2/+4
2020-04-05ebreak should write mtval with 0, not pcAndrew Waterman3-3/+3
2020-03-27rvv: fix int_max/min value calculationChih-Min Chao8-23/+26
2020-03-26rvv: fix vssraa.vi e64 corner caseChih-Min Chao1-1/+1
2020-03-26rvv: check vlen == slenChih-Min Chao1-0/+2
2020-03-24rvv: fix vmv reg checking failureChih-Min Chao3-1/+6
2020-03-23rvv: restrict segment load register ruleChih-Min Chao4-3/+4
2020-03-23rvv: fix WARL behavior for vxsat and vxrmChih-Min Chao1-2/+2
2020-03-17rvv: fix vdiv corner caseChih-Min Chao2-2/+2
2020-03-16commitlog: fix build failedChih-Min Chao1-4/+6
2020-03-16commitlog: fix wrong dump when exception occurChih-Min Chao2-4/+9
2020-03-12rvv: commitlog: fix vrgather_vv dumpChih-Min Chao1-4/+4
2020-03-12rvv: fix vfmv.f.s and vfmv.s.fChih-Min Chao2-22/+21
2020-03-11commitlog: fix missing dump for some instructionsChih-Min Chao8-29/+32