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In triggers, use optional<data> instead of {has_data, data}
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Simplify handling of load/store/fetch slow-path cases; fix two minor trigger bugs
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h/t @YenHaoChen
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Previously FPRs could always be accessed using abstract commands. I need
this to get coverage of some OpenOCD code that I broke. (See
https://github.com/riscv/riscv-openocd/pull/745)
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The scheme was based on the notion that memory accesses are idempotent
up until the point the trigger would've been hit, which isn't true in
the case of side-effecting loads and data-value triggers.
Instead, check the trigger on the next instruction fetch. To keep the
perf overhead minimal, perform this check on the I$ refill path, and
ensure that path is taken by flushing the I$.
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Instruction fetch is always little-endian.
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As a side effect, misaligned stores now behave the same as aligned stores
with respect to triggers: only the first byte is checked.
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As a side effect, misaligned loads now behave the same as aligned loads
with respect to triggers: only the first byte is checked.
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Fix trigger priority
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Signed-off-by: Jerin Joy <joy@rivosinc.com>
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Suppressing these individually would add too much clutter.
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This way, it can be used as an expression within a template argument.
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The variable chain_ok is used to indicate if the current trigger
is suppressed by the trigger chain. A true value means the trigger
is either un-chained or matches all previous triggers in the chain,
and a false value means the trigger is chained and mismatches
previous triggers.
A false condition of variable chain_ok is missing. The false
condition should be mcontrol.chain=1 and not matching; otherwise,
the chain_ok=true (including initialization). The bug results in
issues #559 and #627.
Related issues:
- https://github.com/riscv-software-src/riscv-isa-sim/issues/599
- https://github.com/riscv-software-src/riscv-isa-sim/issues/627
This PR fixes the issues #559 and #627.
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support arrow/home/end keys in debug mode
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The data value of the function store_slow_path() is meaningful only when
the actually_store=true. Otherwise, the data value is a hollow value of
0, which may result in unintended trigger matching.
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The spec defines that the mcontrol store address/data has a higher
priority over page fault and address misalignment (Debug spec, Table
5.2). Thus, the trigger checking should be before the translation and
alignment checking.
The previous implementation checks the trigger after the translation and
alignment, resulting in incorrect priority. For instance, when page fault
and trigger occur on the same instruction, the previous implementation
will choose to raise the page fault, which contradicts the priority
requirement.
This commit moves the trigger checking before the misaligned checking and
translation. The trigger will fire on the instruction instead of the page
fault in the above case.
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The spec defines the mcontrol load address has a higher priority over
page fault and address misaligned (Debug spec, Table 5.2). Thus, the
trigger checking should be before the translation and alignment
checking.
The previous implementation checks the trigger after the translation
and alignment, resulting in incorrect priority. For instance, when page
fault and trigger occur on the same instruction, the previous
implementation will choose to raise the page fault, which contradicts
the priority requirement.
This commit adds an address-only trigger checking before the misaligned
checking and translation. The trigger will fire on the instruction
instead of the page fault in the above case.
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The spec defines the mcontrol execute address has a higher priority over
page fault (Debug spec, Table 5.2). Thus, the trigger checking should be
before the translation.
The previous implementation checks the trigger after the translation,
resulting in incorrect priority. For instance, when page fault and
trigger occur on the same instruction, the previous implementation will
choose to raise the page fault, which contradicts the priority
requirement.
This commit adds an address-only trigger checking before the
translation. The trigger will fire on the instruction instead of the
page fault in the above case.
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The mcontrol trigger can select either address or data for checking. The
The selection decides the priority of the trigger. For instance, the
address trigger has a higher priority over the page fault, and the page
fault has a higher priority over the data trigger.
The previous implementation only has the checking functions for data
trigger, which results in incorrect priority of address trigger.
This commit adds a has_data argument to indicate address trigger and the
priority of the trigger.
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Fix vmv.x.s for RV32
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The Spike internals require that, when XLEN is narrower than reg_t,
values be sign-extended to the width of reg_t.
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support arrow/home/end keys in debug mode
support the arrow/home/end keys to move the cursor and trace back the history command in the debug mode
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https://github.com/rivosinc/hammer
Signed-off-by: Jerin Joy <joy@rivosinc.com>
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Detect loading isa-incompatible code
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add support for sscofpmf extension v0.5.2
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