Age | Commit message (Expand) | Author | Files | Lines |
2011-05-16 | [sim,pk] cleanups & initial virtual memory support | Andrew Waterman | 7 | -39/+70 |
2011-05-16 | [sim,xcc] change cond. mov inst format, add implementation | Yunsup Lee | 4 | -0/+8 |
2011-05-15 | [opcodes,pk,sim,xcc] resolve a conflict | Yunsup Lee | 1 | -4/+19 |
2011-05-15 | [libs,opcodes,pk,sim,xcc] add mov*,fmov*, shuffle vec insts | Yunsup Lee | 76 | -202/+212 |
2011-05-13 | [sim] initial support for virtual memory | Andrew Waterman | 3 | -18/+131 |
2011-05-13 | [sim] stubs for perfctr instructions | Andrew Waterman | 3 | -0/+3 |
2011-05-13 | tweaked encoding of rdcycle & cousins | Andrew Waterman | 1 | -23/+38 |
2011-05-06 | [sim] fixed building sim without cache simulators | Andrew Waterman | 1 | -1/+1 |
2011-04-30 | [sim] hacked in a dcache simulator | Andrew Waterman | 8 | -43/+187 |
2011-04-24 | [xcc,sim,opcodes] added c.addiw | Andrew Waterman | 2 | -3569/+559 |
2011-04-24 | [xcc,sim,opcodes] added more RVC instructions | Andrew Waterman | 22 | -12/+2642 |
2011-04-23 | [sim] fixed divw/remw crashing simulator | Andrew Waterman | 2 | -6/+2 |
2011-04-18 | [xcc,sim] rv64 'w' instruction semantics changed | Andrew Waterman | 2 | -2/+2 |
2011-04-18 | [xcc,sim,opcodes] added rvc conditional branches | Andrew Waterman | 4 | -4/+53 |
2011-04-16 | [sim] removed undefined behavior for non-canonical inputs | Andrew Waterman | 13 | -13/+15 |
2011-04-16 | [sim] added "str" debug command | Andrew Waterman | 2 | -0/+18 |
2011-04-15 | [sim] fixed jalr immediate bug | Andrew Waterman | 1 | -2/+2 |
2011-04-15 | [sim] added icache simulator (disabled by default) | Andrew Waterman | 11 | -7/+136 |
2011-04-12 | [xcc,pk,sim] added privileged cflush instruction | Andrew Waterman | 2 | -0/+10 |
2011-04-12 | [xcc,sim] fixed RM field | Andrew Waterman | 1 | -2/+4 |
2011-04-12 | [xcc,sim] rvc loads and stores | Andrew Waterman | 10 | -1/+187 |
2011-04-12 | [sim,pk] fixed minor pk bugs and trap codes | Andrew Waterman | 2 | -4/+7 |
2011-04-11 | [sim] fixed FSR exception field bug | Andrew Waterman | 1 | -1/+1 |
2011-04-11 | [xcc,sim,opcodes] more rvc instructions and bug fixes | Andrew Waterman | 8 | -6/+507 |
2011-04-09 | [sim] add disable option for vector | Yunsup Lee | 2 | -0/+8 |
2011-04-09 | [sim] set SR_EV for uts | Yunsup Lee | 1 | -0/+1 |
2011-04-09 | [sim] add vector traps to vector instructions | Yunsup Lee | 44 | -1/+44 |
2011-04-09 | [sim] add vt stuff | Yunsup Lee | 47 | -3/+189 |
2011-04-09 | [xcc, sim] added rvc insn c.li; misc fixes | Andrew Waterman | 3 | -1/+26 |
2011-04-09 | [sim,pk] reorganized status register | Andrew Waterman | 4 | -13/+18 |
2011-04-09 | [xcc,pk,sim,opcodes] added first RVC instruction | Andrew Waterman | 6 | -109/+125 |
2011-04-08 | [sim] fixed multiply-high in rv32 | Andrew Waterman | 2 | -2/+2 |
2011-04-07 | [pk,sim] fixed parse-opcodes bug | Andrew Waterman | 1 | -0/+173 |
2011-04-06 | [opcodes,pk,sim,xcc] fix utidx - add rd | Yunsup Lee | 1 | -1/+1 |
2011-04-05 | [opcodes,pk,sim,xcc] fix vector mem instruction format, add vector seg mem in... | Yunsup Lee | 37 | -50/+242 |
2011-04-04 | [opcodes,pk,sim,xcc] add leftover vector instructions (vf, etc.) | Yunsup Lee | 6 | -0/+52 |
2011-04-04 | [opcodes,pk,sim,xcc] add vector mem instructions | Yunsup Lee | 31 | -0/+208 |
2011-04-04 | [opcodes,pk,sim,xcc] add stop,utidx instructions | Yunsup Lee | 3 | -0/+18 |
2011-04-04 | [opcodes,pk,sim,xcc] add fence instructions for vector unit | Yunsup Lee | 5 | -0/+20 |
2011-03-30 | [xcc] fixed bug in amo{maxu,minu}.w | Andrew Waterman | 2 | -2/+2 |
2011-03-25 | [opcodes] minor opcode changes | Andrew Waterman | 1 | -89/+100 |
2011-03-25 | [sim,pk,xcc,opcodes] removed fminmag/fmaxmag | Andrew Waterman | 5 | -44/+0 |
2011-03-25 | [xcc,pk,opcodes,sim] updated encoding/insn names | Andrew Waterman | 16 | -143/+241 |
2011-03-17 | [sim] LWU now illegal in RV32 | Andrew Waterman | 1 | -0/+1 |
2011-03-01 | [xcc,sim] branches are pc-relative (not pc+4) again | Andrew Waterman | 1 | -2/+2 |
2011-02-15 | [xcc,opcodes,pk,sim] krste's re-renaming spree | Andrew Waterman | 40 | -93/+93 |
2011-02-15 | [xcc,sim,opcodes] removed mtflh/mffl/mffh | Andrew Waterman | 4 | -24/+0 |
2011-02-04 | [sim,pk] added interrupt-pending field to cause reg | Andrew Waterman | 5 | -13/+13 |
2011-02-02 | [sim,xcc,opcodes] added back mtflh.d | Andrew Waterman | 3 | -5/+11 |
2011-02-02 | [opcodes,pk,sim,xcc] synci now bombs whole icache | Andrew Waterman | 1 | -9/+9 |