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AgeCommit message (Expand)AuthorFilesLines
2020-05-28rvv: apply new overlapping and align macroChih-Min Chao15-87/+77
2020-05-28rvv: add e8 type for narrow/widen conversionChih-Min Chao16-5/+75
2020-05-28rvv: add new explicit eew load/store instructionsChih-Min Chao80-503/+418
2020-05-28rvv: add amo instructionsChih-Min Chao40-54/+268
2020-05-28rvv: add new singed/unsiged extension instructionsChih-Min Chao9-0/+70
2020-05-28rvv: extenc VU structure to support 0.9 new fieldsChih-Min Chao3-8/+28
2020-05-28rvv: wrap align and overlap checking macroChih-Min Chao6-9/+36
2020-05-28rvv: remove vmlenChih-Min Chao16-49/+42
2020-05-28rvv: op: change funary opChih-Min Chao1-47/+47
2020-05-28rvv: handle inactive and NaN case for vfredsumChih-Min Chao7-2/+57
2020-05-26Report haltgroup halt cause, per the debug spec. (#473)Tim Newsome5-6/+13
2020-05-22Make gen_icache script use only POSIX commands (#470)anthony-coulter1-2/+3
2020-05-20Make sure VLEN/ELEN/SLEN are initialized even without V extensionAndrew Waterman1-2/+1
2020-05-19Fix state.misa garbage initializationUdit Khanna1-1/+1
2020-05-18fix clang compile error wthin FDT parsingScott Beamer2-7/+7
2020-05-12Hardwire mstatus.[sie,spie] to zero if 'S' mode absentUdit Khanna1-3/+2
2020-05-10Merge branch 'configurable_PMP'Andrew Waterman8-39/+252
2020-05-10Implement coarse-grain PMP matching logicAndrew Waterman1-6/+6
2020-05-10Implement CSR read/write behavior for coarse-grain PMPAndrew Waterman2-2/+11
2020-05-10Implement configurable PMP countAndrew Waterman1-6/+16
2020-05-10Disable PMP checks when configuration includes zero PMP registersAndrew Waterman1-1/+1
2020-05-09Support consuming PMP number and granularity from DTBAndrew Waterman3-0/+37
2020-05-09Rename n_pmp constant to max_pmpAndrew Waterman3-12/+12
2020-05-06Add missing stdexcept importsSchuyler Eldridge1-0/+1
2020-05-04parser: fp16: require F extensionChih-Min Chao1-0/+3
2020-05-04rvv: fp16: support element movement instructionsChih-Min Chao6-15/+67
2020-05-04rvv: fp16: support vfwxxx.[wv][vf] instructionsChih-Min Chao19-19/+96
2020-05-04rvv: fp16: support conversion instrucitonsChih-Min Chao22-126/+151
2020-05-04rvv: fp16: support reduction instructionsChih-Min Chao7-15/+56
2020-05-04rvv: fp16: support comparison instructionsChih-Min Chao11-2/+39
2020-05-04rvv: fp16: support .vf instructionsChih-Min Chao25-5/+89
2020-05-04rvv: fp16: support .vv instructionsChih-Min Chao22-3/+74
2020-05-04rvv: remove unused WIDE_END loop macroChih-Min Chao8-16/+11
2020-05-04fp16: add helper macroChih-Min Chao1-0/+8
2020-04-29rvv: commitlog: report status when memory trap occurs in vector load/storeChih-Min Chao1-6/+25
2020-04-28Merge pull request #456 from chihminchao/rvv-fix-2020-04-28Andrew Waterman3-6/+9
2020-04-28rvv: commitlog: fix vmsgtu.vi and vmsleu.vi dst informationChih-Min Chao3-6/+9
2020-04-28Fix vnclip.wi bugAndrew Waterman1-1/+1
2020-04-27fdt: add pmp granularity functionChih-Min Chao2-3/+25
2020-04-27fdt: add pmp parsing helperChih-Min Chao2-1/+17
2020-04-27fdt: restructure dtb create and config flowChih-Min Chao2-17/+50
2020-04-27fdt: option: add --dtb option to specify dtb binary fileChih-Min Chao2-2/+22
2020-04-27fdt: add clint base address parsing helperChih-Min Chao2-0/+65
2020-04-26fdt: import fdt library from OpenSBIChih-Min Chao1-0/+1
2020-04-24parser: exhance --isa to support extended extensionChih-Min Chao2-26/+77
2020-04-24rvv: commitlog: fix dst information for int comparisonChih-Min Chao1-20/+40
2020-04-24rvv: leave only SEW-bit segment storeChih-Min Chao17-156/+58
2020-04-24rvv: leave only SEW-bit segment loadChih-Min Chao29-71/+74
2020-04-24rvv: add vfslide1[down|up].vf and refine checking ruleChih-Min Chao11-35/+87
2020-04-20rvv: add float conversion for rtz variantsChih-Min Chao8-0/+80
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