| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2016-05-23 | Add --gdb-port | Tim Newsome | 1 | -1/+1 | |
| It's necessary to be able to run multiple spikes at once on the same box. | |||||
| 2016-05-23 | Flush icache when using swbps and report to gdb. | Tim Newsome | 1 | -1/+1 | |
| 2016-05-23 | Add -H to start halted. | Tim Newsome | 1 | -2/+4 | |
| 2016-05-23 | Listen on a socket for gdb to connect to. | Tim Newsome | 1 | -0/+3 | |
| So far it just listens, and gdb times out because it's not getting any messages back. Receive packets and verify their checksum. | |||||
| 2016-05-02 | Add back IPI support | Andrew Waterman | 1 | -7/+11 | |
| 2016-05-02 | Remove tohost/fromhost registers | Andrew Waterman | 1 | -7/+0 | |
| 2016-04-30 | Remove SCRs; add padding after config string | Andrew Waterman | 1 | -22/+15 | |
| 2016-04-29 | Move much closer to new platform-M memory map | Andrew Waterman | 1 | -18/+22 | |
| Reset vector is at 0x1000; below that is reserved for debug Memory is at 0x80000000 | |||||
| 2016-04-28 | Remove MTIME[CMP]; add RTC device | Andrew Waterman | 1 | -3/+12 | |
| 2016-03-02 | Use RV config string rather than FDT | Andrew Waterman | 1 | -37/+39 | |
| 2016-03-02 | New definitions of misa/marchid/mvendorid | Andrew Waterman | 1 | -1/+1 | |
| 2016-03-02 | Set default RV32 RAM size to 4 GiB - 256 MiB | Andrew Waterman | 1 | -2/+2 | |
| This allows, by default, 256 MiB of addressable I/O space. | |||||
| 2015-11-12 | Generate device tree for target machine | Andrew Waterman | 1 | -8/+47 | |
| 2015-09-24 | Refactor memory access code; add MMIO support | Andrew Waterman | 1 | -0/+9 | |
| Of course, it doesn't do anything yet. | |||||
| 2015-08-06 | Add an option (-l) to display a log of execution in non-interactive mode. | Prashanth Mundkur | 1 | -0/+7 | |
| Interactive (-d) mode overrides this option when both are specified. | |||||
| 2015-05-31 | Use single, shared real-time counter | Andrew Waterman | 1 | -2/+4 | |
| This required disentangling INSTRET/CYCLE from TIME. | |||||
| 2015-04-03 | Support setting ISA/subsets with --isa flag | Andrew Waterman | 1 | -9/+4 | |
| Default is RV64IMAFDC. Can do things like --isa=RV32 (which implies IMAFDC) --isa=IM (which implies RV64) --isa=RV64IMAFDXhwacha | |||||
| 2014-08-15 | Added PC histogram option. | Christopher Celio | 1 | -1/+12 | |
| - Spits out all PCs (on 4B granularity) executed with count. - Requires a compile time configuration option. - Also requires a run-time flag. | |||||
| 2014-01-13 | Improve performance for branchy code | Andrew Waterman | 1 | -1/+1 | |
| We now use a heavily unrolled loop as the software I$, which allows the host machine's branch target prediction to associate target PCs with unique-ish host PCs. | |||||
| 2013-10-28 | Pass target machine's return code back to OS | Andrew Waterman | 1 | -1/+2 | |
| 2013-10-18 | refactor disassembler, and add hwacha disassembler | Yunsup Lee | 1 | -3/+14 | |
| 2013-09-23 | Fix Scott's deadlock | Andrew Waterman | 1 | -4/+3 | |
| Not Scott's fault, I mean | |||||
| 2013-09-11 | Implement zany immediates | Andrew Waterman | 1 | -2/+1 | |
| 2013-09-10 | Don't tick HTIF as often | Andrew Waterman | 1 | -4/+4 | |
| 2013-08-13 | Implement RoCC and add a dummy RoCC | Andrew Waterman | 1 | -1/+1 | |
| Enable it with --extension=dummy | |||||
| 2013-08-11 | Instructions are no longer member functions | Andrew Waterman | 1 | -10/+8 | |
| 2013-07-22 | Add xspike program | Andrew Waterman | 1 | -1/+12 | |
| 2013-07-19 | Use calloc to allocate target memory | Andrew Waterman | 1 | -18/+7 | |
| It just calls mmap under the hood, anyway... | |||||
| 2013-07-12 | Eliminate infinite loop in debug mode | Andrew Waterman | 1 | -0/+10 | |
| 2013-07-12 | Exit cleanly from debug console | Andrew Waterman | 1 | -8/+15 | |
| 2013-07-12 | Favor procs.size() over num_cores() | Andrew Waterman | 1 | -3/+5 | |
| 2013-03-29 | add load-reserved/store-conditional instructions | Andrew Waterman | 1 | -7/+17 | |
| 2013-03-25 | add BSD license | Andrew Waterman | 1 | -0/+2 | |
| 2013-03-25 | add missing #include | Andrew Waterman | 1 | -0/+1 | |
| 2013-02-12 | make HTIF interactions deterministic; fix race | Andrew Waterman | 1 | -3/+2 | |
| 2013-01-25 | change htif to link against libfesvr | Andrew Waterman | 1 | -20/+20 | |
| 2012-05-15 | fix htif interaction with interactive mode | Andrew Waterman | 1 | -5/+8 | |
| 2012-05-09 | per-core tohost/fromhost registers | Andrew Waterman | 1 | -31/+6 | |
| update your fesvr | |||||
| 2012-03-24 | new supervisor mode | Andrew Waterman | 1 | -0/+5 | |
| 2012-02-08 | initialize tohost and fromhost | Yunsup Lee | 1 | -0/+2 | |
| 2012-01-31 | poll HTIF occasionally | Andrew Waterman | 1 | -4/+9 | |
| 2011-11-11 | Changed supervisor mode | Andrew Waterman | 1 | -0/+5 | |
| - initial PC is 0x2000 - PCRs renumbered - clearing IPIs now requires a write to a different PCR - IRQs are each given their own cause # | |||||
| 2011-10-18 | yunsup made this fix..ask him | Yunsup Lee | 1 | -0/+1 | |
| 2011-06-27 | Builds and runs on Mac OS 10.6.7 | Andrew Waterman | 1 | -2/+6 | |
| 2011-06-19 | temporary undoing of renaming | Andrew Waterman | 1 | -0/+92 | |
| 2011-06-12 | [sim] renamed to riscv-isa-run | Andrew Waterman | 1 | -351/+0 | |
| 2011-06-11 | [xcc] cleaned up mmu code | Andrew Waterman | 1 | -26/+48 | |
| 2011-05-28 | [fesvr,xcc,sim] fixed multicore sim for akaros | Andrew Waterman | 1 | -11/+32 | |
| 2011-04-30 | [sim] hacked in a dcache simulator | Andrew Waterman | 1 | -2/+2 | |
| 2011-04-16 | [sim] added "str" debug command | Andrew Waterman | 1 | -0/+17 | |
| it prints the c string starting at the specified memory address. | |||||
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index : rocket-tools/riscv-gnu-toolchain/spike.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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