index
:
rocket-tools/riscv-gnu-toolchain/spike.git
confprec
cs250
cycleh
debug_rom
debug_rom_fence
device_flags
dtm_reset_error
dts_parsing
dynamic
eos18-bringup
factor-out-macros
fix-bf16
force-rtti
fp-encoding
heterogeneous_mc
hwachav4
increase-stack-size
itrigger-etrigger-cleanup
load_reservation_set_size
log-commits-faster
master
mmio-hack
mvp
no_progbuf
no_progbuf2
nolibfdt
p-ext-0.5.2
plctlab-plct-zce-fix2
plic-clint-endian
plic_uart_v1
priv-1.10
private-l1-caches
pte-info-and-delegation
remove-tests
rivosinc-etrigger_fix_exception_match
rva-profile-support
simplify-misaligned
sodor
sparse-mem
speedup-hacks
static-link
test
tmp
trigger_priority
tweak_debug_rom
whole-archive
sifive/rvv0.9-phase2
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riscv
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riscv.mk.in
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Author
Files
Lines
2020-05-19
fdt: import fdt library from OpenSBI
Chih-Min Chao
1
-0
/
+1
2020-05-14
rvv: add vzext/vsext
Chih-Min Chao
1
-0
/
+6
2020-05-13
rvv: change to 0.9amo
Chih-Min Chao
1
-9
/
+36
2020-05-13
rvv: amo pre-0.9
Chih-Min Chao
1
-0
/
+12
2020-05-11
rvv: change to 0.9 ldst
Chih-Min Chao
1
-44
/
+32
2020-05-04
zfh: implementation all instructions
Chih-Min Chao
1
-0
/
+39
2020-04-14
rvv: add vfslide1[down|up].vf and refine checking rule
Chih-Min Chao
1
-0
/
+2
2020-04-14
rvv: add float conversion for rtz variants
Chih-Min Chao
1
-0
/
+6
2020-01-06
rvv : vmv[1248]r.v
Chih-Min Chao
1
-0
/
+4
2019-11-27
rvv: add whole register load/store, vl1r.v/vs1r.v
Chih-Min Chao
1
-0
/
+2
2019-11-27
rvv: add unsigned average
Chih-Min Chao
1
-0
/
+4
2019-11-27
rvv: replace vn suffic by 'w'
Chih-Min Chao
1
-12
/
+12
2019-11-27
rvv: rename vfncvt suffix and add rod rouding type
Chih-Min Chao
1
-5
/
+6
2019-11-27
rvv: add vqm* 'Quad-Widening Integer Multiply-Add'
Chih-Min Chao
1
-0
/
+7
2019-11-27
rvv: add quad insn and new vlenb csr
Chih-Min Chao
1
-7
/
+0
2019-11-17
Re-encode vaadd/vasub; remove vaadd.vi; add vaaddu/vasubu
Andrew Waterman
1
-1
/
+0
2019-10-22
rvv: remove vmford
Chih-Min Chao
1
-2
/
+0
2019-09-05
rvv: change vext to vmv
Chih-Min Chao
1
-1
/
+1
2019-09-05
Revert "vext.x.v -> vmv.x.s; unary operation encoding changes"
Chih-Min Chao
1
-1
/
+1
2019-09-04
Implement MMIO device plugins.
Aaron Jones
1
-0
/
+3
2019-09-04
vext.x.v -> vmv.x.s; unary operation encoding changes
Andrew Waterman
1
-1
/
+1
2019-09-04
vmfirst/vmpopc have been renamed to vfirst/vpopc
Andrew Waterman
1
-2
/
+2
2019-07-22
Remove old header from makefile
Andrew Waterman
1
-1
/
+0
2019-07-22
Fix support for 32-bit hosts (but no V extension in that case!)
Andrew Waterman
1
-1
/
+1
2019-06-14
rvv: sort instruction list
Chih-Min Chao
1
-16
/
+16
2019-06-13
rvv: separte vfunary0 into independent instructions
Chih-Min Chao
1
-1
/
+14
2019-06-13
rvv: spearate vfunary1 into independent instructions
Chih-Min Chao
1
-1
/
+2
2019-06-10
rvv: fix vfw[add|sub].w[vf]
Chih-Min Chao
1
-2
/
+3
2019-06-10
rvv: fix widen fpu zero and function
Chih-Min Chao
1
-0
/
+1
2019-06-09
rvv: add missing targets vfwadd_vf and vfwadd_wf
Dave.Wen
1
-0
/
+2
2019-06-06
rvv: follow new instruction name change
Chih-Min Chao
1
-20
/
+18
2019-06-04
rvv: sepapate vfmerge
Chih-Min Chao
1
-1
/
+2
2019-06-04
rvv: add new adc/sbc
Chih-Min Chao
1
-0
/
+5
2019-06-04
rvv: move vadc/vsbc.v[vxi] to vadc/vsbc.v[vxi]m
Chih-Min Chao
1
-5
/
+5
2019-06-04
rvv: separate vmerge and vmv
Chih-Min Chao
1
-3
/
+6
2019-06-04
rvv: vmiota_m -> viota_m
Chih-Min Chao
1
-1
/
+1
2019-06-04
rvv: change vseq.?? to vmseq.?? and related insns
Chih-Min Chao
1
-20
/
+20
2019-06-04
rvv: add vfrsub.vf
Chih-Min Chao
1
-0
/
+1
2019-06-04
rvv: change vfeq to vmfeq and related comparision instruction
Chih-Min Chao
1
-12
/
+12
2019-05-20
rvv: change viota_m to vmiota_m
Chih-Min Chao
1
-1
/
+1
2019-05-19
rvv: separate vmuary0 by new encoding change
Chih-Min Chao
1
-1
/
+5
2019-05-16
rvv: fix missng empty line
Chih-Min Chao
1
-0
/
+1
2019-05-16
rvv: fix integer reduction instruction suffix
Chih-Min Chao
1
-9
/
+8
2019-05-13
Revert "Add FLH and FSH instructions expanding IEEE fp16 in memory to fp32 in...
Chih-Min Chao
1
-2
/
+0
2019-05-13
rvv: makefile spearate instruction for differenct extension
Chih-Min Chao
1
-381
/
+422
2019-05-10
rvv: add unordred indexed store
Chih-Min Chao
1
-0
/
+4
2019-05-06
rvv: add vwredsum
Chih-Min Chao
1
-0
/
+2
2019-05-02
rvv: add vmunary0_vv
Chih-Min Chao
1
-0
/
+1
2019-05-01
rvv: add fault-first only load
Chih-Min Chao
1
-0
/
+7
2019-05-01
rvv: add element load/store
Chih-Min Chao
1
-0
/
+6
[next]