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AgeCommit message (Expand)AuthorFilesLines
2022-03-30trigger_operation_t -> triggers::operation_tTim Newsome1-2/+2
2021-12-05page fault when PTE_N bit set and not EXT_SVNAPOT (#875)John Ingalls1-0/+4
2021-12-04page fault when PTE_PBMT bits set and not EXT_SVPBMT (#874)John Ingalls1-0/+4
2021-11-29Reindent s2xlate()Scott Johnson1-49/+49
2021-11-29Raise guest page fault if GPA is out of rangeScott Johnson1-0/+5
2021-09-25Convert hgatp to csr_tScott Johnson1-1/+1
2021-09-08Use virtualized_csr_t for satp and vsatpScott Johnson1-1/+1
2021-09-08Convert hstatus to csr_t familyScott Johnson1-1/+1
2021-09-08Add get_const_xlen() as a way to document assumptions of unchanging xlenScott Johnson1-2/+2
2021-09-08Simplify calculation of mxrScott Johnson1-3/+1
2021-09-08Convert sstatus to virtualized_csr_tScott Johnson1-5/+4
2021-09-08Convert mstatus into csr_t familyScott Johnson1-4/+4
2021-09-08Convert mmu_t::walk to use sstatusScott Johnson1-4/+4
2021-09-08Convert s2xlate() to use sstatusScott Johnson1-2/+2
2021-09-08Convert vsstatus to csr_t familyScott Johnson1-3/+3
2021-09-08Remove unnecessary check of procScott Johnson1-1/+1
2021-09-08Move permissions check into pmpaddr_csr_tScott Johnson1-6/+1
2021-09-08Make pmp_ok return type boolScott Johnson1-1/+1
2021-09-08Move homogeneity detection into pmpaddr_csr_tScott Johnson1-22/+3
2021-09-08Remove unnecessary check for PMP_OFFScott Johnson1-23/+19
2021-09-08Add new method match4()Scott Johnson1-6/+1
2021-09-08Add tor_base_paddr() method to pmpaddrScott Johnson1-6/+2
2021-09-08Add napot_mask() function to simplify callersScott Johnson1-9/+2
2021-09-08Add tor_paddr() method to simplify callersScott Johnson1-2/+2
2021-09-08Convert pmpaddr* to csr_t familyScott Johnson1-4/+4
2021-09-02Use correct CSR for SUM/MXR for VS-mode load/stores (#792)Scott Johnson1-3/+6
2021-08-06Non-leaf PTEs should not have N or PBMT bits set (#764)Daniel Lustig1-2/+2
2021-07-22Non-leaf PTEs with D/A/U==1 are reservedAndrew Waterman1-0/+2
2021-07-22Merge branch 'nonleaf_dau' of https://github.com/daniellustig/riscv-isa-sim i...Andrew Waterman1-0/+2
2021-07-22Non-leaf PTEs with D/A/U==1 are reservedDan Lustig1-0/+2
2021-07-21Fix hypervisor MXR and SUMAndrew Waterman1-8/+10
2021-07-21Fix HLVX permissions checkAndrew Waterman1-15/+13
2021-07-21Simplify (and possibly fix) handling of HLV/HSV TLB accessesAndrew Waterman1-2/+2
2021-07-21HLV/HSV instructions should respect SPVP even in debug modeAndrew Waterman1-1/+1
2021-07-20Priv virtual memory updates (#750)Daniel Lustig1-4/+8
2021-07-16Fix MPRV-related bugAndrew Waterman1-1/+5
2021-03-05Don't make MPRV load/store virtual if MPV=1, MPP=3 (#666)jameshippisley1-1/+1
2021-02-08Zsn has been renamed Svnapot (#641)Daniel Lustig1-1/+1
2020-12-18Check and use proc variable in MMU emulationAnup Patel1-3/+3
2020-12-07Oops...napot_bits should use ctz, not clz (#614)Daniel Lustig1-2/+2
2020-11-27Fix hstatus.GVA and mstatus.GVA updationAnup Patel1-15/+15
2020-11-18Don't include PTE.N bit as part of the PPNAndrew Waterman1-2/+2
2020-11-18Invalid NAPOT settings cause page faults, not access exceptionsAndrew Waterman1-2/+2
2020-11-18Add Zsn extensionAndrew Waterman1-3/+18
2020-11-07Tag target endian values to help guide conversion codeMarcus Comstedt1-4/+4
2020-11-07Implement support for big-endian targetsMarcus Comstedt1-4/+7
2020-10-24Fix trap generation in s2xlate()Anup Patel1-7/+7
2020-07-09Implement hypervisor two-stage MMUAnup Patel1-15/+95
2020-07-08Extend trap classes to pass more informationAnup Patel1-9/+9
2020-05-10Implement coarse-grain PMP matching logicAndrew Waterman1-6/+6
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