Age | Commit message (Collapse) | Author | Files | Lines | |
---|---|---|---|---|---|
2014-12-04 | Set badvaddr on instruction page faults | Andrew Waterman | 1 | -2/+1 | |
This supports distinguishing the EPC (the address of the first byte of the faulting instruction) from the address of the page fault (potentially some bytes later). | |||||
2014-01-13 | Improve performance for branchy code | Andrew Waterman | 1 | -2/+2 | |
We now use a heavily unrolled loop as the software I$, which allows the host machine's branch target prediction to associate target PCs with unique-ish host PCs. | |||||
2013-12-17 | Speed things up quite a bit | Andrew Waterman | 1 | -4/+5 | |
2013-08-11 | Instructions are no longer member functions | Andrew Waterman | 1 | -9/+8 | |
2013-07-26 | New supervisor mode | Andrew Waterman | 1 | -13/+13 | |
2013-07-26 | Generate instruction decoder dynamically | Andrew Waterman | 1 | -10/+4 | |
This will make it easier for accelerators to add instructions. | |||||
2013-03-29 | add load-reserved/store-conditional instructions | Andrew Waterman | 1 | -2/+9 | |
2013-03-25 | add BSD license | Andrew Waterman | 1 | -0/+2 | |
2013-03-25 | truncate effective addresses in rv32 | Andrew Waterman | 1 | -3/+3 | |
also, employ a more efficient instruction dispatch based upon rv32 mode. | |||||
2013-02-15 | don't store host pointers in soft TLB | Andrew Waterman | 1 | -3/+3 | |
this reduces performance by epsilon, but it simplifies hooking into the MMU | |||||
2013-02-13 | clean up fetch-execute loop a bit | Andrew Waterman | 1 | -6/+6 | |
2013-02-13 | add I$/D$/L2$ simulators | Andrew Waterman | 1 | -6/+21 | |
2012-03-24 | new supervisor mode | Andrew Waterman | 1 | -1/+1 | |
2012-01-30 | don't set badvaddr for instruction access faults | Andrew Waterman | 1 | -3/+4 | |
2012-01-24 | check that virtual addresses are sign-extended | Andrew Waterman | 1 | -1/+5 | |
2011-11-01 | Fixed tight coupling of host and target page size | Andrew Waterman | 1 | -1/+1 | |
2011-06-19 | temporary undoing of renaming | Andrew Waterman | 1 | -0/+104 | |
2011-06-12 | [sim] renamed to riscv-isa-run | Andrew Waterman | 1 | -104/+0 | |
2011-06-11 | [xcc] tlb now stores host addresses | Andrew Waterman | 1 | -3/+3 | |
2011-06-11 | [xcc] cleaned up mmu code | Andrew Waterman | 1 | -2/+94 | |
2011-05-16 | [sim,pk] cleanups & initial virtual memory support | Andrew Waterman | 1 | -0/+12 | |