rocket-tools/riscv-gnu-toolchain/spike.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2020-05-25	rvv: add e8 type for scale	Chih-Min Chao	1	-0/+1
2020-05-25	rvv: fix wrong vill checking	Chih-Min Chao	6	-5/+6
2020-05-24	rvv: support [u]i8 type	Chih-Min Chao	15	-0/+51
2020-05-22	rvv: remove remove vlmul	Chih-Min Chao	7	-24/+19
2020-05-21	rvv: remove vmlen	Chih-Min Chao	15	-38/+32
2020-05-21	rvv: refine vl length and elemnet size checking	Chih-Min Chao	4	-5/+4
2020-05-21	rvv: fix vms[bio]f.m checking rule	Chih-Min Chao	3	-9/+12
2020-05-20	rvv: refine st_index	Chih-Min Chao	8	-184/+8
2020-05-20	rvv: refine ld_index	Chih-Min Chao	4	-91/+4
2020-05-18	rvv: vid's mlen overlap checking	Dave.Wen	1	-1/+1
2020-05-14	rvv: add vzext/vsext	Chih-Min Chao	6	-0/+6
2020-05-13	rvv: amo: fix wrong index eew	Chih-Min Chao	27	-27/+27
2020-05-13	rvv: change to 0.9amo	Chih-Min Chao	45	-18/+72
2020-05-13	rvv: amo pre-0.9	Chih-Min Chao	9	-0/+18
2020-05-11	rvv: change to 0.9 ldst	Chih-Min Chao	75	-204/+328
2020-05-07	rvv: add eew and lmul for vle/vse/vleff	Dave.Wen	1	-1/+5
2020-05-04	zfh: implementation all instructions	Chih-Min Chao	36	-0/+167
2020-04-27	rvv: commitlog: fix comparision dst information	Chih-Min Chao	2	-2/+2
2020-04-24	rvv: commitlog: fix missing informaiton for slide1	Chih-Min Chao	4	-12/+12
2020-04-23	rvv: fix vfncvt.xu.f.w for fp16	Chih-Min Chao	1	-1/+1
2020-04-23	rvv: aad fp16 support for vfwxxx.[wv]v	Chih-Min Chao	9	-0/+27
2020-04-22	rvv: fix segment load/store nf checking	Chih-Min Chao	1	-4/+4
2020-04-21	rvv: fix vfmv for fp16	Chih-Min Chao	3	-13/+36
2020-04-21	rvv: fix vfmerge.vfm for fp16	Chih-Min Chao	1	-2/+15
2020-04-21	rvv: fix vfslide for fp16	Chih-Min Chao	2	-0/+16
2020-04-21	rvv: fix floating comparison for fp16	Chih-Min Chao	9	-0/+27
2020-04-20	rvv: refine vfncvt case for f32_to_[u]i16 cases	Chih-Min Chao	3	-6/+3
2020-04-20	rvv: fix f16_to_[u]i16 conversion	Chih-Min Chao	4	-8/+4
2020-04-20	rvv: remove debug message	Chih-Min Chao	1	-1/+0
2020-04-19	rvv: fix vfwredsum checking rule	Chih-Min Chao	1	-1/+3
2020-04-16	rvv: fix rtz cvt	Chih-Min Chao	13	-51/+47
2020-04-15	rvv: add widen conversion instructions	Chih-Min Chao	7	-51/+53
2020-04-15	rvv: add narrow conversion instrucitons	Chih-Min Chao	6	-42/+44
2020-04-15	rvv: add normal and widen reduction instructions	Chih-Min Chao	6	-12/+36
2020-04-15	rvv: add vmfxx f16 compare instructions	Chih-Min Chao	10	-0/+30
2020-04-15	rvv: add .vf fp16 instructions	Chih-Min Chao	24	-0/+76
2020-04-15	rvv: add .vv fp16 instructions	Chih-Min Chao	21	-0/+63
2020-04-14	rvv: leave only SEW-bit segment store	Chih-Min Chao	16	-151/+51
2020-04-14	rvv: leave only sew-wise segment load	Chih-Min Chao	28	-65/+64
2020-04-14	rvv: add vfslide1[down\|up].vf and refine checking rule	Chih-Min Chao	8	-27/+62
2020-04-14	rvv: add float conversion for rtz variants	Chih-Min Chao	6	-0/+64
2020-04-10	rvv: vslide[1]up now allows mask overlap when LMUL=1	Chih-Min Chao	3	-3/+3
2020-04-05	Don't acquire load reservation in the event of a fault	Andrew Waterman	2	-2/+4
2020-04-05	ebreak should write mtval with 0, not pc	Andrew Waterman	2	-2/+2
2020-03-27	rvv: fix int_max/min value calculation	Chih-Min Chao	8	-23/+26
2020-03-26	rvv: fix vssraa.vi e64 corner case	Chih-Min Chao	1	-1/+1
2020-03-24	rvv: fix vmv reg checking failure	Chih-Min Chao	3	-1/+6
2020-03-23	rvv: restrict segment load register rule	Chih-Min Chao	3	-0/+3
2020-03-17	rvv: fix vdiv corner case	Chih-Min Chao	2	-2/+2
2020-03-12	rvv: commitlog: fix vrgather_vv dump	Chih-Min Chao	1	-4/+4