Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2015-09-04 | Move towards RVC v1.8 | Andrew Waterman | 25 | -103/+57 |
2015-05-31 | Add rest of RV32C instructions | Andrew Waterman | 5 | -14/+68 |
2015-05-31 | Fix c.slliw implementation | Andrew Waterman | 1 | -1/+3 |
2015-05-31 | New RV64C proposal | Andrew Waterman | 24 | -17/+64 |
2015-05-31 | Take interrupts as soon as interrupts are enabled | Andrew Waterman | 2 | -6/+0 |
2015-05-09 | Upgrade to privileged architecture 1.7 | Andrew Waterman | 4 | -1/+10 |
2015-04-03 | Support setting ISA/subsets with --isa flag | Andrew Waterman | 152 | -22/+119 |
2015-04-02 | Simplify RV32 comparisons | Andrew Waterman | 10 | -10/+10 |
2015-03-30 | Implement RVC draft | Andrew Waterman | 22 | -8/+62 |
2015-03-17 | Merge [shm]call into ecall, [shm]ret into eret | Andrew Waterman | 5 | -8/+7 |
2015-03-12 | Use hcall instead of mcall | Andrew Waterman | 2 | -2/+3 |
2015-03-12 | Update to new privileged spec | Andrew Waterman | 57 | -63/+74 |
2015-02-08 | Use xlen, not xprlen, to refer to x-register width | Andrew Waterman | 17 | -26/+26 |
2015-01-02 | On misaligned fetch, set EPC to target, not branch itself | Andrew Waterman | 2 | -4/+5 |
2014-11-30 | Implement timer faithfully | Andrew Waterman | 6 | -6/+18 |
2014-11-22 | Revert "Enable support for the four custom instructions" | Yunsup Lee | 24 | -0/+0 |
2014-10-23 | Enable support for the four custom instructions | Arun Thomas | 24 | -0/+0 |
2014-09-27 | Avoid use of __int128_t | Andrew Waterman | 3 | -14/+6 |
2014-03-18 | Support RV32 RDTIMEH/RDCYCLEH/RDINSTRETH | Andrew Waterman | 6 | -6/+6 |
2014-03-06 | Add fclass.{s|d} instructions | Andrew Waterman | 2 | -0/+4 |
2014-02-10 | Revert to old AUIPC definition | Andrew Waterman | 1 | -1/+1 |
2014-01-20 | Merge branch 'confprec' | Quan Nguyen | 33 | -0/+0 |
2013-12-09 | New RDCYCLE encoding | Andrew Waterman | 6 | -6/+6 |
2013-11-25 | Update to new privileged ISA | Andrew Waterman | 19 | -20/+17 |
2013-10-17 | Add empty opcode header files for half-precision | Quan Nguyen | 33 | -0/+0 |
2013-10-16 | revamp hwacha; now runs in physical mode | Yunsup Lee | 3 | -1/+0 |
2013-09-27 | Use WRITE_RD/WRITE_FRD macros to write registers | Andrew Waterman | 139 | -162/+162 |
2013-09-21 | Update ISA encoding and AUIPC semantics | Andrew Waterman | 1 | -1/+1 |
2013-09-11 | Add AMOXOR | Andrew Waterman | 2 | -0/+7 |
2013-09-11 | Implement zany immediates | Andrew Waterman | 32 | -32/+32 |
2013-09-10 | Add rd field to JAL; drop J | Andrew Waterman | 2 | -2/+1 |
2013-08-11 | Instructions are no longer member functions | Andrew Waterman | 51 | -78/+84 |
2013-08-08 | Ignore JALR's effective address LSB | Andrew Waterman | 1 | -1/+1 |
2013-08-08 | Rename MTFSR/MFFSR to FSSR/FRSR | Andrew Waterman | 2 | -0/+0 |
2013-07-31 | Fix eret (again) | Quan Nguyen | 1 | -1/+1 |
2013-07-31 | Fix dumb ERET bug | Andrew Waterman | 1 | -1/+1 |
2013-07-26 | New supervisor mode | Andrew Waterman | 1 | -3/+3 |
2013-07-26 | Rename MFTX/MXTF to FMV | Andrew Waterman | 4 | -0/+0 |
2013-07-26 | Rip out Hwacha for now | Andrew Waterman | 90 | -145/+0 |
2013-07-26 | Rip out RVC for now | Andrew Waterman | 34 | -101/+0 |
2013-07-25 | Remove JALR static hints | Andrew Waterman | 3 | -2/+0 |
2013-04-17 | add AUIPC insn; remove RDNPC insn | Andrew Waterman | 2 | -1/+1 |
2013-03-29 | add load-reserved/store-conditional instructions | Andrew Waterman | 4 | -0/+6 |
2013-03-25 | truncate effective addresses in rv32 | Andrew Waterman | 16 | -16/+16 |
2012-08-30 | new tohost/fromhost semantics | Andrew Waterman | 1 | -2/+1 |
2012-08-01 | new tohost/fromhost semantics | Andrew Waterman | 1 | -1/+2 |
2012-03-24 | new supervisor mode | Andrew Waterman | 7 | -109/+13 |
2012-03-19 | make NaN behavior consistent with hardfloat | Andrew Waterman | 10 | -10/+10 |
2012-03-18 | update vector fences | Andrew Waterman | 4 | -0/+0 |
2012-03-18 | clean up vector exception instructions | Yunsup Lee | 2 | -0/+0 |