rocket-tools/riscv-gnu-toolchain/spike.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2019-11-27	rvv: replace vn suffic by 'w'	Chih-Min Chao	1	-21/+0
2019-11-04	rvv: tidy vnclip	Chih-Min Chao	1	-5/+3
2019-10-28	rvv: fix vnclip corner case	Chih-Min Chao	1	-1/+1
2019-10-22	rvv: add register using check for wide and narrow insn	Chih-Min Chao	1	-1/+1
2019-10-08	rvv: fix vnclip* rounding	Chih-Min Chao	1	-2/+2
2019-09-30	Update the rounding bit position for vnclip instructions.	Jerry Shih	1	-10/+7
2019-09-04	rvv: remove legacy check 1905	Chih-Min Chao	1	-1/+0
2019-06-10	rvv: fix the nclip. https://github.com/riscv/riscv-v-spec/commit/bed621ea3c36...	Dave.Wen	1	-1/+1
2019-06-08	rvv: reformat the code by 'astyle insns/v*.h -s2 -A2'	Dave	1	-17/+17
2019-06-03	rvv: refactor to the VU	Dave.Wen	1	-3/+3
2019-05-31	rvv: fix the nclip[u]	Dave.Wen	1	-16/+17
2019-05-19	rvv: append 1950 check to unspported instruction	Chih-Min Chao	1	-0/+1
2019-05-16	rvv: fix the vnclipu	Dave.Wen	1	-4/+9
2019-04-30	rvv: decouple the vectorUnit to the processor's state.	Dave.Wen	1	-3/+3
2019-04-26	rvv: fixed the vnclip[u]_v[vxi]	Dave.Wen	1	-33/+13
2019-04-22	fixed type RUN to RNU	Dave.Wen	1	-1/+1
2019-03-31	rvv: add clip instructions	Dave.Wen	1	-1/+2
2019-03-31	rvv: add vnclip[u]_v[vxi]	Dave.Wen	1	-2/+36
2019-03-26	update all instruction templates and part of the implementations	Dave.Wen	1	-0/+5