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path: root/riscv/insns/sc_d.h
AgeCommit message (Expand)AuthorFilesLines
2018-11-06Report misaligned-address exception on failed store-conditionalsAndrew Waterman1-7/+4
2018-07-10Refactor and fix LR/SC implementation (#217)Andrew Waterman1-1/+3
2015-04-03Support setting ISA/subsets with --isa flagAndrew Waterman1-0/+1
2015-03-12Update to new privileged specAndrew Waterman1-1/+1
2013-09-27Use WRITE_RD/WRITE_FRD macros to write registersAndrew Waterman1-2/+2
2013-08-11Instructions are no longer member functionsAndrew Waterman1-1/+7
2013-03-29add load-reserved/store-conditional instructionsAndrew Waterman1-0/+2