Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2011-04-16 | [sim] removed undefined behavior for non-canonical inputs | Andrew Waterman | 1 | -1/+1 |
2011-01-18 | [opcodes, sim, xcc] made *w insns illegal in RV32 | Andrew Waterman | 1 | -3/+2 |
2010-11-21 | [sim] handle integer division overflow | Andrew Waterman | 1 | -1/+4 |
2010-11-21 | [xcc, sim, pk, opcodes] new instruction encoding! | Andrew Waterman | 1 | -1/+1 |
2010-09-20 | [xcc, sim] changed instruction format so imm12 subs for rs2 | Andrew Waterman | 1 | -1/+1 |
2010-08-03 | [pk,sim,xcc] Renamed instructions to RISC-V spec | Andrew Waterman | 1 | -2/+2 |
2010-07-28 | [sim,xcc] Changed instruction format to RISC-V | Andrew Waterman | 1 | -0/+2 |