| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2022-08-04 | Modify F/D/Zfh instructions to add support for Zfinx/Zdinx/Zhinx{min} ↵ | liweiwei | 1 | -2/+2 | |
| instructions change the extention check for F/D/Zfh instructions modify the F/D/Zfh instructions to read X regs when enable Zfinx Co-authored-by: wangmeng <shusheng8495@hotmail.com> | |||||
| 2020-06-16 | zfh: implement all instructions | Chih-Min Chao | 1 | -0/+3 | |
| Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com> | |||||
| 2015-04-03 | Support setting ISA/subsets with --isa flag | Andrew Waterman | 1 | -0/+0 | |
| Default is RV64IMAFDC. Can do things like --isa=RV32 (which implies IMAFDC) --isa=IM (which implies RV64) --isa=RV64IMAFDXhwacha | |||||
| 2013-10-17 | Add empty opcode header files for half-precision | Quan Nguyen | 1 | -0/+0 | |
| * Update riscv/opcodes.h through the riscv-opcodes repository. | |||||
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index : rocket-tools/riscv-gnu-toolchain/spike.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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