| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2016-03-01 | Upgrade to latest SoftFloat | Andrew Waterman | 1 | -1/+1 | |
| 2015-04-03 | Support setting ISA/subsets with --isa flag | Andrew Waterman | 1 | -0/+1 | |
| Default is RV64IMAFDC. Can do things like --isa=RV32 (which implies IMAFDC) --isa=IM (which implies RV64) --isa=RV64IMAFDXhwacha | |||||
| 2015-03-12 | Update to new privileged spec | Andrew Waterman | 1 | -1/+1 | |
| Sorry, everyone. | |||||
| 2013-09-27 | Use WRITE_RD/WRITE_FRD macros to write registers | Andrew Waterman | 1 | -1/+1 | |
| 2011-06-19 | temporary undoing of renaming | Andrew Waterman | 1 | -0/+5 | |
| 2011-06-12 | [sim] renamed to riscv-isa-run | Andrew Waterman | 1 | -5/+0 | |
| 2011-05-18 | [sim] fixed fcvt rounding bugs | Andrew Waterman | 1 | -1/+1 | |
| 2011-01-20 | [sim, pk, xcc, opcodes] great instruction renaming of 2011 | Andrew Waterman | 1 | -0/+5 | |
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index : rocket-tools/riscv-gnu-toolchain/spike.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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