rocket-tools/riscv-gnu-toolchain/spike.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Collapse)	Author	Files	Lines
2022-08-04	Modify F/D/Zfh instructions to add support for Zfinx/Zdinx/Zhinx{min} ↵	liweiwei	1	-2/+2
	instructions change the extention check for F/D/Zfh instructions modify the F/D/Zfh instructions to read X regs when enable Zfinx Co-authored-by: wangmeng <shusheng8495@hotmail.com>
2021-12-07	Add 'Zfhmin' extension (#880)	Tsukasa #01 (a4lg)	1	-1/+1
	Zfhmin is a subset of Zfh (half-precision IEEE 754 binary16 floating point) extension, consisting only of data transfer and conversion instructions. This commit adds `EXT_ZFHMIN` to `isa_extension_t`, permits "zfhmin" as a multi-letter extension and adjusts feature gate for data transfer / conversion instructions. * FLH / FSH * FMV.X.H / FMV.H.X * FCVT.S.H / FCVT.H.S * FCVT.D.H / FCVT.H.D (if 'D' extension is also present) * FCVT.Q.H / FCVT.H.Q (if 'Q' extension is also present)
2020-06-16	zfh: implement all instructions	Chih-Min Chao	1	-0/+5
	Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
2015-04-03	Support setting ISA/subsets with --isa flag	Andrew Waterman	1	-0/+0
	Default is RV64IMAFDC. Can do things like --isa=RV32 (which implies IMAFDC) --isa=IM (which implies RV64) --isa=RV64IMAFDXhwacha
2013-10-17	Add empty opcode header files for half-precision	Quan Nguyen	1	-0/+0
	* Update riscv/opcodes.h through the riscv-opcodes repository.